1 /* 2 * linux/arch/arm/mach-pxa/generic.c 3 * 4 * Author: Nicolas Pitre 5 * Created: Jun 15, 2001 6 * Copyright: MontaVista Software Inc. 7 * 8 * Code common to all PXA machines. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * Since this file should be linked before any other machine specific file, 15 * the __initcall() here will be executed first. This serves as default 16 * initialization stuff for PXA machines which can be overridden later if 17 * need be. 18 */ 19 #include <linux/module.h> 20 #include <linux/kernel.h> 21 #include <linux/init.h> 22 #include <linux/delay.h> 23 #include <linux/platform_device.h> 24 #include <linux/ioport.h> 25 #include <linux/pm.h> 26 #include <linux/string.h> 27 28 #include <linux/sched.h> 29 #include <asm/cnt32_to_63.h> 30 #include <asm/div64.h> 31 32 #include <asm/hardware.h> 33 #include <asm/irq.h> 34 #include <asm/system.h> 35 #include <asm/pgtable.h> 36 #include <asm/mach/map.h> 37 38 #include <asm/arch/pxa-regs.h> 39 #include <asm/arch/udc.h> 40 #include <asm/arch/pxafb.h> 41 #include <asm/arch/mmc.h> 42 #include <asm/arch/irda.h> 43 #include <asm/arch/i2c.h> 44 45 #include "generic.h" 46 47 /* 48 * This is the PXA2xx sched_clock implementation. This has a resolution 49 * of at least 308ns and a maximum value that depends on the value of 50 * CLOCK_TICK_RATE. 51 * 52 * The return value is guaranteed to be monotonic in that range as 53 * long as there is always less than 582 seconds between successive 54 * calls to this function. 55 */ 56 unsigned long long sched_clock(void) 57 { 58 unsigned long long v = cnt32_to_63(OSCR); 59 /* Note: top bit ov v needs cleared unless multiplier is even. */ 60 61 #if CLOCK_TICK_RATE == 3686400 62 /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */ 63 /* The <<1 is used to get rid of tick.hi top bit */ 64 v *= 78125<<1; 65 do_div(v, 288<<1); 66 #elif CLOCK_TICK_RATE == 3250000 67 /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */ 68 v *= 4000; 69 do_div(v, 13); 70 #elif CLOCK_TICK_RATE == 3249600 71 /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */ 72 v *= 625000; 73 do_div(v, 2031); 74 #else 75 #warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE" 76 /* 77 * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for 78 * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand 79 * years range and truncation to unsigned long long limits it to 80 * sched_clock's max range of ~584 years. This is nice but with 81 * higher computation cost. 82 */ 83 { 84 union { 85 unsigned long long val; 86 struct { unsigned long lo, hi; }; 87 } x; 88 unsigned long long y; 89 90 x.val = v; 91 x.hi &= 0x7fffffff; 92 y = (unsigned long long)x.lo * NSEC_PER_SEC; 93 x.lo = y; 94 y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC; 95 x.hi = do_div(y, CLOCK_TICK_RATE); 96 do_div(x.val, CLOCK_TICK_RATE); 97 x.hi += y; 98 v = x.val; 99 } 100 #endif 101 102 return v; 103 } 104 105 /* 106 * Handy function to set GPIO alternate functions 107 */ 108 109 void pxa_gpio_mode(int gpio_mode) 110 { 111 unsigned long flags; 112 int gpio = gpio_mode & GPIO_MD_MASK_NR; 113 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8; 114 int gafr; 115 116 local_irq_save(flags); 117 if (gpio_mode & GPIO_DFLT_LOW) 118 GPCR(gpio) = GPIO_bit(gpio); 119 else if (gpio_mode & GPIO_DFLT_HIGH) 120 GPSR(gpio) = GPIO_bit(gpio); 121 if (gpio_mode & GPIO_MD_MASK_DIR) 122 GPDR(gpio) |= GPIO_bit(gpio); 123 else 124 GPDR(gpio) &= ~GPIO_bit(gpio); 125 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2)); 126 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2)); 127 local_irq_restore(flags); 128 } 129 130 EXPORT_SYMBOL(pxa_gpio_mode); 131 132 /* 133 * Routine to safely enable or disable a clock in the CKEN 134 */ 135 void pxa_set_cken(int clock, int enable) 136 { 137 unsigned long flags; 138 local_irq_save(flags); 139 140 if (enable) 141 CKEN |= clock; 142 else 143 CKEN &= ~clock; 144 145 local_irq_restore(flags); 146 } 147 148 EXPORT_SYMBOL(pxa_set_cken); 149 150 /* 151 * Intel PXA2xx internal register mapping. 152 * 153 * Note 1: not all PXA2xx variants implement all those addresses. 154 * 155 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table 156 * and cache flush area. 157 */ 158 static struct map_desc standard_io_desc[] __initdata = { 159 { /* Devs */ 160 .virtual = 0xf2000000, 161 .pfn = __phys_to_pfn(0x40000000), 162 .length = 0x02000000, 163 .type = MT_DEVICE 164 }, { /* LCD */ 165 .virtual = 0xf4000000, 166 .pfn = __phys_to_pfn(0x44000000), 167 .length = 0x00100000, 168 .type = MT_DEVICE 169 }, { /* Mem Ctl */ 170 .virtual = 0xf6000000, 171 .pfn = __phys_to_pfn(0x48000000), 172 .length = 0x00100000, 173 .type = MT_DEVICE 174 }, { /* USB host */ 175 .virtual = 0xf8000000, 176 .pfn = __phys_to_pfn(0x4c000000), 177 .length = 0x00100000, 178 .type = MT_DEVICE 179 }, { /* Camera */ 180 .virtual = 0xfa000000, 181 .pfn = __phys_to_pfn(0x50000000), 182 .length = 0x00100000, 183 .type = MT_DEVICE 184 }, { /* IMem ctl */ 185 .virtual = 0xfe000000, 186 .pfn = __phys_to_pfn(0x58000000), 187 .length = 0x00100000, 188 .type = MT_DEVICE 189 }, { /* UNCACHED_PHYS_0 */ 190 .virtual = 0xff000000, 191 .pfn = __phys_to_pfn(0x00000000), 192 .length = 0x00100000, 193 .type = MT_DEVICE 194 } 195 }; 196 197 void __init pxa_map_io(void) 198 { 199 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 200 get_clk_frequency_khz(1); 201 } 202 203 204 static struct resource pxamci_resources[] = { 205 [0] = { 206 .start = 0x41100000, 207 .end = 0x41100fff, 208 .flags = IORESOURCE_MEM, 209 }, 210 [1] = { 211 .start = IRQ_MMC, 212 .end = IRQ_MMC, 213 .flags = IORESOURCE_IRQ, 214 }, 215 }; 216 217 static u64 pxamci_dmamask = 0xffffffffUL; 218 219 static struct platform_device pxamci_device = { 220 .name = "pxa2xx-mci", 221 .id = -1, 222 .dev = { 223 .dma_mask = &pxamci_dmamask, 224 .coherent_dma_mask = 0xffffffff, 225 }, 226 .num_resources = ARRAY_SIZE(pxamci_resources), 227 .resource = pxamci_resources, 228 }; 229 230 void __init pxa_set_mci_info(struct pxamci_platform_data *info) 231 { 232 pxamci_device.dev.platform_data = info; 233 } 234 235 236 static struct pxa2xx_udc_mach_info pxa_udc_info; 237 238 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 239 { 240 memcpy(&pxa_udc_info, info, sizeof *info); 241 } 242 243 static struct resource pxa2xx_udc_resources[] = { 244 [0] = { 245 .start = 0x40600000, 246 .end = 0x4060ffff, 247 .flags = IORESOURCE_MEM, 248 }, 249 [1] = { 250 .start = IRQ_USB, 251 .end = IRQ_USB, 252 .flags = IORESOURCE_IRQ, 253 }, 254 }; 255 256 static u64 udc_dma_mask = ~(u32)0; 257 258 static struct platform_device udc_device = { 259 .name = "pxa2xx-udc", 260 .id = -1, 261 .resource = pxa2xx_udc_resources, 262 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), 263 .dev = { 264 .platform_data = &pxa_udc_info, 265 .dma_mask = &udc_dma_mask, 266 } 267 }; 268 269 static struct resource pxafb_resources[] = { 270 [0] = { 271 .start = 0x44000000, 272 .end = 0x4400ffff, 273 .flags = IORESOURCE_MEM, 274 }, 275 [1] = { 276 .start = IRQ_LCD, 277 .end = IRQ_LCD, 278 .flags = IORESOURCE_IRQ, 279 }, 280 }; 281 282 static u64 fb_dma_mask = ~(u64)0; 283 284 static struct platform_device pxafb_device = { 285 .name = "pxa2xx-fb", 286 .id = -1, 287 .dev = { 288 .dma_mask = &fb_dma_mask, 289 .coherent_dma_mask = 0xffffffff, 290 }, 291 .num_resources = ARRAY_SIZE(pxafb_resources), 292 .resource = pxafb_resources, 293 }; 294 295 void __init set_pxa_fb_info(struct pxafb_mach_info *info) 296 { 297 pxafb_device.dev.platform_data = info; 298 } 299 300 void __init set_pxa_fb_parent(struct device *parent_dev) 301 { 302 pxafb_device.dev.parent = parent_dev; 303 } 304 305 static struct platform_device ffuart_device = { 306 .name = "pxa2xx-uart", 307 .id = 0, 308 }; 309 static struct platform_device btuart_device = { 310 .name = "pxa2xx-uart", 311 .id = 1, 312 }; 313 static struct platform_device stuart_device = { 314 .name = "pxa2xx-uart", 315 .id = 2, 316 }; 317 static struct platform_device hwuart_device = { 318 .name = "pxa2xx-uart", 319 .id = 3, 320 }; 321 322 static struct resource i2c_resources[] = { 323 { 324 .start = 0x40301680, 325 .end = 0x403016a3, 326 .flags = IORESOURCE_MEM, 327 }, { 328 .start = IRQ_I2C, 329 .end = IRQ_I2C, 330 .flags = IORESOURCE_IRQ, 331 }, 332 }; 333 334 static struct platform_device i2c_device = { 335 .name = "pxa2xx-i2c", 336 .id = 0, 337 .resource = i2c_resources, 338 .num_resources = ARRAY_SIZE(i2c_resources), 339 }; 340 341 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) 342 { 343 i2c_device.dev.platform_data = info; 344 } 345 346 static struct resource i2s_resources[] = { 347 { 348 .start = 0x40400000, 349 .end = 0x40400083, 350 .flags = IORESOURCE_MEM, 351 }, { 352 .start = IRQ_I2S, 353 .end = IRQ_I2S, 354 .flags = IORESOURCE_IRQ, 355 }, 356 }; 357 358 static struct platform_device i2s_device = { 359 .name = "pxa2xx-i2s", 360 .id = -1, 361 .resource = i2s_resources, 362 .num_resources = ARRAY_SIZE(i2s_resources), 363 }; 364 365 static u64 pxaficp_dmamask = ~(u32)0; 366 367 static struct platform_device pxaficp_device = { 368 .name = "pxa2xx-ir", 369 .id = -1, 370 .dev = { 371 .dma_mask = &pxaficp_dmamask, 372 .coherent_dma_mask = 0xffffffff, 373 }, 374 }; 375 376 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) 377 { 378 pxaficp_device.dev.platform_data = info; 379 } 380 381 static struct platform_device pxartc_device = { 382 .name = "sa1100-rtc", 383 .id = -1, 384 }; 385 386 static struct platform_device *devices[] __initdata = { 387 &pxamci_device, 388 &udc_device, 389 &pxafb_device, 390 &ffuart_device, 391 &btuart_device, 392 &stuart_device, 393 &pxaficp_device, 394 &i2c_device, 395 &i2s_device, 396 &pxartc_device, 397 }; 398 399 static int __init pxa_init(void) 400 { 401 int cpuid, ret; 402 403 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 404 if (ret) 405 return ret; 406 407 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ 408 cpuid = read_cpuid(CPUID_ID); 409 if (((cpuid >> 4) & 0xfff) == 0x2d0 || 410 ((cpuid >> 4) & 0xfff) == 0x290) 411 ret = platform_device_register(&hwuart_device); 412 413 return ret; 414 } 415 416 subsys_initcall(pxa_init); 417