11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * linux/arch/arm/mach-pxa/generic.c 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Author: Nicolas Pitre 51da177e4SLinus Torvalds * Created: Jun 15, 2001 61da177e4SLinus Torvalds * Copyright: MontaVista Software Inc. 71da177e4SLinus Torvalds * 81da177e4SLinus Torvalds * Code common to all PXA machines. 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify 111da177e4SLinus Torvalds * it under the terms of the GNU General Public License version 2 as 121da177e4SLinus Torvalds * published by the Free Software Foundation. 131da177e4SLinus Torvalds * 141da177e4SLinus Torvalds * Since this file should be linked before any other machine specific file, 151da177e4SLinus Torvalds * the __initcall() here will be executed first. This serves as default 161da177e4SLinus Torvalds * initialization stuff for PXA machines which can be overridden later if 171da177e4SLinus Torvalds * need be. 181da177e4SLinus Torvalds */ 191da177e4SLinus Torvalds #include <linux/module.h> 201da177e4SLinus Torvalds #include <linux/kernel.h> 211da177e4SLinus Torvalds #include <linux/init.h> 221da177e4SLinus Torvalds 23a09e64fbSRussell King #include <mach/hardware.h> 241da177e4SLinus Torvalds #include <asm/system.h> 251da177e4SLinus Torvalds #include <asm/pgtable.h> 261da177e4SLinus Torvalds #include <asm/mach/map.h> 276769717dSEric Miao #include <asm/mach-types.h> 281da177e4SLinus Torvalds 29afd2fc02SRussell King #include <mach/reset.h> 30da065a0bSEric Miao #include <mach/gpio.h> 311da177e4SLinus Torvalds 321da177e4SLinus Torvalds #include "generic.h" 331da177e4SLinus Torvalds 3404fef228SEric Miao void clear_reset_status(unsigned int mask) 3504fef228SEric Miao { 3604fef228SEric Miao if (cpu_is_pxa2xx()) 3704fef228SEric Miao pxa2xx_clear_reset_status(mask); 3804fef228SEric Miao 3904fef228SEric Miao if (cpu_is_pxa3xx()) 4004fef228SEric Miao pxa3xx_clear_reset_status(mask); 4104fef228SEric Miao } 4204fef228SEric Miao 436769717dSEric Miao unsigned long get_clock_tick_rate(void) 446769717dSEric Miao { 456769717dSEric Miao unsigned long clock_tick_rate; 466769717dSEric Miao 476769717dSEric Miao if (cpu_is_pxa25x()) 486769717dSEric Miao clock_tick_rate = 3686400; 496769717dSEric Miao else if (machine_is_mainstone()) 506769717dSEric Miao clock_tick_rate = 3249600; 516769717dSEric Miao else 526769717dSEric Miao clock_tick_rate = 3250000; 536769717dSEric Miao 546769717dSEric Miao return clock_tick_rate; 556769717dSEric Miao } 566769717dSEric Miao EXPORT_SYMBOL(get_clock_tick_rate); 576769717dSEric Miao 581da177e4SLinus Torvalds /* 5915a40333SRussell King * Get the clock frequency as reflected by CCCR and the turbo flag. 6015a40333SRussell King * We assume these values have been applied via a fcs. 6115a40333SRussell King * If info is not 0 we also display the current settings. 6215a40333SRussell King */ 6315a40333SRussell King unsigned int get_clk_frequency_khz(int info) 6415a40333SRussell King { 650ffcbfd5SEric Miao if (cpu_is_pxa25x()) 6615a40333SRussell King return pxa25x_get_clk_frequency_khz(info); 672c8086a5Seric miao else if (cpu_is_pxa27x()) 6815a40333SRussell King return pxa27x_get_clk_frequency_khz(info); 69ecf89b8aSHaojian Zhuang return 0; 7015a40333SRussell King } 7115a40333SRussell King EXPORT_SYMBOL(get_clk_frequency_khz); 7215a40333SRussell King 7315a40333SRussell King /* 7415a40333SRussell King * Return the current memory clock frequency in units of 10kHz 7515a40333SRussell King */ 7615a40333SRussell King unsigned int get_memclk_frequency_10khz(void) 7715a40333SRussell King { 780ffcbfd5SEric Miao if (cpu_is_pxa25x()) 7915a40333SRussell King return pxa25x_get_memclk_frequency_10khz(); 802c8086a5Seric miao else if (cpu_is_pxa27x()) 8115a40333SRussell King return pxa27x_get_memclk_frequency_10khz(); 82*799929d7SHaojian Zhuang return 0; 8315a40333SRussell King } 8415a40333SRussell King EXPORT_SYMBOL(get_memclk_frequency_10khz); 8515a40333SRussell King 8615a40333SRussell King /* 871da177e4SLinus Torvalds * Intel PXA2xx internal register mapping. 881da177e4SLinus Torvalds * 891da177e4SLinus Torvalds * Note 1: not all PXA2xx variants implement all those addresses. 901da177e4SLinus Torvalds * 911da177e4SLinus Torvalds * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table 921da177e4SLinus Torvalds * and cache flush area. 931da177e4SLinus Torvalds */ 941da177e4SLinus Torvalds static struct map_desc standard_io_desc[] __initdata = { 956f9182ebSDeepak Saxena { /* Devs */ 966f9182ebSDeepak Saxena .virtual = 0xf2000000, 976f9182ebSDeepak Saxena .pfn = __phys_to_pfn(0x40000000), 986f9182ebSDeepak Saxena .length = 0x02000000, 996f9182ebSDeepak Saxena .type = MT_DEVICE 1006f9182ebSDeepak Saxena }, { /* Mem Ctl */ 1016f9182ebSDeepak Saxena .virtual = 0xf6000000, 1026f9182ebSDeepak Saxena .pfn = __phys_to_pfn(0x48000000), 1037664c400SRussell King .length = 0x00200000, 1046f9182ebSDeepak Saxena .type = MT_DEVICE 1056f9182ebSDeepak Saxena }, { /* Camera */ 1066f9182ebSDeepak Saxena .virtual = 0xfa000000, 1076f9182ebSDeepak Saxena .pfn = __phys_to_pfn(0x50000000), 1086f9182ebSDeepak Saxena .length = 0x00100000, 1096f9182ebSDeepak Saxena .type = MT_DEVICE 1106f9182ebSDeepak Saxena }, { /* IMem ctl */ 1116f9182ebSDeepak Saxena .virtual = 0xfe000000, 1126f9182ebSDeepak Saxena .pfn = __phys_to_pfn(0x58000000), 1136f9182ebSDeepak Saxena .length = 0x00100000, 1146f9182ebSDeepak Saxena .type = MT_DEVICE 1156f9182ebSDeepak Saxena }, { /* UNCACHED_PHYS_0 */ 1166f9182ebSDeepak Saxena .virtual = 0xff000000, 1176f9182ebSDeepak Saxena .pfn = __phys_to_pfn(0x00000000), 1186f9182ebSDeepak Saxena .length = 0x00100000, 1196f9182ebSDeepak Saxena .type = MT_DEVICE 1206f9182ebSDeepak Saxena } 1211da177e4SLinus Torvalds }; 1221da177e4SLinus Torvalds 1231da177e4SLinus Torvalds void __init pxa_map_io(void) 1241da177e4SLinus Torvalds { 1251da177e4SLinus Torvalds iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 1261da177e4SLinus Torvalds get_clk_frequency_khz(1); 1271da177e4SLinus Torvalds } 128