11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * linux/arch/arm/mach-pxa/generic.c 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Author: Nicolas Pitre 51da177e4SLinus Torvalds * Created: Jun 15, 2001 61da177e4SLinus Torvalds * Copyright: MontaVista Software Inc. 71da177e4SLinus Torvalds * 81da177e4SLinus Torvalds * Code common to all PXA machines. 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify 111da177e4SLinus Torvalds * it under the terms of the GNU General Public License version 2 as 121da177e4SLinus Torvalds * published by the Free Software Foundation. 131da177e4SLinus Torvalds * 141da177e4SLinus Torvalds * Since this file should be linked before any other machine specific file, 151da177e4SLinus Torvalds * the __initcall() here will be executed first. This serves as default 161da177e4SLinus Torvalds * initialization stuff for PXA machines which can be overridden later if 171da177e4SLinus Torvalds * need be. 181da177e4SLinus Torvalds */ 192f8163baSRussell King #include <linux/gpio.h> 201da177e4SLinus Torvalds #include <linux/module.h> 211da177e4SLinus Torvalds #include <linux/kernel.h> 221da177e4SLinus Torvalds #include <linux/init.h> 231da177e4SLinus Torvalds 24a09e64fbSRussell King #include <mach/hardware.h> 251da177e4SLinus Torvalds #include <asm/mach/map.h> 266769717dSEric Miao #include <asm/mach-types.h> 271da177e4SLinus Torvalds 28a38b1f60SRobert Jarzmik #include <mach/irqs.h> 29afd2fc02SRussell King #include <mach/reset.h> 30ad68bb9fSMarek Vasut #include <mach/smemc.h> 31a4553358SHaojian Zhuang #include <mach/pxa3xx-regs.h> 321da177e4SLinus Torvalds 331da177e4SLinus Torvalds #include "generic.h" 34a38b1f60SRobert Jarzmik #include <clocksource/pxa.h> 351da177e4SLinus Torvalds 3604fef228SEric Miao void clear_reset_status(unsigned int mask) 3704fef228SEric Miao { 3804fef228SEric Miao if (cpu_is_pxa2xx()) 3904fef228SEric Miao pxa2xx_clear_reset_status(mask); 40a4553358SHaojian Zhuang else { 41a4553358SHaojian Zhuang /* RESET_STATUS_* has a 1:1 mapping with ARSR */ 42a4553358SHaojian Zhuang ARSR = mask; 43a4553358SHaojian Zhuang } 4404fef228SEric Miao } 4504fef228SEric Miao 466769717dSEric Miao unsigned long get_clock_tick_rate(void) 476769717dSEric Miao { 486769717dSEric Miao unsigned long clock_tick_rate; 496769717dSEric Miao 506769717dSEric Miao if (cpu_is_pxa25x()) 516769717dSEric Miao clock_tick_rate = 3686400; 526769717dSEric Miao else if (machine_is_mainstone()) 536769717dSEric Miao clock_tick_rate = 3249600; 546769717dSEric Miao else 556769717dSEric Miao clock_tick_rate = 3250000; 566769717dSEric Miao 576769717dSEric Miao return clock_tick_rate; 586769717dSEric Miao } 596769717dSEric Miao EXPORT_SYMBOL(get_clock_tick_rate); 606769717dSEric Miao 611da177e4SLinus Torvalds /* 62a38b1f60SRobert Jarzmik * For non device-tree builds, keep legacy timer init 63a38b1f60SRobert Jarzmik */ 643d3c6a5fSArnd Bergmann void __init pxa_timer_init(void) 65a38b1f60SRobert Jarzmik { 66*5e1d0128SRobert Jarzmik if (cpu_is_pxa25x()) 67*5e1d0128SRobert Jarzmik pxa25x_clocks_init(); 68*5e1d0128SRobert Jarzmik if (cpu_is_pxa27x()) 69*5e1d0128SRobert Jarzmik pxa27x_clocks_init(); 70a38b1f60SRobert Jarzmik pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000), 71a38b1f60SRobert Jarzmik get_clock_tick_rate()); 72a38b1f60SRobert Jarzmik } 73a38b1f60SRobert Jarzmik 74a38b1f60SRobert Jarzmik /* 7515a40333SRussell King * Get the clock frequency as reflected by CCCR and the turbo flag. 7615a40333SRussell King * We assume these values have been applied via a fcs. 7715a40333SRussell King * If info is not 0 we also display the current settings. 7815a40333SRussell King */ 7915a40333SRussell King unsigned int get_clk_frequency_khz(int info) 8015a40333SRussell King { 810ffcbfd5SEric Miao if (cpu_is_pxa25x()) 8215a40333SRussell King return pxa25x_get_clk_frequency_khz(info); 832c8086a5Seric miao else if (cpu_is_pxa27x()) 8415a40333SRussell King return pxa27x_get_clk_frequency_khz(info); 85ecf89b8aSHaojian Zhuang return 0; 8615a40333SRussell King } 8715a40333SRussell King EXPORT_SYMBOL(get_clk_frequency_khz); 8815a40333SRussell King 8915a40333SRussell King /* 901da177e4SLinus Torvalds * Intel PXA2xx internal register mapping. 911da177e4SLinus Torvalds * 92851982c1SMarek Vasut * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table 931da177e4SLinus Torvalds * and cache flush area. 941da177e4SLinus Torvalds */ 95851982c1SMarek Vasut static struct map_desc common_io_desc[] __initdata = { 966f9182ebSDeepak Saxena { /* Devs */ 970e32986cSLaurent Pinchart .virtual = (unsigned long)PERIPH_VIRT, 980e32986cSLaurent Pinchart .pfn = __phys_to_pfn(PERIPH_PHYS), 990e32986cSLaurent Pinchart .length = PERIPH_SIZE, 1006f9182ebSDeepak Saxena .type = MT_DEVICE 1016f9182ebSDeepak Saxena } 1021da177e4SLinus Torvalds }; 1031da177e4SLinus Torvalds 1041da177e4SLinus Torvalds void __init pxa_map_io(void) 1051da177e4SLinus Torvalds { 1062111667bSAndrew Ruder debug_ll_io_init(); 107851982c1SMarek Vasut iotable_init(ARRAY_AND_SIZE(common_io_desc)); 1081da177e4SLinus Torvalds } 109