xref: /linux/arch/arm/mach-pxa/devices.c (revision d5aeee8cb28317ef608ecac421abc4d986d585d2) 
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/spi/pxa2xx_spi.h>
7 #include <linux/i2c/pxa-i2c.h>
8 
9 #include <asm/pmu.h>
10 #include <mach/udc.h>
11 #include <mach/pxa3xx-u2d.h>
12 #include <mach/pxafb.h>
13 #include <mach/mmc.h>
14 #include <mach/irda.h>
15 #include <mach/irqs.h>
16 #include <mach/ohci.h>
17 #include <plat/pxa27x_keypad.h>
18 #include <mach/camera.h>
19 #include <mach/audio.h>
20 #include <mach/hardware.h>
21 #include <plat/pxa3xx_nand.h>
22 
23 #include "devices.h"
24 #include "generic.h"
25 
26 void __init pxa_register_device(struct platform_device *dev, void *data)
27 {
28 	int ret;
29 
30 	dev->dev.platform_data = data;
31 
32 	ret = platform_device_register(dev);
33 	if (ret)
34 		dev_err(&dev->dev, "unable to register device: %d\n", ret);
35 }
36 
37 static struct resource pxa_resource_pmu = {
38 	.start	= IRQ_PMU,
39 	.end	= IRQ_PMU,
40 	.flags	= IORESOURCE_IRQ,
41 };
42 
43 struct platform_device pxa_device_pmu = {
44 	.name		= "arm-pmu",
45 	.id		= ARM_PMU_DEVICE_CPU,
46 	.resource	= &pxa_resource_pmu,
47 	.num_resources	= 1,
48 };
49 
50 static struct resource pxamci_resources[] = {
51 	[0] = {
52 		.start	= 0x41100000,
53 		.end	= 0x41100fff,
54 		.flags	= IORESOURCE_MEM,
55 	},
56 	[1] = {
57 		.start	= IRQ_MMC,
58 		.end	= IRQ_MMC,
59 		.flags	= IORESOURCE_IRQ,
60 	},
61 	[2] = {
62 		.start	= 21,
63 		.end	= 21,
64 		.flags	= IORESOURCE_DMA,
65 	},
66 	[3] = {
67 		.start	= 22,
68 		.end	= 22,
69 		.flags	= IORESOURCE_DMA,
70 	},
71 };
72 
73 static u64 pxamci_dmamask = 0xffffffffUL;
74 
75 struct platform_device pxa_device_mci = {
76 	.name		= "pxa2xx-mci",
77 	.id		= 0,
78 	.dev		= {
79 		.dma_mask = &pxamci_dmamask,
80 		.coherent_dma_mask = 0xffffffff,
81 	},
82 	.num_resources	= ARRAY_SIZE(pxamci_resources),
83 	.resource	= pxamci_resources,
84 };
85 
86 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
87 {
88 	pxa_register_device(&pxa_device_mci, info);
89 }
90 
91 
92 static struct pxa2xx_udc_mach_info pxa_udc_info = {
93 	.gpio_pullup = -1,
94 };
95 
96 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
97 {
98 	memcpy(&pxa_udc_info, info, sizeof *info);
99 }
100 
101 static struct resource pxa2xx_udc_resources[] = {
102 	[0] = {
103 		.start	= 0x40600000,
104 		.end	= 0x4060ffff,
105 		.flags	= IORESOURCE_MEM,
106 	},
107 	[1] = {
108 		.start	= IRQ_USB,
109 		.end	= IRQ_USB,
110 		.flags	= IORESOURCE_IRQ,
111 	},
112 };
113 
114 static u64 udc_dma_mask = ~(u32)0;
115 
116 struct platform_device pxa25x_device_udc = {
117 	.name		= "pxa25x-udc",
118 	.id		= -1,
119 	.resource	= pxa2xx_udc_resources,
120 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
121 	.dev		=  {
122 		.platform_data	= &pxa_udc_info,
123 		.dma_mask	= &udc_dma_mask,
124 	}
125 };
126 
127 struct platform_device pxa27x_device_udc = {
128 	.name		= "pxa27x-udc",
129 	.id		= -1,
130 	.resource	= pxa2xx_udc_resources,
131 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
132 	.dev		=  {
133 		.platform_data	= &pxa_udc_info,
134 		.dma_mask	= &udc_dma_mask,
135 	}
136 };
137 
138 #ifdef CONFIG_PXA3xx
139 static struct resource pxa3xx_u2d_resources[] = {
140 	[0] = {
141 		.start	= 0x54100000,
142 		.end	= 0x54100fff,
143 		.flags	= IORESOURCE_MEM,
144 	},
145 	[1] = {
146 		.start	= IRQ_USB2,
147 		.end	= IRQ_USB2,
148 		.flags	= IORESOURCE_IRQ,
149 	},
150 };
151 
152 struct platform_device pxa3xx_device_u2d = {
153 	.name		= "pxa3xx-u2d",
154 	.id		= -1,
155 	.resource	= pxa3xx_u2d_resources,
156 	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
157 };
158 
159 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
160 {
161 	pxa_register_device(&pxa3xx_device_u2d, info);
162 }
163 #endif /* CONFIG_PXA3xx */
164 
165 static struct resource pxafb_resources[] = {
166 	[0] = {
167 		.start	= 0x44000000,
168 		.end	= 0x4400ffff,
169 		.flags	= IORESOURCE_MEM,
170 	},
171 	[1] = {
172 		.start	= IRQ_LCD,
173 		.end	= IRQ_LCD,
174 		.flags	= IORESOURCE_IRQ,
175 	},
176 };
177 
178 static u64 fb_dma_mask = ~(u64)0;
179 
180 struct platform_device pxa_device_fb = {
181 	.name		= "pxa2xx-fb",
182 	.id		= -1,
183 	.dev		= {
184 		.dma_mask	= &fb_dma_mask,
185 		.coherent_dma_mask = 0xffffffff,
186 	},
187 	.num_resources	= ARRAY_SIZE(pxafb_resources),
188 	.resource	= pxafb_resources,
189 };
190 
191 void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
192 {
193 	pxa_device_fb.dev.parent = parent;
194 	pxa_register_device(&pxa_device_fb, info);
195 }
196 
197 static struct resource pxa_resource_ffuart[] = {
198 	{
199 		.start	= 0x40100000,
200 		.end	= 0x40100023,
201 		.flags	= IORESOURCE_MEM,
202 	}, {
203 		.start	= IRQ_FFUART,
204 		.end	= IRQ_FFUART,
205 		.flags	= IORESOURCE_IRQ,
206 	}
207 };
208 
209 struct platform_device pxa_device_ffuart = {
210 	.name		= "pxa2xx-uart",
211 	.id		= 0,
212 	.resource	= pxa_resource_ffuart,
213 	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
214 };
215 
216 void __init pxa_set_ffuart_info(void *info)
217 {
218 	pxa_register_device(&pxa_device_ffuart, info);
219 }
220 
221 static struct resource pxa_resource_btuart[] = {
222 	{
223 		.start	= 0x40200000,
224 		.end	= 0x40200023,
225 		.flags	= IORESOURCE_MEM,
226 	}, {
227 		.start	= IRQ_BTUART,
228 		.end	= IRQ_BTUART,
229 		.flags	= IORESOURCE_IRQ,
230 	}
231 };
232 
233 struct platform_device pxa_device_btuart = {
234 	.name		= "pxa2xx-uart",
235 	.id		= 1,
236 	.resource	= pxa_resource_btuart,
237 	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
238 };
239 
240 void __init pxa_set_btuart_info(void *info)
241 {
242 	pxa_register_device(&pxa_device_btuart, info);
243 }
244 
245 static struct resource pxa_resource_stuart[] = {
246 	{
247 		.start	= 0x40700000,
248 		.end	= 0x40700023,
249 		.flags	= IORESOURCE_MEM,
250 	}, {
251 		.start	= IRQ_STUART,
252 		.end	= IRQ_STUART,
253 		.flags	= IORESOURCE_IRQ,
254 	}
255 };
256 
257 struct platform_device pxa_device_stuart = {
258 	.name		= "pxa2xx-uart",
259 	.id		= 2,
260 	.resource	= pxa_resource_stuart,
261 	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
262 };
263 
264 void __init pxa_set_stuart_info(void *info)
265 {
266 	pxa_register_device(&pxa_device_stuart, info);
267 }
268 
269 static struct resource pxa_resource_hwuart[] = {
270 	{
271 		.start	= 0x41600000,
272 		.end	= 0x4160002F,
273 		.flags	= IORESOURCE_MEM,
274 	}, {
275 		.start	= IRQ_HWUART,
276 		.end	= IRQ_HWUART,
277 		.flags	= IORESOURCE_IRQ,
278 	}
279 };
280 
281 struct platform_device pxa_device_hwuart = {
282 	.name		= "pxa2xx-uart",
283 	.id		= 3,
284 	.resource	= pxa_resource_hwuart,
285 	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
286 };
287 
288 void __init pxa_set_hwuart_info(void *info)
289 {
290 	if (cpu_is_pxa255())
291 		pxa_register_device(&pxa_device_hwuart, info);
292 	else
293 		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
294 }
295 
296 static struct resource pxai2c_resources[] = {
297 	{
298 		.start	= 0x40301680,
299 		.end	= 0x403016a3,
300 		.flags	= IORESOURCE_MEM,
301 	}, {
302 		.start	= IRQ_I2C,
303 		.end	= IRQ_I2C,
304 		.flags	= IORESOURCE_IRQ,
305 	},
306 };
307 
308 struct platform_device pxa_device_i2c = {
309 	.name		= "pxa2xx-i2c",
310 	.id		= 0,
311 	.resource	= pxai2c_resources,
312 	.num_resources	= ARRAY_SIZE(pxai2c_resources),
313 };
314 
315 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
316 {
317 	pxa_register_device(&pxa_device_i2c, info);
318 }
319 
320 #ifdef CONFIG_PXA27x
321 static struct resource pxa27x_resources_i2c_power[] = {
322 	{
323 		.start	= 0x40f00180,
324 		.end	= 0x40f001a3,
325 		.flags	= IORESOURCE_MEM,
326 	}, {
327 		.start	= IRQ_PWRI2C,
328 		.end	= IRQ_PWRI2C,
329 		.flags	= IORESOURCE_IRQ,
330 	},
331 };
332 
333 struct platform_device pxa27x_device_i2c_power = {
334 	.name		= "pxa2xx-i2c",
335 	.id		= 1,
336 	.resource	= pxa27x_resources_i2c_power,
337 	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
338 };
339 #endif
340 
341 static struct resource pxai2s_resources[] = {
342 	{
343 		.start	= 0x40400000,
344 		.end	= 0x40400083,
345 		.flags	= IORESOURCE_MEM,
346 	}, {
347 		.start	= IRQ_I2S,
348 		.end	= IRQ_I2S,
349 		.flags	= IORESOURCE_IRQ,
350 	},
351 };
352 
353 struct platform_device pxa_device_i2s = {
354 	.name		= "pxa2xx-i2s",
355 	.id		= -1,
356 	.resource	= pxai2s_resources,
357 	.num_resources	= ARRAY_SIZE(pxai2s_resources),
358 };
359 
360 struct platform_device pxa_device_asoc_ssp1 = {
361 	.name		= "pxa-ssp-dai",
362 	.id		= 0,
363 };
364 
365 struct platform_device pxa_device_asoc_ssp2= {
366 	.name		= "pxa-ssp-dai",
367 	.id		= 1,
368 };
369 
370 struct platform_device pxa_device_asoc_ssp3 = {
371 	.name		= "pxa-ssp-dai",
372 	.id		= 2,
373 };
374 
375 struct platform_device pxa_device_asoc_ssp4 = {
376 	.name		= "pxa-ssp-dai",
377 	.id		= 3,
378 };
379 
380 struct platform_device pxa_device_asoc_platform = {
381 	.name		= "pxa-pcm-audio",
382 	.id		= -1,
383 };
384 
385 static u64 pxaficp_dmamask = ~(u32)0;
386 
387 struct platform_device pxa_device_ficp = {
388 	.name		= "pxa2xx-ir",
389 	.id		= -1,
390 	.dev		= {
391 		.dma_mask = &pxaficp_dmamask,
392 		.coherent_dma_mask = 0xffffffff,
393 	},
394 };
395 
396 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
397 {
398 	pxa_register_device(&pxa_device_ficp, info);
399 }
400 
401 static struct resource pxa_rtc_resources[] = {
402 	[0] = {
403 		.start  = 0x40900000,
404 		.end	= 0x40900000 + 0x3b,
405 		.flags  = IORESOURCE_MEM,
406 	},
407 	[1] = {
408 		.start  = IRQ_RTC1Hz,
409 		.end    = IRQ_RTC1Hz,
410 		.name	= "rtc 1Hz",
411 		.flags  = IORESOURCE_IRQ,
412 	},
413 	[2] = {
414 		.start  = IRQ_RTCAlrm,
415 		.end    = IRQ_RTCAlrm,
416 		.name	= "rtc alarm",
417 		.flags  = IORESOURCE_IRQ,
418 	},
419 };
420 
421 struct platform_device pxa_device_rtc = {
422 	.name		= "pxa-rtc",
423 	.id		= -1,
424 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
425 	.resource       = pxa_rtc_resources,
426 };
427 
428 static struct resource sa1100_rtc_resources[] = {
429 	{
430 		.start  = IRQ_RTC1Hz,
431 		.end    = IRQ_RTC1Hz,
432 		.name	= "rtc 1Hz",
433 		.flags  = IORESOURCE_IRQ,
434 	}, {
435 		.start  = IRQ_RTCAlrm,
436 		.end    = IRQ_RTCAlrm,
437 		.name	= "rtc alarm",
438 		.flags  = IORESOURCE_IRQ,
439 	},
440 };
441 
442 struct platform_device sa1100_device_rtc = {
443 	.name		= "sa1100-rtc",
444 	.id		= -1,
445 	.num_resources	= ARRAY_SIZE(sa1100_rtc_resources),
446 	.resource	= sa1100_rtc_resources,
447 };
448 
449 static struct resource pxa_ac97_resources[] = {
450 	[0] = {
451 		.start  = 0x40500000,
452 		.end	= 0x40500000 + 0xfff,
453 		.flags  = IORESOURCE_MEM,
454 	},
455 	[1] = {
456 		.start  = IRQ_AC97,
457 		.end    = IRQ_AC97,
458 		.flags  = IORESOURCE_IRQ,
459 	},
460 };
461 
462 static u64 pxa_ac97_dmamask = 0xffffffffUL;
463 
464 struct platform_device pxa_device_ac97 = {
465 	.name           = "pxa2xx-ac97",
466 	.id             = -1,
467 	.dev            = {
468 		.dma_mask = &pxa_ac97_dmamask,
469 		.coherent_dma_mask = 0xffffffff,
470 	},
471 	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
472 	.resource       = pxa_ac97_resources,
473 };
474 
475 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
476 {
477 	pxa_register_device(&pxa_device_ac97, ops);
478 }
479 
480 #ifdef CONFIG_PXA25x
481 
482 static struct resource pxa25x_resource_pwm0[] = {
483 	[0] = {
484 		.start	= 0x40b00000,
485 		.end	= 0x40b0000f,
486 		.flags	= IORESOURCE_MEM,
487 	},
488 };
489 
490 struct platform_device pxa25x_device_pwm0 = {
491 	.name		= "pxa25x-pwm",
492 	.id		= 0,
493 	.resource	= pxa25x_resource_pwm0,
494 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
495 };
496 
497 static struct resource pxa25x_resource_pwm1[] = {
498 	[0] = {
499 		.start	= 0x40c00000,
500 		.end	= 0x40c0000f,
501 		.flags	= IORESOURCE_MEM,
502 	},
503 };
504 
505 struct platform_device pxa25x_device_pwm1 = {
506 	.name		= "pxa25x-pwm",
507 	.id		= 1,
508 	.resource	= pxa25x_resource_pwm1,
509 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
510 };
511 
512 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
513 
514 static struct resource pxa25x_resource_ssp[] = {
515 	[0] = {
516 		.start	= 0x41000000,
517 		.end	= 0x4100001f,
518 		.flags	= IORESOURCE_MEM,
519 	},
520 	[1] = {
521 		.start	= IRQ_SSP,
522 		.end	= IRQ_SSP,
523 		.flags	= IORESOURCE_IRQ,
524 	},
525 	[2] = {
526 		/* DRCMR for RX */
527 		.start	= 13,
528 		.end	= 13,
529 		.flags	= IORESOURCE_DMA,
530 	},
531 	[3] = {
532 		/* DRCMR for TX */
533 		.start	= 14,
534 		.end	= 14,
535 		.flags	= IORESOURCE_DMA,
536 	},
537 };
538 
539 struct platform_device pxa25x_device_ssp = {
540 	.name		= "pxa25x-ssp",
541 	.id		= 0,
542 	.dev		= {
543 		.dma_mask = &pxa25x_ssp_dma_mask,
544 		.coherent_dma_mask = DMA_BIT_MASK(32),
545 	},
546 	.resource	= pxa25x_resource_ssp,
547 	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
548 };
549 
550 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
551 
552 static struct resource pxa25x_resource_nssp[] = {
553 	[0] = {
554 		.start	= 0x41400000,
555 		.end	= 0x4140002f,
556 		.flags	= IORESOURCE_MEM,
557 	},
558 	[1] = {
559 		.start	= IRQ_NSSP,
560 		.end	= IRQ_NSSP,
561 		.flags	= IORESOURCE_IRQ,
562 	},
563 	[2] = {
564 		/* DRCMR for RX */
565 		.start	= 15,
566 		.end	= 15,
567 		.flags	= IORESOURCE_DMA,
568 	},
569 	[3] = {
570 		/* DRCMR for TX */
571 		.start	= 16,
572 		.end	= 16,
573 		.flags	= IORESOURCE_DMA,
574 	},
575 };
576 
577 struct platform_device pxa25x_device_nssp = {
578 	.name		= "pxa25x-nssp",
579 	.id		= 1,
580 	.dev		= {
581 		.dma_mask = &pxa25x_nssp_dma_mask,
582 		.coherent_dma_mask = DMA_BIT_MASK(32),
583 	},
584 	.resource	= pxa25x_resource_nssp,
585 	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
586 };
587 
588 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
589 
590 static struct resource pxa25x_resource_assp[] = {
591 	[0] = {
592 		.start	= 0x41500000,
593 		.end	= 0x4150002f,
594 		.flags	= IORESOURCE_MEM,
595 	},
596 	[1] = {
597 		.start	= IRQ_ASSP,
598 		.end	= IRQ_ASSP,
599 		.flags	= IORESOURCE_IRQ,
600 	},
601 	[2] = {
602 		/* DRCMR for RX */
603 		.start	= 23,
604 		.end	= 23,
605 		.flags	= IORESOURCE_DMA,
606 	},
607 	[3] = {
608 		/* DRCMR for TX */
609 		.start	= 24,
610 		.end	= 24,
611 		.flags	= IORESOURCE_DMA,
612 	},
613 };
614 
615 struct platform_device pxa25x_device_assp = {
616 	/* ASSP is basically equivalent to NSSP */
617 	.name		= "pxa25x-nssp",
618 	.id		= 2,
619 	.dev		= {
620 		.dma_mask = &pxa25x_assp_dma_mask,
621 		.coherent_dma_mask = DMA_BIT_MASK(32),
622 	},
623 	.resource	= pxa25x_resource_assp,
624 	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
625 };
626 #endif /* CONFIG_PXA25x */
627 
628 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
629 static struct resource pxa27x_resource_camera[] = {
630 	[0] = {
631 		.start	= 0x50000000,
632 		.end	= 0x50000fff,
633 		.flags	= IORESOURCE_MEM,
634 	},
635 	[1] = {
636 		.start	= IRQ_CAMERA,
637 		.end	= IRQ_CAMERA,
638 		.flags	= IORESOURCE_IRQ,
639 	},
640 };
641 
642 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
643 
644 static struct platform_device pxa27x_device_camera = {
645 	.name		= "pxa27x-camera",
646 	.id		= 0, /* This is used to put cameras on this interface */
647 	.dev		= {
648 		.dma_mask      		= &pxa27x_dma_mask_camera,
649 		.coherent_dma_mask	= 0xffffffff,
650 	},
651 	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
652 	.resource	= pxa27x_resource_camera,
653 };
654 
655 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
656 {
657 	pxa_register_device(&pxa27x_device_camera, info);
658 }
659 
660 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
661 
662 static struct resource pxa27x_resource_ohci[] = {
663 	[0] = {
664 		.start  = 0x4C000000,
665 		.end    = 0x4C00ff6f,
666 		.flags  = IORESOURCE_MEM,
667 	},
668 	[1] = {
669 		.start  = IRQ_USBH1,
670 		.end    = IRQ_USBH1,
671 		.flags  = IORESOURCE_IRQ,
672 	},
673 };
674 
675 struct platform_device pxa27x_device_ohci = {
676 	.name		= "pxa27x-ohci",
677 	.id		= -1,
678 	.dev		= {
679 		.dma_mask = &pxa27x_ohci_dma_mask,
680 		.coherent_dma_mask = DMA_BIT_MASK(32),
681 	},
682 	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
683 	.resource       = pxa27x_resource_ohci,
684 };
685 
686 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
687 {
688 	pxa_register_device(&pxa27x_device_ohci, info);
689 }
690 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
691 
692 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
693 static struct resource pxa27x_resource_keypad[] = {
694 	[0] = {
695 		.start	= 0x41500000,
696 		.end	= 0x4150004c,
697 		.flags	= IORESOURCE_MEM,
698 	},
699 	[1] = {
700 		.start	= IRQ_KEYPAD,
701 		.end	= IRQ_KEYPAD,
702 		.flags	= IORESOURCE_IRQ,
703 	},
704 };
705 
706 struct platform_device pxa27x_device_keypad = {
707 	.name		= "pxa27x-keypad",
708 	.id		= -1,
709 	.resource	= pxa27x_resource_keypad,
710 	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
711 };
712 
713 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
714 {
715 	pxa_register_device(&pxa27x_device_keypad, info);
716 }
717 
718 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
719 
720 static struct resource pxa27x_resource_ssp1[] = {
721 	[0] = {
722 		.start	= 0x41000000,
723 		.end	= 0x4100003f,
724 		.flags	= IORESOURCE_MEM,
725 	},
726 	[1] = {
727 		.start	= IRQ_SSP,
728 		.end	= IRQ_SSP,
729 		.flags	= IORESOURCE_IRQ,
730 	},
731 	[2] = {
732 		/* DRCMR for RX */
733 		.start	= 13,
734 		.end	= 13,
735 		.flags	= IORESOURCE_DMA,
736 	},
737 	[3] = {
738 		/* DRCMR for TX */
739 		.start	= 14,
740 		.end	= 14,
741 		.flags	= IORESOURCE_DMA,
742 	},
743 };
744 
745 struct platform_device pxa27x_device_ssp1 = {
746 	.name		= "pxa27x-ssp",
747 	.id		= 0,
748 	.dev		= {
749 		.dma_mask = &pxa27x_ssp1_dma_mask,
750 		.coherent_dma_mask = DMA_BIT_MASK(32),
751 	},
752 	.resource	= pxa27x_resource_ssp1,
753 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
754 };
755 
756 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
757 
758 static struct resource pxa27x_resource_ssp2[] = {
759 	[0] = {
760 		.start	= 0x41700000,
761 		.end	= 0x4170003f,
762 		.flags	= IORESOURCE_MEM,
763 	},
764 	[1] = {
765 		.start	= IRQ_SSP2,
766 		.end	= IRQ_SSP2,
767 		.flags	= IORESOURCE_IRQ,
768 	},
769 	[2] = {
770 		/* DRCMR for RX */
771 		.start	= 15,
772 		.end	= 15,
773 		.flags	= IORESOURCE_DMA,
774 	},
775 	[3] = {
776 		/* DRCMR for TX */
777 		.start	= 16,
778 		.end	= 16,
779 		.flags	= IORESOURCE_DMA,
780 	},
781 };
782 
783 struct platform_device pxa27x_device_ssp2 = {
784 	.name		= "pxa27x-ssp",
785 	.id		= 1,
786 	.dev		= {
787 		.dma_mask = &pxa27x_ssp2_dma_mask,
788 		.coherent_dma_mask = DMA_BIT_MASK(32),
789 	},
790 	.resource	= pxa27x_resource_ssp2,
791 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
792 };
793 
794 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
795 
796 static struct resource pxa27x_resource_ssp3[] = {
797 	[0] = {
798 		.start	= 0x41900000,
799 		.end	= 0x4190003f,
800 		.flags	= IORESOURCE_MEM,
801 	},
802 	[1] = {
803 		.start	= IRQ_SSP3,
804 		.end	= IRQ_SSP3,
805 		.flags	= IORESOURCE_IRQ,
806 	},
807 	[2] = {
808 		/* DRCMR for RX */
809 		.start	= 66,
810 		.end	= 66,
811 		.flags	= IORESOURCE_DMA,
812 	},
813 	[3] = {
814 		/* DRCMR for TX */
815 		.start	= 67,
816 		.end	= 67,
817 		.flags	= IORESOURCE_DMA,
818 	},
819 };
820 
821 struct platform_device pxa27x_device_ssp3 = {
822 	.name		= "pxa27x-ssp",
823 	.id		= 2,
824 	.dev		= {
825 		.dma_mask = &pxa27x_ssp3_dma_mask,
826 		.coherent_dma_mask = DMA_BIT_MASK(32),
827 	},
828 	.resource	= pxa27x_resource_ssp3,
829 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
830 };
831 
832 static struct resource pxa27x_resource_pwm0[] = {
833 	[0] = {
834 		.start	= 0x40b00000,
835 		.end	= 0x40b0001f,
836 		.flags	= IORESOURCE_MEM,
837 	},
838 };
839 
840 struct platform_device pxa27x_device_pwm0 = {
841 	.name		= "pxa27x-pwm",
842 	.id		= 0,
843 	.resource	= pxa27x_resource_pwm0,
844 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
845 };
846 
847 static struct resource pxa27x_resource_pwm1[] = {
848 	[0] = {
849 		.start	= 0x40c00000,
850 		.end	= 0x40c0001f,
851 		.flags	= IORESOURCE_MEM,
852 	},
853 };
854 
855 struct platform_device pxa27x_device_pwm1 = {
856 	.name		= "pxa27x-pwm",
857 	.id		= 1,
858 	.resource	= pxa27x_resource_pwm1,
859 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
860 };
861 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
862 
863 #ifdef CONFIG_PXA3xx
864 static struct resource pxa3xx_resources_mci2[] = {
865 	[0] = {
866 		.start	= 0x42000000,
867 		.end	= 0x42000fff,
868 		.flags	= IORESOURCE_MEM,
869 	},
870 	[1] = {
871 		.start	= IRQ_MMC2,
872 		.end	= IRQ_MMC2,
873 		.flags	= IORESOURCE_IRQ,
874 	},
875 	[2] = {
876 		.start	= 93,
877 		.end	= 93,
878 		.flags	= IORESOURCE_DMA,
879 	},
880 	[3] = {
881 		.start	= 94,
882 		.end	= 94,
883 		.flags	= IORESOURCE_DMA,
884 	},
885 };
886 
887 struct platform_device pxa3xx_device_mci2 = {
888 	.name		= "pxa2xx-mci",
889 	.id		= 1,
890 	.dev		= {
891 		.dma_mask = &pxamci_dmamask,
892 		.coherent_dma_mask =	0xffffffff,
893 	},
894 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
895 	.resource	= pxa3xx_resources_mci2,
896 };
897 
898 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
899 {
900 	pxa_register_device(&pxa3xx_device_mci2, info);
901 }
902 
903 static struct resource pxa3xx_resources_mci3[] = {
904 	[0] = {
905 		.start	= 0x42500000,
906 		.end	= 0x42500fff,
907 		.flags	= IORESOURCE_MEM,
908 	},
909 	[1] = {
910 		.start	= IRQ_MMC3,
911 		.end	= IRQ_MMC3,
912 		.flags	= IORESOURCE_IRQ,
913 	},
914 	[2] = {
915 		.start	= 100,
916 		.end	= 100,
917 		.flags	= IORESOURCE_DMA,
918 	},
919 	[3] = {
920 		.start	= 101,
921 		.end	= 101,
922 		.flags	= IORESOURCE_DMA,
923 	},
924 };
925 
926 struct platform_device pxa3xx_device_mci3 = {
927 	.name		= "pxa2xx-mci",
928 	.id		= 2,
929 	.dev		= {
930 		.dma_mask = &pxamci_dmamask,
931 		.coherent_dma_mask = 0xffffffff,
932 	},
933 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
934 	.resource	= pxa3xx_resources_mci3,
935 };
936 
937 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
938 {
939 	pxa_register_device(&pxa3xx_device_mci3, info);
940 }
941 
942 static struct resource pxa3xx_resources_gcu[] = {
943 	{
944 		.start	= 0x54000000,
945 		.end	= 0x54000fff,
946 		.flags	= IORESOURCE_MEM,
947 	},
948 	{
949 		.start	= IRQ_GCU,
950 		.end	= IRQ_GCU,
951 		.flags	= IORESOURCE_IRQ,
952 	},
953 };
954 
955 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
956 
957 struct platform_device pxa3xx_device_gcu = {
958 	.name		= "pxa3xx-gcu",
959 	.id		= -1,
960 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
961 	.resource	= pxa3xx_resources_gcu,
962 	.dev		= {
963 		.dma_mask = &pxa3xx_gcu_dmamask,
964 		.coherent_dma_mask = 0xffffffff,
965 	},
966 };
967 
968 #endif /* CONFIG_PXA3xx */
969 
970 #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
971 static struct resource pxa3xx_resources_i2c_power[] = {
972 	{
973 		.start  = 0x40f500c0,
974 		.end    = 0x40f500d3,
975 		.flags	= IORESOURCE_MEM,
976 	}, {
977 		.start	= IRQ_PWRI2C,
978 		.end	= IRQ_PWRI2C,
979 		.flags	= IORESOURCE_IRQ,
980 	},
981 };
982 
983 struct platform_device pxa3xx_device_i2c_power = {
984 	.name		= "pxa3xx-pwri2c",
985 	.id		= 1,
986 	.resource	= pxa3xx_resources_i2c_power,
987 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
988 };
989 
990 static struct resource pxa3xx_resources_nand[] = {
991 	[0] = {
992 		.start	= 0x43100000,
993 		.end	= 0x43100053,
994 		.flags	= IORESOURCE_MEM,
995 	},
996 	[1] = {
997 		.start	= IRQ_NAND,
998 		.end	= IRQ_NAND,
999 		.flags	= IORESOURCE_IRQ,
1000 	},
1001 	[2] = {
1002 		/* DRCMR for Data DMA */
1003 		.start	= 97,
1004 		.end	= 97,
1005 		.flags	= IORESOURCE_DMA,
1006 	},
1007 	[3] = {
1008 		/* DRCMR for Command DMA */
1009 		.start	= 99,
1010 		.end	= 99,
1011 		.flags	= IORESOURCE_DMA,
1012 	},
1013 };
1014 
1015 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1016 
1017 struct platform_device pxa3xx_device_nand = {
1018 	.name		= "pxa3xx-nand",
1019 	.id		= -1,
1020 	.dev		= {
1021 		.dma_mask = &pxa3xx_nand_dma_mask,
1022 		.coherent_dma_mask = DMA_BIT_MASK(32),
1023 	},
1024 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
1025 	.resource	= pxa3xx_resources_nand,
1026 };
1027 
1028 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1029 {
1030 	pxa_register_device(&pxa3xx_device_nand, info);
1031 }
1032 
1033 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1034 
1035 static struct resource pxa3xx_resource_ssp4[] = {
1036 	[0] = {
1037 		.start	= 0x41a00000,
1038 		.end	= 0x41a0003f,
1039 		.flags	= IORESOURCE_MEM,
1040 	},
1041 	[1] = {
1042 		.start	= IRQ_SSP4,
1043 		.end	= IRQ_SSP4,
1044 		.flags	= IORESOURCE_IRQ,
1045 	},
1046 	[2] = {
1047 		/* DRCMR for RX */
1048 		.start	= 2,
1049 		.end	= 2,
1050 		.flags	= IORESOURCE_DMA,
1051 	},
1052 	[3] = {
1053 		/* DRCMR for TX */
1054 		.start	= 3,
1055 		.end	= 3,
1056 		.flags	= IORESOURCE_DMA,
1057 	},
1058 };
1059 
1060 struct platform_device pxa3xx_device_ssp4 = {
1061 	/* PXA3xx SSP is basically equivalent to PXA27x */
1062 	.name		= "pxa27x-ssp",
1063 	.id		= 3,
1064 	.dev		= {
1065 		.dma_mask = &pxa3xx_ssp4_dma_mask,
1066 		.coherent_dma_mask = DMA_BIT_MASK(32),
1067 	},
1068 	.resource	= pxa3xx_resource_ssp4,
1069 	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1070 };
1071 #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1072 
1073 struct resource pxa_resource_gpio[] = {
1074 	{
1075 		.start	= 0x40e00000,
1076 		.end	= 0x40e0ffff,
1077 		.flags	= IORESOURCE_MEM,
1078 	}, {
1079 		.start	= IRQ_GPIO0,
1080 		.end	= IRQ_GPIO0,
1081 		.name	= "gpio0",
1082 		.flags	= IORESOURCE_IRQ,
1083 	}, {
1084 		.start	= IRQ_GPIO1,
1085 		.end	= IRQ_GPIO1,
1086 		.name	= "gpio1",
1087 		.flags	= IORESOURCE_IRQ,
1088 	}, {
1089 		.start	= IRQ_GPIO_2_x,
1090 		.end	= IRQ_GPIO_2_x,
1091 		.name	= "gpio_mux",
1092 		.flags	= IORESOURCE_IRQ,
1093 	},
1094 };
1095 
1096 struct platform_device pxa_device_gpio = {
1097 	.name		= "pxa-gpio",
1098 	.id		= -1,
1099 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1100 	.resource	= pxa_resource_gpio,
1101 };
1102 
1103 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1104  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1105 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1106 {
1107 	struct platform_device *pd;
1108 
1109 	pd = platform_device_alloc("pxa2xx-spi", id);
1110 	if (pd == NULL) {
1111 		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1112 		       id);
1113 		return;
1114 	}
1115 
1116 	pd->dev.platform_data = info;
1117 	platform_device_add(pd);
1118 }
1119