xref: /linux/arch/arm/mach-pxa/devices.c (revision bea15fd77ffa1338c293328b8c74a120be53e861) 
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/spi/pxa2xx_spi.h>
7 #include <linux/i2c/pxa-i2c.h>
8 
9 #include <asm/pmu.h>
10 #include <mach/udc.h>
11 #include <mach/pxa3xx-u2d.h>
12 #include <mach/pxafb.h>
13 #include <mach/mmc.h>
14 #include <mach/irda.h>
15 #include <mach/irqs.h>
16 #include <mach/ohci.h>
17 #include <plat/pxa27x_keypad.h>
18 #include <mach/camera.h>
19 #include <mach/audio.h>
20 #include <mach/hardware.h>
21 #include <plat/pxa3xx_nand.h>
22 
23 #include "devices.h"
24 #include "generic.h"
25 
26 void __init pxa_register_device(struct platform_device *dev, void *data)
27 {
28 	int ret;
29 
30 	dev->dev.platform_data = data;
31 
32 	ret = platform_device_register(dev);
33 	if (ret)
34 		dev_err(&dev->dev, "unable to register device: %d\n", ret);
35 }
36 
37 static struct resource pxa_resource_pmu = {
38 	.start	= IRQ_PMU,
39 	.end	= IRQ_PMU,
40 	.flags	= IORESOURCE_IRQ,
41 };
42 
43 struct platform_device pxa_device_pmu = {
44 	.name		= "arm-pmu",
45 	.id		= ARM_PMU_DEVICE_CPU,
46 	.resource	= &pxa_resource_pmu,
47 	.num_resources	= 1,
48 };
49 
50 static struct resource pxamci_resources[] = {
51 	[0] = {
52 		.start	= 0x41100000,
53 		.end	= 0x41100fff,
54 		.flags	= IORESOURCE_MEM,
55 	},
56 	[1] = {
57 		.start	= IRQ_MMC,
58 		.end	= IRQ_MMC,
59 		.flags	= IORESOURCE_IRQ,
60 	},
61 	[2] = {
62 		.start	= 21,
63 		.end	= 21,
64 		.flags	= IORESOURCE_DMA,
65 	},
66 	[3] = {
67 		.start	= 22,
68 		.end	= 22,
69 		.flags	= IORESOURCE_DMA,
70 	},
71 };
72 
73 static u64 pxamci_dmamask = 0xffffffffUL;
74 
75 struct platform_device pxa_device_mci = {
76 	.name		= "pxa2xx-mci",
77 	.id		= 0,
78 	.dev		= {
79 		.dma_mask = &pxamci_dmamask,
80 		.coherent_dma_mask = 0xffffffff,
81 	},
82 	.num_resources	= ARRAY_SIZE(pxamci_resources),
83 	.resource	= pxamci_resources,
84 };
85 
86 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
87 {
88 	pxa_register_device(&pxa_device_mci, info);
89 }
90 
91 
92 static struct pxa2xx_udc_mach_info pxa_udc_info = {
93 	.gpio_pullup = -1,
94 };
95 
96 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
97 {
98 	memcpy(&pxa_udc_info, info, sizeof *info);
99 }
100 
101 static struct resource pxa2xx_udc_resources[] = {
102 	[0] = {
103 		.start	= 0x40600000,
104 		.end	= 0x4060ffff,
105 		.flags	= IORESOURCE_MEM,
106 	},
107 	[1] = {
108 		.start	= IRQ_USB,
109 		.end	= IRQ_USB,
110 		.flags	= IORESOURCE_IRQ,
111 	},
112 };
113 
114 static u64 udc_dma_mask = ~(u32)0;
115 
116 struct platform_device pxa25x_device_udc = {
117 	.name		= "pxa25x-udc",
118 	.id		= -1,
119 	.resource	= pxa2xx_udc_resources,
120 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
121 	.dev		=  {
122 		.platform_data	= &pxa_udc_info,
123 		.dma_mask	= &udc_dma_mask,
124 	}
125 };
126 
127 struct platform_device pxa27x_device_udc = {
128 	.name		= "pxa27x-udc",
129 	.id		= -1,
130 	.resource	= pxa2xx_udc_resources,
131 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
132 	.dev		=  {
133 		.platform_data	= &pxa_udc_info,
134 		.dma_mask	= &udc_dma_mask,
135 	}
136 };
137 
138 #ifdef CONFIG_PXA3xx
139 static struct resource pxa3xx_u2d_resources[] = {
140 	[0] = {
141 		.start	= 0x54100000,
142 		.end	= 0x54100fff,
143 		.flags	= IORESOURCE_MEM,
144 	},
145 	[1] = {
146 		.start	= IRQ_USB2,
147 		.end	= IRQ_USB2,
148 		.flags	= IORESOURCE_IRQ,
149 	},
150 };
151 
152 struct platform_device pxa3xx_device_u2d = {
153 	.name		= "pxa3xx-u2d",
154 	.id		= -1,
155 	.resource	= pxa3xx_u2d_resources,
156 	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
157 };
158 
159 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
160 {
161 	pxa_register_device(&pxa3xx_device_u2d, info);
162 }
163 #endif /* CONFIG_PXA3xx */
164 
165 static struct resource pxafb_resources[] = {
166 	[0] = {
167 		.start	= 0x44000000,
168 		.end	= 0x4400ffff,
169 		.flags	= IORESOURCE_MEM,
170 	},
171 	[1] = {
172 		.start	= IRQ_LCD,
173 		.end	= IRQ_LCD,
174 		.flags	= IORESOURCE_IRQ,
175 	},
176 };
177 
178 static u64 fb_dma_mask = ~(u64)0;
179 
180 struct platform_device pxa_device_fb = {
181 	.name		= "pxa2xx-fb",
182 	.id		= -1,
183 	.dev		= {
184 		.dma_mask	= &fb_dma_mask,
185 		.coherent_dma_mask = 0xffffffff,
186 	},
187 	.num_resources	= ARRAY_SIZE(pxafb_resources),
188 	.resource	= pxafb_resources,
189 };
190 
191 void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
192 {
193 	pxa_device_fb.dev.parent = parent;
194 	pxa_register_device(&pxa_device_fb, info);
195 }
196 
197 static struct resource pxa_resource_ffuart[] = {
198 	{
199 		.start	= 0x40100000,
200 		.end	= 0x40100023,
201 		.flags	= IORESOURCE_MEM,
202 	}, {
203 		.start	= IRQ_FFUART,
204 		.end	= IRQ_FFUART,
205 		.flags	= IORESOURCE_IRQ,
206 	}
207 };
208 
209 struct platform_device pxa_device_ffuart = {
210 	.name		= "pxa2xx-uart",
211 	.id		= 0,
212 	.resource	= pxa_resource_ffuart,
213 	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
214 };
215 
216 void __init pxa_set_ffuart_info(void *info)
217 {
218 	pxa_register_device(&pxa_device_ffuart, info);
219 }
220 
221 static struct resource pxa_resource_btuart[] = {
222 	{
223 		.start	= 0x40200000,
224 		.end	= 0x40200023,
225 		.flags	= IORESOURCE_MEM,
226 	}, {
227 		.start	= IRQ_BTUART,
228 		.end	= IRQ_BTUART,
229 		.flags	= IORESOURCE_IRQ,
230 	}
231 };
232 
233 struct platform_device pxa_device_btuart = {
234 	.name		= "pxa2xx-uart",
235 	.id		= 1,
236 	.resource	= pxa_resource_btuart,
237 	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
238 };
239 
240 void __init pxa_set_btuart_info(void *info)
241 {
242 	pxa_register_device(&pxa_device_btuart, info);
243 }
244 
245 static struct resource pxa_resource_stuart[] = {
246 	{
247 		.start	= 0x40700000,
248 		.end	= 0x40700023,
249 		.flags	= IORESOURCE_MEM,
250 	}, {
251 		.start	= IRQ_STUART,
252 		.end	= IRQ_STUART,
253 		.flags	= IORESOURCE_IRQ,
254 	}
255 };
256 
257 struct platform_device pxa_device_stuart = {
258 	.name		= "pxa2xx-uart",
259 	.id		= 2,
260 	.resource	= pxa_resource_stuart,
261 	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
262 };
263 
264 void __init pxa_set_stuart_info(void *info)
265 {
266 	pxa_register_device(&pxa_device_stuart, info);
267 }
268 
269 static struct resource pxa_resource_hwuart[] = {
270 	{
271 		.start	= 0x41600000,
272 		.end	= 0x4160002F,
273 		.flags	= IORESOURCE_MEM,
274 	}, {
275 		.start	= IRQ_HWUART,
276 		.end	= IRQ_HWUART,
277 		.flags	= IORESOURCE_IRQ,
278 	}
279 };
280 
281 struct platform_device pxa_device_hwuart = {
282 	.name		= "pxa2xx-uart",
283 	.id		= 3,
284 	.resource	= pxa_resource_hwuart,
285 	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
286 };
287 
288 void __init pxa_set_hwuart_info(void *info)
289 {
290 	if (cpu_is_pxa255())
291 		pxa_register_device(&pxa_device_hwuart, info);
292 	else
293 		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
294 }
295 
296 static struct resource pxai2c_resources[] = {
297 	{
298 		.start	= 0x40301680,
299 		.end	= 0x403016a3,
300 		.flags	= IORESOURCE_MEM,
301 	}, {
302 		.start	= IRQ_I2C,
303 		.end	= IRQ_I2C,
304 		.flags	= IORESOURCE_IRQ,
305 	},
306 };
307 
308 struct platform_device pxa_device_i2c = {
309 	.name		= "pxa2xx-i2c",
310 	.id		= 0,
311 	.resource	= pxai2c_resources,
312 	.num_resources	= ARRAY_SIZE(pxai2c_resources),
313 };
314 
315 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
316 {
317 	pxa_register_device(&pxa_device_i2c, info);
318 }
319 
320 #ifdef CONFIG_PXA27x
321 static struct resource pxa27x_resources_i2c_power[] = {
322 	{
323 		.start	= 0x40f00180,
324 		.end	= 0x40f001a3,
325 		.flags	= IORESOURCE_MEM,
326 	}, {
327 		.start	= IRQ_PWRI2C,
328 		.end	= IRQ_PWRI2C,
329 		.flags	= IORESOURCE_IRQ,
330 	},
331 };
332 
333 struct platform_device pxa27x_device_i2c_power = {
334 	.name		= "pxa2xx-i2c",
335 	.id		= 1,
336 	.resource	= pxa27x_resources_i2c_power,
337 	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
338 };
339 #endif
340 
341 static struct resource pxai2s_resources[] = {
342 	{
343 		.start	= 0x40400000,
344 		.end	= 0x40400083,
345 		.flags	= IORESOURCE_MEM,
346 	}, {
347 		.start	= IRQ_I2S,
348 		.end	= IRQ_I2S,
349 		.flags	= IORESOURCE_IRQ,
350 	},
351 };
352 
353 struct platform_device pxa_device_i2s = {
354 	.name		= "pxa2xx-i2s",
355 	.id		= -1,
356 	.resource	= pxai2s_resources,
357 	.num_resources	= ARRAY_SIZE(pxai2s_resources),
358 };
359 
360 struct platform_device pxa_device_asoc_ssp1 = {
361 	.name		= "pxa-ssp-dai",
362 	.id		= 0,
363 };
364 
365 struct platform_device pxa_device_asoc_ssp2= {
366 	.name		= "pxa-ssp-dai",
367 	.id		= 1,
368 };
369 
370 struct platform_device pxa_device_asoc_ssp3 = {
371 	.name		= "pxa-ssp-dai",
372 	.id		= 2,
373 };
374 
375 struct platform_device pxa_device_asoc_ssp4 = {
376 	.name		= "pxa-ssp-dai",
377 	.id		= 3,
378 };
379 
380 struct platform_device pxa_device_asoc_platform = {
381 	.name		= "pxa-pcm-audio",
382 	.id		= -1,
383 };
384 
385 static u64 pxaficp_dmamask = ~(u32)0;
386 
387 struct platform_device pxa_device_ficp = {
388 	.name		= "pxa2xx-ir",
389 	.id		= -1,
390 	.dev		= {
391 		.dma_mask = &pxaficp_dmamask,
392 		.coherent_dma_mask = 0xffffffff,
393 	},
394 };
395 
396 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
397 {
398 	pxa_register_device(&pxa_device_ficp, info);
399 }
400 
401 static struct resource pxa_rtc_resources[] = {
402 	[0] = {
403 		.start  = 0x40900000,
404 		.end	= 0x40900000 + 0x3b,
405 		.flags  = IORESOURCE_MEM,
406 	},
407 	[1] = {
408 		.start  = IRQ_RTC1Hz,
409 		.end    = IRQ_RTC1Hz,
410 		.flags  = IORESOURCE_IRQ,
411 	},
412 	[2] = {
413 		.start  = IRQ_RTCAlrm,
414 		.end    = IRQ_RTCAlrm,
415 		.flags  = IORESOURCE_IRQ,
416 	},
417 };
418 
419 static struct resource sa1100_rtc_resources[] = {
420 	[0] = {
421 		.start  = 0x40900000,
422 		.end	= 0x409000ff,
423 		.flags  = IORESOURCE_MEM,
424 	},
425 	[1] = {
426 		.start  = IRQ_RTC1Hz,
427 		.end    = IRQ_RTC1Hz,
428 		.flags  = IORESOURCE_IRQ,
429 	},
430 	[2] = {
431 		.start  = IRQ_RTCAlrm,
432 		.end    = IRQ_RTCAlrm,
433 		.flags  = IORESOURCE_IRQ,
434 	},
435 };
436 
437 struct platform_device sa1100_device_rtc = {
438 	.name		= "sa1100-rtc",
439 	.id		= -1,
440 	.num_resources  = ARRAY_SIZE(sa1100_rtc_resources),
441 	.resource       = sa1100_rtc_resources,
442 };
443 
444 struct platform_device pxa_device_rtc = {
445 	.name		= "pxa-rtc",
446 	.id		= -1,
447 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
448 	.resource       = pxa_rtc_resources,
449 };
450 
451 static struct resource pxa_ac97_resources[] = {
452 	[0] = {
453 		.start  = 0x40500000,
454 		.end	= 0x40500000 + 0xfff,
455 		.flags  = IORESOURCE_MEM,
456 	},
457 	[1] = {
458 		.start  = IRQ_AC97,
459 		.end    = IRQ_AC97,
460 		.flags  = IORESOURCE_IRQ,
461 	},
462 };
463 
464 static u64 pxa_ac97_dmamask = 0xffffffffUL;
465 
466 struct platform_device pxa_device_ac97 = {
467 	.name           = "pxa2xx-ac97",
468 	.id             = -1,
469 	.dev            = {
470 		.dma_mask = &pxa_ac97_dmamask,
471 		.coherent_dma_mask = 0xffffffff,
472 	},
473 	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
474 	.resource       = pxa_ac97_resources,
475 };
476 
477 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
478 {
479 	pxa_register_device(&pxa_device_ac97, ops);
480 }
481 
482 #ifdef CONFIG_PXA25x
483 
484 static struct resource pxa25x_resource_pwm0[] = {
485 	[0] = {
486 		.start	= 0x40b00000,
487 		.end	= 0x40b0000f,
488 		.flags	= IORESOURCE_MEM,
489 	},
490 };
491 
492 struct platform_device pxa25x_device_pwm0 = {
493 	.name		= "pxa25x-pwm",
494 	.id		= 0,
495 	.resource	= pxa25x_resource_pwm0,
496 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
497 };
498 
499 static struct resource pxa25x_resource_pwm1[] = {
500 	[0] = {
501 		.start	= 0x40c00000,
502 		.end	= 0x40c0000f,
503 		.flags	= IORESOURCE_MEM,
504 	},
505 };
506 
507 struct platform_device pxa25x_device_pwm1 = {
508 	.name		= "pxa25x-pwm",
509 	.id		= 1,
510 	.resource	= pxa25x_resource_pwm1,
511 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
512 };
513 
514 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
515 
516 static struct resource pxa25x_resource_ssp[] = {
517 	[0] = {
518 		.start	= 0x41000000,
519 		.end	= 0x4100001f,
520 		.flags	= IORESOURCE_MEM,
521 	},
522 	[1] = {
523 		.start	= IRQ_SSP,
524 		.end	= IRQ_SSP,
525 		.flags	= IORESOURCE_IRQ,
526 	},
527 	[2] = {
528 		/* DRCMR for RX */
529 		.start	= 13,
530 		.end	= 13,
531 		.flags	= IORESOURCE_DMA,
532 	},
533 	[3] = {
534 		/* DRCMR for TX */
535 		.start	= 14,
536 		.end	= 14,
537 		.flags	= IORESOURCE_DMA,
538 	},
539 };
540 
541 struct platform_device pxa25x_device_ssp = {
542 	.name		= "pxa25x-ssp",
543 	.id		= 0,
544 	.dev		= {
545 		.dma_mask = &pxa25x_ssp_dma_mask,
546 		.coherent_dma_mask = DMA_BIT_MASK(32),
547 	},
548 	.resource	= pxa25x_resource_ssp,
549 	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
550 };
551 
552 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
553 
554 static struct resource pxa25x_resource_nssp[] = {
555 	[0] = {
556 		.start	= 0x41400000,
557 		.end	= 0x4140002f,
558 		.flags	= IORESOURCE_MEM,
559 	},
560 	[1] = {
561 		.start	= IRQ_NSSP,
562 		.end	= IRQ_NSSP,
563 		.flags	= IORESOURCE_IRQ,
564 	},
565 	[2] = {
566 		/* DRCMR for RX */
567 		.start	= 15,
568 		.end	= 15,
569 		.flags	= IORESOURCE_DMA,
570 	},
571 	[3] = {
572 		/* DRCMR for TX */
573 		.start	= 16,
574 		.end	= 16,
575 		.flags	= IORESOURCE_DMA,
576 	},
577 };
578 
579 struct platform_device pxa25x_device_nssp = {
580 	.name		= "pxa25x-nssp",
581 	.id		= 1,
582 	.dev		= {
583 		.dma_mask = &pxa25x_nssp_dma_mask,
584 		.coherent_dma_mask = DMA_BIT_MASK(32),
585 	},
586 	.resource	= pxa25x_resource_nssp,
587 	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
588 };
589 
590 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
591 
592 static struct resource pxa25x_resource_assp[] = {
593 	[0] = {
594 		.start	= 0x41500000,
595 		.end	= 0x4150002f,
596 		.flags	= IORESOURCE_MEM,
597 	},
598 	[1] = {
599 		.start	= IRQ_ASSP,
600 		.end	= IRQ_ASSP,
601 		.flags	= IORESOURCE_IRQ,
602 	},
603 	[2] = {
604 		/* DRCMR for RX */
605 		.start	= 23,
606 		.end	= 23,
607 		.flags	= IORESOURCE_DMA,
608 	},
609 	[3] = {
610 		/* DRCMR for TX */
611 		.start	= 24,
612 		.end	= 24,
613 		.flags	= IORESOURCE_DMA,
614 	},
615 };
616 
617 struct platform_device pxa25x_device_assp = {
618 	/* ASSP is basically equivalent to NSSP */
619 	.name		= "pxa25x-nssp",
620 	.id		= 2,
621 	.dev		= {
622 		.dma_mask = &pxa25x_assp_dma_mask,
623 		.coherent_dma_mask = DMA_BIT_MASK(32),
624 	},
625 	.resource	= pxa25x_resource_assp,
626 	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
627 };
628 #endif /* CONFIG_PXA25x */
629 
630 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
631 static struct resource pxa27x_resource_camera[] = {
632 	[0] = {
633 		.start	= 0x50000000,
634 		.end	= 0x50000fff,
635 		.flags	= IORESOURCE_MEM,
636 	},
637 	[1] = {
638 		.start	= IRQ_CAMERA,
639 		.end	= IRQ_CAMERA,
640 		.flags	= IORESOURCE_IRQ,
641 	},
642 };
643 
644 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
645 
646 static struct platform_device pxa27x_device_camera = {
647 	.name		= "pxa27x-camera",
648 	.id		= 0, /* This is used to put cameras on this interface */
649 	.dev		= {
650 		.dma_mask      		= &pxa27x_dma_mask_camera,
651 		.coherent_dma_mask	= 0xffffffff,
652 	},
653 	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
654 	.resource	= pxa27x_resource_camera,
655 };
656 
657 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
658 {
659 	pxa_register_device(&pxa27x_device_camera, info);
660 }
661 
662 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
663 
664 static struct resource pxa27x_resource_ohci[] = {
665 	[0] = {
666 		.start  = 0x4C000000,
667 		.end    = 0x4C00ff6f,
668 		.flags  = IORESOURCE_MEM,
669 	},
670 	[1] = {
671 		.start  = IRQ_USBH1,
672 		.end    = IRQ_USBH1,
673 		.flags  = IORESOURCE_IRQ,
674 	},
675 };
676 
677 struct platform_device pxa27x_device_ohci = {
678 	.name		= "pxa27x-ohci",
679 	.id		= -1,
680 	.dev		= {
681 		.dma_mask = &pxa27x_ohci_dma_mask,
682 		.coherent_dma_mask = DMA_BIT_MASK(32),
683 	},
684 	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
685 	.resource       = pxa27x_resource_ohci,
686 };
687 
688 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
689 {
690 	pxa_register_device(&pxa27x_device_ohci, info);
691 }
692 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
693 
694 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
695 static struct resource pxa27x_resource_keypad[] = {
696 	[0] = {
697 		.start	= 0x41500000,
698 		.end	= 0x4150004c,
699 		.flags	= IORESOURCE_MEM,
700 	},
701 	[1] = {
702 		.start	= IRQ_KEYPAD,
703 		.end	= IRQ_KEYPAD,
704 		.flags	= IORESOURCE_IRQ,
705 	},
706 };
707 
708 struct platform_device pxa27x_device_keypad = {
709 	.name		= "pxa27x-keypad",
710 	.id		= -1,
711 	.resource	= pxa27x_resource_keypad,
712 	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
713 };
714 
715 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
716 {
717 	pxa_register_device(&pxa27x_device_keypad, info);
718 }
719 
720 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
721 
722 static struct resource pxa27x_resource_ssp1[] = {
723 	[0] = {
724 		.start	= 0x41000000,
725 		.end	= 0x4100003f,
726 		.flags	= IORESOURCE_MEM,
727 	},
728 	[1] = {
729 		.start	= IRQ_SSP,
730 		.end	= IRQ_SSP,
731 		.flags	= IORESOURCE_IRQ,
732 	},
733 	[2] = {
734 		/* DRCMR for RX */
735 		.start	= 13,
736 		.end	= 13,
737 		.flags	= IORESOURCE_DMA,
738 	},
739 	[3] = {
740 		/* DRCMR for TX */
741 		.start	= 14,
742 		.end	= 14,
743 		.flags	= IORESOURCE_DMA,
744 	},
745 };
746 
747 struct platform_device pxa27x_device_ssp1 = {
748 	.name		= "pxa27x-ssp",
749 	.id		= 0,
750 	.dev		= {
751 		.dma_mask = &pxa27x_ssp1_dma_mask,
752 		.coherent_dma_mask = DMA_BIT_MASK(32),
753 	},
754 	.resource	= pxa27x_resource_ssp1,
755 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
756 };
757 
758 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
759 
760 static struct resource pxa27x_resource_ssp2[] = {
761 	[0] = {
762 		.start	= 0x41700000,
763 		.end	= 0x4170003f,
764 		.flags	= IORESOURCE_MEM,
765 	},
766 	[1] = {
767 		.start	= IRQ_SSP2,
768 		.end	= IRQ_SSP2,
769 		.flags	= IORESOURCE_IRQ,
770 	},
771 	[2] = {
772 		/* DRCMR for RX */
773 		.start	= 15,
774 		.end	= 15,
775 		.flags	= IORESOURCE_DMA,
776 	},
777 	[3] = {
778 		/* DRCMR for TX */
779 		.start	= 16,
780 		.end	= 16,
781 		.flags	= IORESOURCE_DMA,
782 	},
783 };
784 
785 struct platform_device pxa27x_device_ssp2 = {
786 	.name		= "pxa27x-ssp",
787 	.id		= 1,
788 	.dev		= {
789 		.dma_mask = &pxa27x_ssp2_dma_mask,
790 		.coherent_dma_mask = DMA_BIT_MASK(32),
791 	},
792 	.resource	= pxa27x_resource_ssp2,
793 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
794 };
795 
796 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
797 
798 static struct resource pxa27x_resource_ssp3[] = {
799 	[0] = {
800 		.start	= 0x41900000,
801 		.end	= 0x4190003f,
802 		.flags	= IORESOURCE_MEM,
803 	},
804 	[1] = {
805 		.start	= IRQ_SSP3,
806 		.end	= IRQ_SSP3,
807 		.flags	= IORESOURCE_IRQ,
808 	},
809 	[2] = {
810 		/* DRCMR for RX */
811 		.start	= 66,
812 		.end	= 66,
813 		.flags	= IORESOURCE_DMA,
814 	},
815 	[3] = {
816 		/* DRCMR for TX */
817 		.start	= 67,
818 		.end	= 67,
819 		.flags	= IORESOURCE_DMA,
820 	},
821 };
822 
823 struct platform_device pxa27x_device_ssp3 = {
824 	.name		= "pxa27x-ssp",
825 	.id		= 2,
826 	.dev		= {
827 		.dma_mask = &pxa27x_ssp3_dma_mask,
828 		.coherent_dma_mask = DMA_BIT_MASK(32),
829 	},
830 	.resource	= pxa27x_resource_ssp3,
831 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
832 };
833 
834 static struct resource pxa27x_resource_pwm0[] = {
835 	[0] = {
836 		.start	= 0x40b00000,
837 		.end	= 0x40b0001f,
838 		.flags	= IORESOURCE_MEM,
839 	},
840 };
841 
842 struct platform_device pxa27x_device_pwm0 = {
843 	.name		= "pxa27x-pwm",
844 	.id		= 0,
845 	.resource	= pxa27x_resource_pwm0,
846 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
847 };
848 
849 static struct resource pxa27x_resource_pwm1[] = {
850 	[0] = {
851 		.start	= 0x40c00000,
852 		.end	= 0x40c0001f,
853 		.flags	= IORESOURCE_MEM,
854 	},
855 };
856 
857 struct platform_device pxa27x_device_pwm1 = {
858 	.name		= "pxa27x-pwm",
859 	.id		= 1,
860 	.resource	= pxa27x_resource_pwm1,
861 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
862 };
863 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
864 
865 #ifdef CONFIG_PXA3xx
866 static struct resource pxa3xx_resources_mci2[] = {
867 	[0] = {
868 		.start	= 0x42000000,
869 		.end	= 0x42000fff,
870 		.flags	= IORESOURCE_MEM,
871 	},
872 	[1] = {
873 		.start	= IRQ_MMC2,
874 		.end	= IRQ_MMC2,
875 		.flags	= IORESOURCE_IRQ,
876 	},
877 	[2] = {
878 		.start	= 93,
879 		.end	= 93,
880 		.flags	= IORESOURCE_DMA,
881 	},
882 	[3] = {
883 		.start	= 94,
884 		.end	= 94,
885 		.flags	= IORESOURCE_DMA,
886 	},
887 };
888 
889 struct platform_device pxa3xx_device_mci2 = {
890 	.name		= "pxa2xx-mci",
891 	.id		= 1,
892 	.dev		= {
893 		.dma_mask = &pxamci_dmamask,
894 		.coherent_dma_mask =	0xffffffff,
895 	},
896 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
897 	.resource	= pxa3xx_resources_mci2,
898 };
899 
900 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
901 {
902 	pxa_register_device(&pxa3xx_device_mci2, info);
903 }
904 
905 static struct resource pxa3xx_resources_mci3[] = {
906 	[0] = {
907 		.start	= 0x42500000,
908 		.end	= 0x42500fff,
909 		.flags	= IORESOURCE_MEM,
910 	},
911 	[1] = {
912 		.start	= IRQ_MMC3,
913 		.end	= IRQ_MMC3,
914 		.flags	= IORESOURCE_IRQ,
915 	},
916 	[2] = {
917 		.start	= 100,
918 		.end	= 100,
919 		.flags	= IORESOURCE_DMA,
920 	},
921 	[3] = {
922 		.start	= 101,
923 		.end	= 101,
924 		.flags	= IORESOURCE_DMA,
925 	},
926 };
927 
928 struct platform_device pxa3xx_device_mci3 = {
929 	.name		= "pxa2xx-mci",
930 	.id		= 2,
931 	.dev		= {
932 		.dma_mask = &pxamci_dmamask,
933 		.coherent_dma_mask = 0xffffffff,
934 	},
935 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
936 	.resource	= pxa3xx_resources_mci3,
937 };
938 
939 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
940 {
941 	pxa_register_device(&pxa3xx_device_mci3, info);
942 }
943 
944 static struct resource pxa3xx_resources_gcu[] = {
945 	{
946 		.start	= 0x54000000,
947 		.end	= 0x54000fff,
948 		.flags	= IORESOURCE_MEM,
949 	},
950 	{
951 		.start	= IRQ_GCU,
952 		.end	= IRQ_GCU,
953 		.flags	= IORESOURCE_IRQ,
954 	},
955 };
956 
957 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
958 
959 struct platform_device pxa3xx_device_gcu = {
960 	.name		= "pxa3xx-gcu",
961 	.id		= -1,
962 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
963 	.resource	= pxa3xx_resources_gcu,
964 	.dev		= {
965 		.dma_mask = &pxa3xx_gcu_dmamask,
966 		.coherent_dma_mask = 0xffffffff,
967 	},
968 };
969 
970 #endif /* CONFIG_PXA3xx */
971 
972 #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
973 static struct resource pxa3xx_resources_i2c_power[] = {
974 	{
975 		.start  = 0x40f500c0,
976 		.end    = 0x40f500d3,
977 		.flags	= IORESOURCE_MEM,
978 	}, {
979 		.start	= IRQ_PWRI2C,
980 		.end	= IRQ_PWRI2C,
981 		.flags	= IORESOURCE_IRQ,
982 	},
983 };
984 
985 struct platform_device pxa3xx_device_i2c_power = {
986 	.name		= "pxa3xx-pwri2c",
987 	.id		= 1,
988 	.resource	= pxa3xx_resources_i2c_power,
989 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
990 };
991 
992 static struct resource pxa3xx_resources_nand[] = {
993 	[0] = {
994 		.start	= 0x43100000,
995 		.end	= 0x43100053,
996 		.flags	= IORESOURCE_MEM,
997 	},
998 	[1] = {
999 		.start	= IRQ_NAND,
1000 		.end	= IRQ_NAND,
1001 		.flags	= IORESOURCE_IRQ,
1002 	},
1003 	[2] = {
1004 		/* DRCMR for Data DMA */
1005 		.start	= 97,
1006 		.end	= 97,
1007 		.flags	= IORESOURCE_DMA,
1008 	},
1009 	[3] = {
1010 		/* DRCMR for Command DMA */
1011 		.start	= 99,
1012 		.end	= 99,
1013 		.flags	= IORESOURCE_DMA,
1014 	},
1015 };
1016 
1017 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1018 
1019 struct platform_device pxa3xx_device_nand = {
1020 	.name		= "pxa3xx-nand",
1021 	.id		= -1,
1022 	.dev		= {
1023 		.dma_mask = &pxa3xx_nand_dma_mask,
1024 		.coherent_dma_mask = DMA_BIT_MASK(32),
1025 	},
1026 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
1027 	.resource	= pxa3xx_resources_nand,
1028 };
1029 
1030 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1031 {
1032 	pxa_register_device(&pxa3xx_device_nand, info);
1033 }
1034 
1035 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1036 
1037 static struct resource pxa3xx_resource_ssp4[] = {
1038 	[0] = {
1039 		.start	= 0x41a00000,
1040 		.end	= 0x41a0003f,
1041 		.flags	= IORESOURCE_MEM,
1042 	},
1043 	[1] = {
1044 		.start	= IRQ_SSP4,
1045 		.end	= IRQ_SSP4,
1046 		.flags	= IORESOURCE_IRQ,
1047 	},
1048 	[2] = {
1049 		/* DRCMR for RX */
1050 		.start	= 2,
1051 		.end	= 2,
1052 		.flags	= IORESOURCE_DMA,
1053 	},
1054 	[3] = {
1055 		/* DRCMR for TX */
1056 		.start	= 3,
1057 		.end	= 3,
1058 		.flags	= IORESOURCE_DMA,
1059 	},
1060 };
1061 
1062 struct platform_device pxa3xx_device_ssp4 = {
1063 	/* PXA3xx SSP is basically equivalent to PXA27x */
1064 	.name		= "pxa27x-ssp",
1065 	.id		= 3,
1066 	.dev		= {
1067 		.dma_mask = &pxa3xx_ssp4_dma_mask,
1068 		.coherent_dma_mask = DMA_BIT_MASK(32),
1069 	},
1070 	.resource	= pxa3xx_resource_ssp4,
1071 	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1072 };
1073 #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1074 
1075 struct resource pxa_resource_gpio[] = {
1076 	{
1077 		.start	= 0x40e00000,
1078 		.end	= 0x40e0ffff,
1079 		.flags	= IORESOURCE_MEM,
1080 	}, {
1081 		.start	= IRQ_GPIO0,
1082 		.end	= IRQ_GPIO0,
1083 		.name	= "gpio0",
1084 		.flags	= IORESOURCE_IRQ,
1085 	}, {
1086 		.start	= IRQ_GPIO1,
1087 		.end	= IRQ_GPIO1,
1088 		.name	= "gpio1",
1089 		.flags	= IORESOURCE_IRQ,
1090 	}, {
1091 		.start	= IRQ_GPIO_2_x,
1092 		.end	= IRQ_GPIO_2_x,
1093 		.name	= "gpio_mux",
1094 		.flags	= IORESOURCE_IRQ,
1095 	},
1096 };
1097 
1098 struct platform_device pxa_device_gpio = {
1099 	.name		= "pxa-gpio",
1100 	.id		= -1,
1101 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1102 	.resource	= pxa_resource_gpio,
1103 };
1104 
1105 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1106  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1107 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1108 {
1109 	struct platform_device *pd;
1110 
1111 	pd = platform_device_alloc("pxa2xx-spi", id);
1112 	if (pd == NULL) {
1113 		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1114 		       id);
1115 		return;
1116 	}
1117 
1118 	pd->dev.platform_data = info;
1119 	platform_device_add(pd);
1120 }
1121