xref: /linux/arch/arm/mach-pxa/devices.c (revision a1fb6696c662920f695c97591d759391aca8a1ad) 
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/spi/pxa2xx_spi.h>
7 #include <linux/i2c/pxa-i2c.h>
8 
9 #include <mach/udc.h>
10 #include <linux/platform_data/usb-pxa3xx-ulpi.h>
11 #include <linux/platform_data/video-pxafb.h>
12 #include <linux/platform_data/mmc-pxamci.h>
13 #include <linux/platform_data/irda-pxaficp.h>
14 #include <mach/irqs.h>
15 #include <linux/platform_data/usb-ohci-pxa27x.h>
16 #include <linux/platform_data/keypad-pxa27x.h>
17 #include <linux/platform_data/camera-pxa.h>
18 #include <mach/audio.h>
19 #include <mach/hardware.h>
20 #include <linux/platform_data/mtd-nand-pxa3xx.h>
21 
22 #include "devices.h"
23 #include "generic.h"
24 
25 void __init pxa_register_device(struct platform_device *dev, void *data)
26 {
27 	int ret;
28 
29 	dev->dev.platform_data = data;
30 
31 	ret = platform_device_register(dev);
32 	if (ret)
33 		dev_err(&dev->dev, "unable to register device: %d\n", ret);
34 }
35 
36 static struct resource pxa_resource_pmu = {
37 	.start	= IRQ_PMU,
38 	.end	= IRQ_PMU,
39 	.flags	= IORESOURCE_IRQ,
40 };
41 
42 struct platform_device pxa_device_pmu = {
43 	.name		= "xscale-pmu",
44 	.id		= -1,
45 	.resource	= &pxa_resource_pmu,
46 	.num_resources	= 1,
47 };
48 
49 static struct resource pxamci_resources[] = {
50 	[0] = {
51 		.start	= 0x41100000,
52 		.end	= 0x41100fff,
53 		.flags	= IORESOURCE_MEM,
54 	},
55 	[1] = {
56 		.start	= IRQ_MMC,
57 		.end	= IRQ_MMC,
58 		.flags	= IORESOURCE_IRQ,
59 	},
60 	[2] = {
61 		.start	= 21,
62 		.end	= 21,
63 		.flags	= IORESOURCE_DMA,
64 	},
65 	[3] = {
66 		.start	= 22,
67 		.end	= 22,
68 		.flags	= IORESOURCE_DMA,
69 	},
70 };
71 
72 static u64 pxamci_dmamask = 0xffffffffUL;
73 
74 struct platform_device pxa_device_mci = {
75 	.name		= "pxa2xx-mci",
76 	.id		= 0,
77 	.dev		= {
78 		.dma_mask = &pxamci_dmamask,
79 		.coherent_dma_mask = 0xffffffff,
80 	},
81 	.num_resources	= ARRAY_SIZE(pxamci_resources),
82 	.resource	= pxamci_resources,
83 };
84 
85 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86 {
87 	pxa_register_device(&pxa_device_mci, info);
88 }
89 
90 
91 static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 	.gpio_pullup = -1,
93 };
94 
95 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
96 {
97 	memcpy(&pxa_udc_info, info, sizeof *info);
98 }
99 
100 static struct resource pxa2xx_udc_resources[] = {
101 	[0] = {
102 		.start	= 0x40600000,
103 		.end	= 0x4060ffff,
104 		.flags	= IORESOURCE_MEM,
105 	},
106 	[1] = {
107 		.start	= IRQ_USB,
108 		.end	= IRQ_USB,
109 		.flags	= IORESOURCE_IRQ,
110 	},
111 };
112 
113 static u64 udc_dma_mask = ~(u32)0;
114 
115 struct platform_device pxa25x_device_udc = {
116 	.name		= "pxa25x-udc",
117 	.id		= -1,
118 	.resource	= pxa2xx_udc_resources,
119 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
120 	.dev		=  {
121 		.platform_data	= &pxa_udc_info,
122 		.dma_mask	= &udc_dma_mask,
123 	}
124 };
125 
126 struct platform_device pxa27x_device_udc = {
127 	.name		= "pxa27x-udc",
128 	.id		= -1,
129 	.resource	= pxa2xx_udc_resources,
130 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
131 	.dev		=  {
132 		.platform_data	= &pxa_udc_info,
133 		.dma_mask	= &udc_dma_mask,
134 	}
135 };
136 
137 #ifdef CONFIG_PXA3xx
138 static struct resource pxa3xx_u2d_resources[] = {
139 	[0] = {
140 		.start	= 0x54100000,
141 		.end	= 0x54100fff,
142 		.flags	= IORESOURCE_MEM,
143 	},
144 	[1] = {
145 		.start	= IRQ_USB2,
146 		.end	= IRQ_USB2,
147 		.flags	= IORESOURCE_IRQ,
148 	},
149 };
150 
151 struct platform_device pxa3xx_device_u2d = {
152 	.name		= "pxa3xx-u2d",
153 	.id		= -1,
154 	.resource	= pxa3xx_u2d_resources,
155 	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
156 };
157 
158 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
159 {
160 	pxa_register_device(&pxa3xx_device_u2d, info);
161 }
162 #endif /* CONFIG_PXA3xx */
163 
164 static struct resource pxafb_resources[] = {
165 	[0] = {
166 		.start	= 0x44000000,
167 		.end	= 0x4400ffff,
168 		.flags	= IORESOURCE_MEM,
169 	},
170 	[1] = {
171 		.start	= IRQ_LCD,
172 		.end	= IRQ_LCD,
173 		.flags	= IORESOURCE_IRQ,
174 	},
175 };
176 
177 static u64 fb_dma_mask = ~(u64)0;
178 
179 struct platform_device pxa_device_fb = {
180 	.name		= "pxa2xx-fb",
181 	.id		= -1,
182 	.dev		= {
183 		.dma_mask	= &fb_dma_mask,
184 		.coherent_dma_mask = 0xffffffff,
185 	},
186 	.num_resources	= ARRAY_SIZE(pxafb_resources),
187 	.resource	= pxafb_resources,
188 };
189 
190 void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
191 {
192 	pxa_device_fb.dev.parent = parent;
193 	pxa_register_device(&pxa_device_fb, info);
194 }
195 
196 static struct resource pxa_resource_ffuart[] = {
197 	{
198 		.start	= 0x40100000,
199 		.end	= 0x40100023,
200 		.flags	= IORESOURCE_MEM,
201 	}, {
202 		.start	= IRQ_FFUART,
203 		.end	= IRQ_FFUART,
204 		.flags	= IORESOURCE_IRQ,
205 	}
206 };
207 
208 struct platform_device pxa_device_ffuart = {
209 	.name		= "pxa2xx-uart",
210 	.id		= 0,
211 	.resource	= pxa_resource_ffuart,
212 	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
213 };
214 
215 void __init pxa_set_ffuart_info(void *info)
216 {
217 	pxa_register_device(&pxa_device_ffuart, info);
218 }
219 
220 static struct resource pxa_resource_btuart[] = {
221 	{
222 		.start	= 0x40200000,
223 		.end	= 0x40200023,
224 		.flags	= IORESOURCE_MEM,
225 	}, {
226 		.start	= IRQ_BTUART,
227 		.end	= IRQ_BTUART,
228 		.flags	= IORESOURCE_IRQ,
229 	}
230 };
231 
232 struct platform_device pxa_device_btuart = {
233 	.name		= "pxa2xx-uart",
234 	.id		= 1,
235 	.resource	= pxa_resource_btuart,
236 	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
237 };
238 
239 void __init pxa_set_btuart_info(void *info)
240 {
241 	pxa_register_device(&pxa_device_btuart, info);
242 }
243 
244 static struct resource pxa_resource_stuart[] = {
245 	{
246 		.start	= 0x40700000,
247 		.end	= 0x40700023,
248 		.flags	= IORESOURCE_MEM,
249 	}, {
250 		.start	= IRQ_STUART,
251 		.end	= IRQ_STUART,
252 		.flags	= IORESOURCE_IRQ,
253 	}
254 };
255 
256 struct platform_device pxa_device_stuart = {
257 	.name		= "pxa2xx-uart",
258 	.id		= 2,
259 	.resource	= pxa_resource_stuart,
260 	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
261 };
262 
263 void __init pxa_set_stuart_info(void *info)
264 {
265 	pxa_register_device(&pxa_device_stuart, info);
266 }
267 
268 static struct resource pxa_resource_hwuart[] = {
269 	{
270 		.start	= 0x41600000,
271 		.end	= 0x4160002F,
272 		.flags	= IORESOURCE_MEM,
273 	}, {
274 		.start	= IRQ_HWUART,
275 		.end	= IRQ_HWUART,
276 		.flags	= IORESOURCE_IRQ,
277 	}
278 };
279 
280 struct platform_device pxa_device_hwuart = {
281 	.name		= "pxa2xx-uart",
282 	.id		= 3,
283 	.resource	= pxa_resource_hwuart,
284 	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
285 };
286 
287 void __init pxa_set_hwuart_info(void *info)
288 {
289 	if (cpu_is_pxa255())
290 		pxa_register_device(&pxa_device_hwuart, info);
291 	else
292 		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
293 }
294 
295 static struct resource pxai2c_resources[] = {
296 	{
297 		.start	= 0x40301680,
298 		.end	= 0x403016a3,
299 		.flags	= IORESOURCE_MEM,
300 	}, {
301 		.start	= IRQ_I2C,
302 		.end	= IRQ_I2C,
303 		.flags	= IORESOURCE_IRQ,
304 	},
305 };
306 
307 struct platform_device pxa_device_i2c = {
308 	.name		= "pxa2xx-i2c",
309 	.id		= 0,
310 	.resource	= pxai2c_resources,
311 	.num_resources	= ARRAY_SIZE(pxai2c_resources),
312 };
313 
314 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
315 {
316 	pxa_register_device(&pxa_device_i2c, info);
317 }
318 
319 #ifdef CONFIG_PXA27x
320 static struct resource pxa27x_resources_i2c_power[] = {
321 	{
322 		.start	= 0x40f00180,
323 		.end	= 0x40f001a3,
324 		.flags	= IORESOURCE_MEM,
325 	}, {
326 		.start	= IRQ_PWRI2C,
327 		.end	= IRQ_PWRI2C,
328 		.flags	= IORESOURCE_IRQ,
329 	},
330 };
331 
332 struct platform_device pxa27x_device_i2c_power = {
333 	.name		= "pxa2xx-i2c",
334 	.id		= 1,
335 	.resource	= pxa27x_resources_i2c_power,
336 	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
337 };
338 #endif
339 
340 static struct resource pxai2s_resources[] = {
341 	{
342 		.start	= 0x40400000,
343 		.end	= 0x40400083,
344 		.flags	= IORESOURCE_MEM,
345 	}, {
346 		.start	= IRQ_I2S,
347 		.end	= IRQ_I2S,
348 		.flags	= IORESOURCE_IRQ,
349 	},
350 };
351 
352 struct platform_device pxa_device_i2s = {
353 	.name		= "pxa2xx-i2s",
354 	.id		= -1,
355 	.resource	= pxai2s_resources,
356 	.num_resources	= ARRAY_SIZE(pxai2s_resources),
357 };
358 
359 struct platform_device pxa_device_asoc_ssp1 = {
360 	.name		= "pxa-ssp-dai",
361 	.id		= 0,
362 };
363 
364 struct platform_device pxa_device_asoc_ssp2= {
365 	.name		= "pxa-ssp-dai",
366 	.id		= 1,
367 };
368 
369 struct platform_device pxa_device_asoc_ssp3 = {
370 	.name		= "pxa-ssp-dai",
371 	.id		= 2,
372 };
373 
374 struct platform_device pxa_device_asoc_ssp4 = {
375 	.name		= "pxa-ssp-dai",
376 	.id		= 3,
377 };
378 
379 struct platform_device pxa_device_asoc_platform = {
380 	.name		= "pxa-pcm-audio",
381 	.id		= -1,
382 };
383 
384 static u64 pxaficp_dmamask = ~(u32)0;
385 
386 static struct resource pxa_ir_resources[] = {
387 	[0] = {
388 		.start  = IRQ_STUART,
389 		.end    = IRQ_STUART,
390 		.flags  = IORESOURCE_IRQ,
391 	},
392 	[1] = {
393 		.start  = IRQ_ICP,
394 		.end    = IRQ_ICP,
395 		.flags  = IORESOURCE_IRQ,
396 	},
397 };
398 
399 struct platform_device pxa_device_ficp = {
400 	.name		= "pxa2xx-ir",
401 	.id		= -1,
402 	.num_resources	= ARRAY_SIZE(pxa_ir_resources),
403 	.resource	= pxa_ir_resources,
404 	.dev		= {
405 		.dma_mask = &pxaficp_dmamask,
406 		.coherent_dma_mask = 0xffffffff,
407 	},
408 };
409 
410 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
411 {
412 	pxa_register_device(&pxa_device_ficp, info);
413 }
414 
415 static struct resource pxa_rtc_resources[] = {
416 	[0] = {
417 		.start  = 0x40900000,
418 		.end	= 0x40900000 + 0x3b,
419 		.flags  = IORESOURCE_MEM,
420 	},
421 	[1] = {
422 		.start  = IRQ_RTC1Hz,
423 		.end    = IRQ_RTC1Hz,
424 		.name	= "rtc 1Hz",
425 		.flags  = IORESOURCE_IRQ,
426 	},
427 	[2] = {
428 		.start  = IRQ_RTCAlrm,
429 		.end    = IRQ_RTCAlrm,
430 		.name	= "rtc alarm",
431 		.flags  = IORESOURCE_IRQ,
432 	},
433 };
434 
435 struct platform_device pxa_device_rtc = {
436 	.name		= "pxa-rtc",
437 	.id		= -1,
438 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
439 	.resource       = pxa_rtc_resources,
440 };
441 
442 static struct resource sa1100_rtc_resources[] = {
443 	{
444 		.start  = IRQ_RTC1Hz,
445 		.end    = IRQ_RTC1Hz,
446 		.name	= "rtc 1Hz",
447 		.flags  = IORESOURCE_IRQ,
448 	}, {
449 		.start  = IRQ_RTCAlrm,
450 		.end    = IRQ_RTCAlrm,
451 		.name	= "rtc alarm",
452 		.flags  = IORESOURCE_IRQ,
453 	},
454 };
455 
456 struct platform_device sa1100_device_rtc = {
457 	.name		= "sa1100-rtc",
458 	.id		= -1,
459 	.num_resources	= ARRAY_SIZE(sa1100_rtc_resources),
460 	.resource	= sa1100_rtc_resources,
461 };
462 
463 static struct resource pxa_ac97_resources[] = {
464 	[0] = {
465 		.start  = 0x40500000,
466 		.end	= 0x40500000 + 0xfff,
467 		.flags  = IORESOURCE_MEM,
468 	},
469 	[1] = {
470 		.start  = IRQ_AC97,
471 		.end    = IRQ_AC97,
472 		.flags  = IORESOURCE_IRQ,
473 	},
474 };
475 
476 static u64 pxa_ac97_dmamask = 0xffffffffUL;
477 
478 struct platform_device pxa_device_ac97 = {
479 	.name           = "pxa2xx-ac97",
480 	.id             = -1,
481 	.dev            = {
482 		.dma_mask = &pxa_ac97_dmamask,
483 		.coherent_dma_mask = 0xffffffff,
484 	},
485 	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
486 	.resource       = pxa_ac97_resources,
487 };
488 
489 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
490 {
491 	pxa_register_device(&pxa_device_ac97, ops);
492 }
493 
494 #ifdef CONFIG_PXA25x
495 
496 static struct resource pxa25x_resource_pwm0[] = {
497 	[0] = {
498 		.start	= 0x40b00000,
499 		.end	= 0x40b0000f,
500 		.flags	= IORESOURCE_MEM,
501 	},
502 };
503 
504 struct platform_device pxa25x_device_pwm0 = {
505 	.name		= "pxa25x-pwm",
506 	.id		= 0,
507 	.resource	= pxa25x_resource_pwm0,
508 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
509 };
510 
511 static struct resource pxa25x_resource_pwm1[] = {
512 	[0] = {
513 		.start	= 0x40c00000,
514 		.end	= 0x40c0000f,
515 		.flags	= IORESOURCE_MEM,
516 	},
517 };
518 
519 struct platform_device pxa25x_device_pwm1 = {
520 	.name		= "pxa25x-pwm",
521 	.id		= 1,
522 	.resource	= pxa25x_resource_pwm1,
523 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
524 };
525 
526 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
527 
528 static struct resource pxa25x_resource_ssp[] = {
529 	[0] = {
530 		.start	= 0x41000000,
531 		.end	= 0x4100001f,
532 		.flags	= IORESOURCE_MEM,
533 	},
534 	[1] = {
535 		.start	= IRQ_SSP,
536 		.end	= IRQ_SSP,
537 		.flags	= IORESOURCE_IRQ,
538 	},
539 	[2] = {
540 		/* DRCMR for RX */
541 		.start	= 13,
542 		.end	= 13,
543 		.flags	= IORESOURCE_DMA,
544 	},
545 	[3] = {
546 		/* DRCMR for TX */
547 		.start	= 14,
548 		.end	= 14,
549 		.flags	= IORESOURCE_DMA,
550 	},
551 };
552 
553 struct platform_device pxa25x_device_ssp = {
554 	.name		= "pxa25x-ssp",
555 	.id		= 0,
556 	.dev		= {
557 		.dma_mask = &pxa25x_ssp_dma_mask,
558 		.coherent_dma_mask = DMA_BIT_MASK(32),
559 	},
560 	.resource	= pxa25x_resource_ssp,
561 	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
562 };
563 
564 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
565 
566 static struct resource pxa25x_resource_nssp[] = {
567 	[0] = {
568 		.start	= 0x41400000,
569 		.end	= 0x4140002f,
570 		.flags	= IORESOURCE_MEM,
571 	},
572 	[1] = {
573 		.start	= IRQ_NSSP,
574 		.end	= IRQ_NSSP,
575 		.flags	= IORESOURCE_IRQ,
576 	},
577 	[2] = {
578 		/* DRCMR for RX */
579 		.start	= 15,
580 		.end	= 15,
581 		.flags	= IORESOURCE_DMA,
582 	},
583 	[3] = {
584 		/* DRCMR for TX */
585 		.start	= 16,
586 		.end	= 16,
587 		.flags	= IORESOURCE_DMA,
588 	},
589 };
590 
591 struct platform_device pxa25x_device_nssp = {
592 	.name		= "pxa25x-nssp",
593 	.id		= 1,
594 	.dev		= {
595 		.dma_mask = &pxa25x_nssp_dma_mask,
596 		.coherent_dma_mask = DMA_BIT_MASK(32),
597 	},
598 	.resource	= pxa25x_resource_nssp,
599 	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
600 };
601 
602 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
603 
604 static struct resource pxa25x_resource_assp[] = {
605 	[0] = {
606 		.start	= 0x41500000,
607 		.end	= 0x4150002f,
608 		.flags	= IORESOURCE_MEM,
609 	},
610 	[1] = {
611 		.start	= IRQ_ASSP,
612 		.end	= IRQ_ASSP,
613 		.flags	= IORESOURCE_IRQ,
614 	},
615 	[2] = {
616 		/* DRCMR for RX */
617 		.start	= 23,
618 		.end	= 23,
619 		.flags	= IORESOURCE_DMA,
620 	},
621 	[3] = {
622 		/* DRCMR for TX */
623 		.start	= 24,
624 		.end	= 24,
625 		.flags	= IORESOURCE_DMA,
626 	},
627 };
628 
629 struct platform_device pxa25x_device_assp = {
630 	/* ASSP is basically equivalent to NSSP */
631 	.name		= "pxa25x-nssp",
632 	.id		= 2,
633 	.dev		= {
634 		.dma_mask = &pxa25x_assp_dma_mask,
635 		.coherent_dma_mask = DMA_BIT_MASK(32),
636 	},
637 	.resource	= pxa25x_resource_assp,
638 	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
639 };
640 #endif /* CONFIG_PXA25x */
641 
642 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
643 static struct resource pxa27x_resource_camera[] = {
644 	[0] = {
645 		.start	= 0x50000000,
646 		.end	= 0x50000fff,
647 		.flags	= IORESOURCE_MEM,
648 	},
649 	[1] = {
650 		.start	= IRQ_CAMERA,
651 		.end	= IRQ_CAMERA,
652 		.flags	= IORESOURCE_IRQ,
653 	},
654 };
655 
656 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
657 
658 static struct platform_device pxa27x_device_camera = {
659 	.name		= "pxa27x-camera",
660 	.id		= 0, /* This is used to put cameras on this interface */
661 	.dev		= {
662 		.dma_mask      		= &pxa27x_dma_mask_camera,
663 		.coherent_dma_mask	= 0xffffffff,
664 	},
665 	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
666 	.resource	= pxa27x_resource_camera,
667 };
668 
669 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
670 {
671 	pxa_register_device(&pxa27x_device_camera, info);
672 }
673 
674 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
675 
676 static struct resource pxa27x_resource_ohci[] = {
677 	[0] = {
678 		.start  = 0x4C000000,
679 		.end    = 0x4C00ff6f,
680 		.flags  = IORESOURCE_MEM,
681 	},
682 	[1] = {
683 		.start  = IRQ_USBH1,
684 		.end    = IRQ_USBH1,
685 		.flags  = IORESOURCE_IRQ,
686 	},
687 };
688 
689 struct platform_device pxa27x_device_ohci = {
690 	.name		= "pxa27x-ohci",
691 	.id		= -1,
692 	.dev		= {
693 		.dma_mask = &pxa27x_ohci_dma_mask,
694 		.coherent_dma_mask = DMA_BIT_MASK(32),
695 	},
696 	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
697 	.resource       = pxa27x_resource_ohci,
698 };
699 
700 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
701 {
702 	pxa_register_device(&pxa27x_device_ohci, info);
703 }
704 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
705 
706 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
707 static struct resource pxa27x_resource_keypad[] = {
708 	[0] = {
709 		.start	= 0x41500000,
710 		.end	= 0x4150004c,
711 		.flags	= IORESOURCE_MEM,
712 	},
713 	[1] = {
714 		.start	= IRQ_KEYPAD,
715 		.end	= IRQ_KEYPAD,
716 		.flags	= IORESOURCE_IRQ,
717 	},
718 };
719 
720 struct platform_device pxa27x_device_keypad = {
721 	.name		= "pxa27x-keypad",
722 	.id		= -1,
723 	.resource	= pxa27x_resource_keypad,
724 	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
725 };
726 
727 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
728 {
729 	pxa_register_device(&pxa27x_device_keypad, info);
730 }
731 
732 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
733 
734 static struct resource pxa27x_resource_ssp1[] = {
735 	[0] = {
736 		.start	= 0x41000000,
737 		.end	= 0x4100003f,
738 		.flags	= IORESOURCE_MEM,
739 	},
740 	[1] = {
741 		.start	= IRQ_SSP,
742 		.end	= IRQ_SSP,
743 		.flags	= IORESOURCE_IRQ,
744 	},
745 	[2] = {
746 		/* DRCMR for RX */
747 		.start	= 13,
748 		.end	= 13,
749 		.flags	= IORESOURCE_DMA,
750 	},
751 	[3] = {
752 		/* DRCMR for TX */
753 		.start	= 14,
754 		.end	= 14,
755 		.flags	= IORESOURCE_DMA,
756 	},
757 };
758 
759 struct platform_device pxa27x_device_ssp1 = {
760 	.name		= "pxa27x-ssp",
761 	.id		= 0,
762 	.dev		= {
763 		.dma_mask = &pxa27x_ssp1_dma_mask,
764 		.coherent_dma_mask = DMA_BIT_MASK(32),
765 	},
766 	.resource	= pxa27x_resource_ssp1,
767 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
768 };
769 
770 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
771 
772 static struct resource pxa27x_resource_ssp2[] = {
773 	[0] = {
774 		.start	= 0x41700000,
775 		.end	= 0x4170003f,
776 		.flags	= IORESOURCE_MEM,
777 	},
778 	[1] = {
779 		.start	= IRQ_SSP2,
780 		.end	= IRQ_SSP2,
781 		.flags	= IORESOURCE_IRQ,
782 	},
783 	[2] = {
784 		/* DRCMR for RX */
785 		.start	= 15,
786 		.end	= 15,
787 		.flags	= IORESOURCE_DMA,
788 	},
789 	[3] = {
790 		/* DRCMR for TX */
791 		.start	= 16,
792 		.end	= 16,
793 		.flags	= IORESOURCE_DMA,
794 	},
795 };
796 
797 struct platform_device pxa27x_device_ssp2 = {
798 	.name		= "pxa27x-ssp",
799 	.id		= 1,
800 	.dev		= {
801 		.dma_mask = &pxa27x_ssp2_dma_mask,
802 		.coherent_dma_mask = DMA_BIT_MASK(32),
803 	},
804 	.resource	= pxa27x_resource_ssp2,
805 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
806 };
807 
808 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
809 
810 static struct resource pxa27x_resource_ssp3[] = {
811 	[0] = {
812 		.start	= 0x41900000,
813 		.end	= 0x4190003f,
814 		.flags	= IORESOURCE_MEM,
815 	},
816 	[1] = {
817 		.start	= IRQ_SSP3,
818 		.end	= IRQ_SSP3,
819 		.flags	= IORESOURCE_IRQ,
820 	},
821 	[2] = {
822 		/* DRCMR for RX */
823 		.start	= 66,
824 		.end	= 66,
825 		.flags	= IORESOURCE_DMA,
826 	},
827 	[3] = {
828 		/* DRCMR for TX */
829 		.start	= 67,
830 		.end	= 67,
831 		.flags	= IORESOURCE_DMA,
832 	},
833 };
834 
835 struct platform_device pxa27x_device_ssp3 = {
836 	.name		= "pxa27x-ssp",
837 	.id		= 2,
838 	.dev		= {
839 		.dma_mask = &pxa27x_ssp3_dma_mask,
840 		.coherent_dma_mask = DMA_BIT_MASK(32),
841 	},
842 	.resource	= pxa27x_resource_ssp3,
843 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
844 };
845 
846 static struct resource pxa27x_resource_pwm0[] = {
847 	[0] = {
848 		.start	= 0x40b00000,
849 		.end	= 0x40b0001f,
850 		.flags	= IORESOURCE_MEM,
851 	},
852 };
853 
854 struct platform_device pxa27x_device_pwm0 = {
855 	.name		= "pxa27x-pwm",
856 	.id		= 0,
857 	.resource	= pxa27x_resource_pwm0,
858 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
859 };
860 
861 static struct resource pxa27x_resource_pwm1[] = {
862 	[0] = {
863 		.start	= 0x40c00000,
864 		.end	= 0x40c0001f,
865 		.flags	= IORESOURCE_MEM,
866 	},
867 };
868 
869 struct platform_device pxa27x_device_pwm1 = {
870 	.name		= "pxa27x-pwm",
871 	.id		= 1,
872 	.resource	= pxa27x_resource_pwm1,
873 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
874 };
875 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
876 
877 #ifdef CONFIG_PXA3xx
878 static struct resource pxa3xx_resources_mci2[] = {
879 	[0] = {
880 		.start	= 0x42000000,
881 		.end	= 0x42000fff,
882 		.flags	= IORESOURCE_MEM,
883 	},
884 	[1] = {
885 		.start	= IRQ_MMC2,
886 		.end	= IRQ_MMC2,
887 		.flags	= IORESOURCE_IRQ,
888 	},
889 	[2] = {
890 		.start	= 93,
891 		.end	= 93,
892 		.flags	= IORESOURCE_DMA,
893 	},
894 	[3] = {
895 		.start	= 94,
896 		.end	= 94,
897 		.flags	= IORESOURCE_DMA,
898 	},
899 };
900 
901 struct platform_device pxa3xx_device_mci2 = {
902 	.name		= "pxa2xx-mci",
903 	.id		= 1,
904 	.dev		= {
905 		.dma_mask = &pxamci_dmamask,
906 		.coherent_dma_mask =	0xffffffff,
907 	},
908 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
909 	.resource	= pxa3xx_resources_mci2,
910 };
911 
912 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
913 {
914 	pxa_register_device(&pxa3xx_device_mci2, info);
915 }
916 
917 static struct resource pxa3xx_resources_mci3[] = {
918 	[0] = {
919 		.start	= 0x42500000,
920 		.end	= 0x42500fff,
921 		.flags	= IORESOURCE_MEM,
922 	},
923 	[1] = {
924 		.start	= IRQ_MMC3,
925 		.end	= IRQ_MMC3,
926 		.flags	= IORESOURCE_IRQ,
927 	},
928 	[2] = {
929 		.start	= 100,
930 		.end	= 100,
931 		.flags	= IORESOURCE_DMA,
932 	},
933 	[3] = {
934 		.start	= 101,
935 		.end	= 101,
936 		.flags	= IORESOURCE_DMA,
937 	},
938 };
939 
940 struct platform_device pxa3xx_device_mci3 = {
941 	.name		= "pxa2xx-mci",
942 	.id		= 2,
943 	.dev		= {
944 		.dma_mask = &pxamci_dmamask,
945 		.coherent_dma_mask = 0xffffffff,
946 	},
947 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
948 	.resource	= pxa3xx_resources_mci3,
949 };
950 
951 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
952 {
953 	pxa_register_device(&pxa3xx_device_mci3, info);
954 }
955 
956 static struct resource pxa3xx_resources_gcu[] = {
957 	{
958 		.start	= 0x54000000,
959 		.end	= 0x54000fff,
960 		.flags	= IORESOURCE_MEM,
961 	},
962 	{
963 		.start	= IRQ_GCU,
964 		.end	= IRQ_GCU,
965 		.flags	= IORESOURCE_IRQ,
966 	},
967 };
968 
969 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
970 
971 struct platform_device pxa3xx_device_gcu = {
972 	.name		= "pxa3xx-gcu",
973 	.id		= -1,
974 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
975 	.resource	= pxa3xx_resources_gcu,
976 	.dev		= {
977 		.dma_mask = &pxa3xx_gcu_dmamask,
978 		.coherent_dma_mask = 0xffffffff,
979 	},
980 };
981 
982 #endif /* CONFIG_PXA3xx */
983 
984 #if defined(CONFIG_PXA3xx)
985 static struct resource pxa3xx_resources_i2c_power[] = {
986 	{
987 		.start  = 0x40f500c0,
988 		.end    = 0x40f500d3,
989 		.flags	= IORESOURCE_MEM,
990 	}, {
991 		.start	= IRQ_PWRI2C,
992 		.end	= IRQ_PWRI2C,
993 		.flags	= IORESOURCE_IRQ,
994 	},
995 };
996 
997 struct platform_device pxa3xx_device_i2c_power = {
998 	.name		= "pxa3xx-pwri2c",
999 	.id		= 1,
1000 	.resource	= pxa3xx_resources_i2c_power,
1001 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
1002 };
1003 
1004 static struct resource pxa3xx_resources_nand[] = {
1005 	[0] = {
1006 		.start	= 0x43100000,
1007 		.end	= 0x43100053,
1008 		.flags	= IORESOURCE_MEM,
1009 	},
1010 	[1] = {
1011 		.start	= IRQ_NAND,
1012 		.end	= IRQ_NAND,
1013 		.flags	= IORESOURCE_IRQ,
1014 	},
1015 	[2] = {
1016 		/* DRCMR for Data DMA */
1017 		.start	= 97,
1018 		.end	= 97,
1019 		.flags	= IORESOURCE_DMA,
1020 	},
1021 	[3] = {
1022 		/* DRCMR for Command DMA */
1023 		.start	= 99,
1024 		.end	= 99,
1025 		.flags	= IORESOURCE_DMA,
1026 	},
1027 };
1028 
1029 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1030 
1031 struct platform_device pxa3xx_device_nand = {
1032 	.name		= "pxa3xx-nand",
1033 	.id		= -1,
1034 	.dev		= {
1035 		.dma_mask = &pxa3xx_nand_dma_mask,
1036 		.coherent_dma_mask = DMA_BIT_MASK(32),
1037 	},
1038 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
1039 	.resource	= pxa3xx_resources_nand,
1040 };
1041 
1042 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1043 {
1044 	pxa_register_device(&pxa3xx_device_nand, info);
1045 }
1046 
1047 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1048 
1049 static struct resource pxa3xx_resource_ssp4[] = {
1050 	[0] = {
1051 		.start	= 0x41a00000,
1052 		.end	= 0x41a0003f,
1053 		.flags	= IORESOURCE_MEM,
1054 	},
1055 	[1] = {
1056 		.start	= IRQ_SSP4,
1057 		.end	= IRQ_SSP4,
1058 		.flags	= IORESOURCE_IRQ,
1059 	},
1060 	[2] = {
1061 		/* DRCMR for RX */
1062 		.start	= 2,
1063 		.end	= 2,
1064 		.flags	= IORESOURCE_DMA,
1065 	},
1066 	[3] = {
1067 		/* DRCMR for TX */
1068 		.start	= 3,
1069 		.end	= 3,
1070 		.flags	= IORESOURCE_DMA,
1071 	},
1072 };
1073 
1074 /*
1075  * PXA3xx SSP is basically equivalent to PXA27x.
1076  * However, we need to register the device by the correct name in order to
1077  * make the driver set the correct internal type, hence we provide specific
1078  * platform_devices for each of them.
1079  */
1080 struct platform_device pxa3xx_device_ssp1 = {
1081 	.name		= "pxa3xx-ssp",
1082 	.id		= 0,
1083 	.dev		= {
1084 		.dma_mask = &pxa27x_ssp1_dma_mask,
1085 		.coherent_dma_mask = DMA_BIT_MASK(32),
1086 	},
1087 	.resource	= pxa27x_resource_ssp1,
1088 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
1089 };
1090 
1091 struct platform_device pxa3xx_device_ssp2 = {
1092 	.name		= "pxa3xx-ssp",
1093 	.id		= 1,
1094 	.dev		= {
1095 		.dma_mask = &pxa27x_ssp2_dma_mask,
1096 		.coherent_dma_mask = DMA_BIT_MASK(32),
1097 	},
1098 	.resource	= pxa27x_resource_ssp2,
1099 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
1100 };
1101 
1102 struct platform_device pxa3xx_device_ssp3 = {
1103 	.name		= "pxa3xx-ssp",
1104 	.id		= 2,
1105 	.dev		= {
1106 		.dma_mask = &pxa27x_ssp3_dma_mask,
1107 		.coherent_dma_mask = DMA_BIT_MASK(32),
1108 	},
1109 	.resource	= pxa27x_resource_ssp3,
1110 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
1111 };
1112 
1113 struct platform_device pxa3xx_device_ssp4 = {
1114 	.name		= "pxa3xx-ssp",
1115 	.id		= 3,
1116 	.dev		= {
1117 		.dma_mask = &pxa3xx_ssp4_dma_mask,
1118 		.coherent_dma_mask = DMA_BIT_MASK(32),
1119 	},
1120 	.resource	= pxa3xx_resource_ssp4,
1121 	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1122 };
1123 #endif /* CONFIG_PXA3xx */
1124 
1125 struct resource pxa_resource_gpio[] = {
1126 	{
1127 		.start	= 0x40e00000,
1128 		.end	= 0x40e0ffff,
1129 		.flags	= IORESOURCE_MEM,
1130 	}, {
1131 		.start	= IRQ_GPIO0,
1132 		.end	= IRQ_GPIO0,
1133 		.name	= "gpio0",
1134 		.flags	= IORESOURCE_IRQ,
1135 	}, {
1136 		.start	= IRQ_GPIO1,
1137 		.end	= IRQ_GPIO1,
1138 		.name	= "gpio1",
1139 		.flags	= IORESOURCE_IRQ,
1140 	}, {
1141 		.start	= IRQ_GPIO_2_x,
1142 		.end	= IRQ_GPIO_2_x,
1143 		.name	= "gpio_mux",
1144 		.flags	= IORESOURCE_IRQ,
1145 	},
1146 };
1147 
1148 struct platform_device pxa25x_device_gpio = {
1149 #ifdef CONFIG_CPU_PXA26x
1150 	.name		= "pxa26x-gpio",
1151 #else
1152 	.name		= "pxa25x-gpio",
1153 #endif
1154 	.id		= -1,
1155 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1156 	.resource	= pxa_resource_gpio,
1157 };
1158 
1159 struct platform_device pxa27x_device_gpio = {
1160 	.name		= "pxa27x-gpio",
1161 	.id		= -1,
1162 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1163 	.resource	= pxa_resource_gpio,
1164 };
1165 
1166 struct platform_device pxa3xx_device_gpio = {
1167 	.name		= "pxa3xx-gpio",
1168 	.id		= -1,
1169 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1170 	.resource	= pxa_resource_gpio,
1171 };
1172 
1173 struct platform_device pxa93x_device_gpio = {
1174 	.name		= "pxa93x-gpio",
1175 	.id		= -1,
1176 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1177 	.resource	= pxa_resource_gpio,
1178 };
1179 
1180 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1181  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1182 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1183 {
1184 	struct platform_device *pd;
1185 
1186 	pd = platform_device_alloc("pxa2xx-spi", id);
1187 	if (pd == NULL) {
1188 		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1189 		       id);
1190 		return;
1191 	}
1192 
1193 	pd->dev.platform_data = info;
1194 	platform_device_add(pd);
1195 }
1196