xref: /linux/arch/arm/mach-pxa/devices.c (revision 917195d6f8293c35fcf9ed4bfe18f52cc1c9d2e6) 
1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/module.h>
3 #include <linux/kernel.h>
4 #include <linux/init.h>
5 #include <linux/platform_device.h>
6 #include <linux/clkdev.h>
7 #include <linux/clk-provider.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/dmaengine.h>
10 #include <linux/gpio-pxa.h>
11 #include <linux/platform_data/i2c-pxa.h>
12 #include <linux/soc/pxa/cpu.h>
13 
14 #include "udc.h"
15 #include <linux/platform_data/video-pxafb.h>
16 #include <linux/platform_data/mmc-pxamci.h>
17 #include "irqs.h"
18 #include <linux/platform_data/usb-ohci-pxa27x.h>
19 #include <linux/platform_data/mmp_dma.h>
20 
21 #include "mfp-pxa2xx.h"
22 #include "regs-ost.h"
23 #include "reset.h"
24 #include "devices.h"
25 #include "generic.h"
26 
27 void __init pxa_register_device(struct platform_device *dev, void *data)
28 {
29 	int ret;
30 
31 	dev->dev.platform_data = data;
32 
33 	ret = platform_device_register(dev);
34 	if (ret)
35 		dev_err(&dev->dev, "unable to register device: %d\n", ret);
36 }
37 
38 static struct resource pxa_resource_pmu = {
39 	.start	= IRQ_PMU,
40 	.end	= IRQ_PMU,
41 	.flags	= IORESOURCE_IRQ,
42 };
43 
44 struct platform_device pxa_device_pmu = {
45 	.name		= "xscale-pmu",
46 	.id		= -1,
47 	.resource	= &pxa_resource_pmu,
48 	.num_resources	= 1,
49 };
50 
51 static struct resource pxamci_resources[] = {
52 	[0] = {
53 		.start	= 0x41100000,
54 		.end	= 0x41100fff,
55 		.flags	= IORESOURCE_MEM,
56 	},
57 	[1] = {
58 		.start	= IRQ_MMC,
59 		.end	= IRQ_MMC,
60 		.flags	= IORESOURCE_IRQ,
61 	},
62 };
63 
64 static u64 pxamci_dmamask = 0xffffffffUL;
65 
66 struct platform_device pxa_device_mci = {
67 	.name		= "pxa2xx-mci",
68 	.id		= 0,
69 	.dev		= {
70 		.dma_mask = &pxamci_dmamask,
71 		.coherent_dma_mask = 0xffffffff,
72 	},
73 	.num_resources	= ARRAY_SIZE(pxamci_resources),
74 	.resource	= pxamci_resources,
75 };
76 
77 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
78 {
79 	pxa_register_device(&pxa_device_mci, info);
80 }
81 
82 static struct pxa2xx_udc_mach_info pxa_udc_info = {
83 	.gpio_pullup = -1,
84 };
85 
86 static struct resource pxa2xx_udc_resources[] = {
87 	[0] = {
88 		.start	= 0x40600000,
89 		.end	= 0x4060ffff,
90 		.flags	= IORESOURCE_MEM,
91 	},
92 	[1] = {
93 		.start	= IRQ_USB,
94 		.end	= IRQ_USB,
95 		.flags	= IORESOURCE_IRQ,
96 	},
97 };
98 
99 static u64 udc_dma_mask = ~(u32)0;
100 
101 struct platform_device pxa25x_device_udc = {
102 	.name		= "pxa25x-udc",
103 	.id		= -1,
104 	.resource	= pxa2xx_udc_resources,
105 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
106 	.dev		=  {
107 		.platform_data	= &pxa_udc_info,
108 		.dma_mask	= &udc_dma_mask,
109 	}
110 };
111 
112 struct platform_device pxa27x_device_udc = {
113 	.name		= "pxa27x-udc",
114 	.id		= -1,
115 	.resource	= pxa2xx_udc_resources,
116 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
117 	.dev		=  {
118 		.platform_data	= &pxa_udc_info,
119 		.dma_mask	= &udc_dma_mask,
120 	}
121 };
122 
123 static struct resource pxafb_resources[] = {
124 	[0] = {
125 		.start	= 0x44000000,
126 		.end	= 0x4400ffff,
127 		.flags	= IORESOURCE_MEM,
128 	},
129 	[1] = {
130 		.start	= IRQ_LCD,
131 		.end	= IRQ_LCD,
132 		.flags	= IORESOURCE_IRQ,
133 	},
134 };
135 
136 static u64 fb_dma_mask = ~(u64)0;
137 
138 struct platform_device pxa_device_fb = {
139 	.name		= "pxa2xx-fb",
140 	.id		= -1,
141 	.dev		= {
142 		.dma_mask	= &fb_dma_mask,
143 		.coherent_dma_mask = 0xffffffff,
144 	},
145 	.num_resources	= ARRAY_SIZE(pxafb_resources),
146 	.resource	= pxafb_resources,
147 };
148 
149 void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
150 {
151 	pxa_device_fb.dev.parent = parent;
152 	pxa_register_device(&pxa_device_fb, info);
153 }
154 
155 static struct resource pxa_resource_ffuart[] = {
156 	{
157 		.start	= 0x40100000,
158 		.end	= 0x40100023,
159 		.flags	= IORESOURCE_MEM,
160 	}, {
161 		.start	= IRQ_FFUART,
162 		.end	= IRQ_FFUART,
163 		.flags	= IORESOURCE_IRQ,
164 	}
165 };
166 
167 struct platform_device pxa_device_ffuart = {
168 	.name		= "pxa2xx-uart",
169 	.id		= 0,
170 	.resource	= pxa_resource_ffuart,
171 	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
172 };
173 
174 void __init pxa_set_ffuart_info(void *info)
175 {
176 	pxa_register_device(&pxa_device_ffuart, info);
177 }
178 
179 static struct resource pxa_resource_btuart[] = {
180 	{
181 		.start	= 0x40200000,
182 		.end	= 0x40200023,
183 		.flags	= IORESOURCE_MEM,
184 	}, {
185 		.start	= IRQ_BTUART,
186 		.end	= IRQ_BTUART,
187 		.flags	= IORESOURCE_IRQ,
188 	}
189 };
190 
191 struct platform_device pxa_device_btuart = {
192 	.name		= "pxa2xx-uart",
193 	.id		= 1,
194 	.resource	= pxa_resource_btuart,
195 	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
196 };
197 
198 void __init pxa_set_btuart_info(void *info)
199 {
200 	pxa_register_device(&pxa_device_btuart, info);
201 }
202 
203 static struct resource pxa_resource_stuart[] = {
204 	{
205 		.start	= 0x40700000,
206 		.end	= 0x40700023,
207 		.flags	= IORESOURCE_MEM,
208 	}, {
209 		.start	= IRQ_STUART,
210 		.end	= IRQ_STUART,
211 		.flags	= IORESOURCE_IRQ,
212 	}
213 };
214 
215 struct platform_device pxa_device_stuart = {
216 	.name		= "pxa2xx-uart",
217 	.id		= 2,
218 	.resource	= pxa_resource_stuart,
219 	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
220 };
221 
222 void __init pxa_set_stuart_info(void *info)
223 {
224 	pxa_register_device(&pxa_device_stuart, info);
225 }
226 
227 static struct resource pxa_resource_hwuart[] = {
228 	{
229 		.start	= 0x41600000,
230 		.end	= 0x4160002F,
231 		.flags	= IORESOURCE_MEM,
232 	}, {
233 		.start	= IRQ_HWUART,
234 		.end	= IRQ_HWUART,
235 		.flags	= IORESOURCE_IRQ,
236 	}
237 };
238 
239 struct platform_device pxa_device_hwuart = {
240 	.name		= "pxa2xx-uart",
241 	.id		= 3,
242 	.resource	= pxa_resource_hwuart,
243 	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
244 };
245 
246 void __init pxa_set_hwuart_info(void *info)
247 {
248 	if (cpu_is_pxa255())
249 		pxa_register_device(&pxa_device_hwuart, info);
250 	else
251 		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
252 }
253 
254 static struct resource pxai2c_resources[] = {
255 	{
256 		.start	= 0x40301680,
257 		.end	= 0x403016a3,
258 		.flags	= IORESOURCE_MEM,
259 	}, {
260 		.start	= IRQ_I2C,
261 		.end	= IRQ_I2C,
262 		.flags	= IORESOURCE_IRQ,
263 	},
264 };
265 
266 struct platform_device pxa_device_i2c = {
267 	.name		= "pxa2xx-i2c",
268 	.id		= 0,
269 	.resource	= pxai2c_resources,
270 	.num_resources	= ARRAY_SIZE(pxai2c_resources),
271 };
272 
273 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
274 {
275 	pxa_register_device(&pxa_device_i2c, info);
276 }
277 
278 #ifdef CONFIG_PXA27x
279 static struct resource pxa27x_resources_i2c_power[] = {
280 	{
281 		.start	= 0x40f00180,
282 		.end	= 0x40f001a3,
283 		.flags	= IORESOURCE_MEM,
284 	}, {
285 		.start	= IRQ_PWRI2C,
286 		.end	= IRQ_PWRI2C,
287 		.flags	= IORESOURCE_IRQ,
288 	},
289 };
290 
291 struct platform_device pxa27x_device_i2c_power = {
292 	.name		= "pxa2xx-i2c",
293 	.id		= 1,
294 	.resource	= pxa27x_resources_i2c_power,
295 	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
296 };
297 #endif
298 
299 static struct resource pxai2s_resources[] = {
300 	{
301 		.start	= 0x40400000,
302 		.end	= 0x40400083,
303 		.flags	= IORESOURCE_MEM,
304 	}, {
305 		.start	= IRQ_I2S,
306 		.end	= IRQ_I2S,
307 		.flags	= IORESOURCE_IRQ,
308 	},
309 };
310 
311 struct platform_device pxa_device_i2s = {
312 	.name		= "pxa2xx-i2s",
313 	.id		= -1,
314 	.resource	= pxai2s_resources,
315 	.num_resources	= ARRAY_SIZE(pxai2s_resources),
316 };
317 
318 struct platform_device pxa_device_asoc_ssp1 = {
319 	.name		= "pxa-ssp-dai",
320 	.id		= 0,
321 };
322 
323 struct platform_device pxa_device_asoc_ssp2= {
324 	.name		= "pxa-ssp-dai",
325 	.id		= 1,
326 };
327 
328 struct platform_device pxa_device_asoc_ssp3 = {
329 	.name		= "pxa-ssp-dai",
330 	.id		= 2,
331 };
332 
333 struct platform_device pxa_device_asoc_ssp4 = {
334 	.name		= "pxa-ssp-dai",
335 	.id		= 3,
336 };
337 
338 struct platform_device pxa_device_asoc_platform = {
339 	.name		= "pxa-pcm-audio",
340 	.id		= -1,
341 };
342 
343 static struct resource pxa_rtc_resources[] = {
344 	[0] = {
345 		.start  = 0x40900000,
346 		.end	= 0x40900000 + 0x3b,
347 		.flags  = IORESOURCE_MEM,
348 	},
349 	[1] = {
350 		.start  = IRQ_RTC1Hz,
351 		.end    = IRQ_RTC1Hz,
352 		.name	= "rtc 1Hz",
353 		.flags  = IORESOURCE_IRQ,
354 	},
355 	[2] = {
356 		.start  = IRQ_RTCAlrm,
357 		.end    = IRQ_RTCAlrm,
358 		.name	= "rtc alarm",
359 		.flags  = IORESOURCE_IRQ,
360 	},
361 };
362 
363 struct platform_device pxa_device_rtc = {
364 	.name		= "pxa-rtc",
365 	.id		= -1,
366 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
367 	.resource       = pxa_rtc_resources,
368 };
369 
370 struct platform_device sa1100_device_rtc = {
371 	.name		= "sa1100-rtc",
372 	.id		= -1,
373 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
374 	.resource       = pxa_rtc_resources,
375 };
376 
377 #ifdef CONFIG_PXA25x
378 
379 static struct resource pxa25x_resource_pwm0[] = {
380 	[0] = {
381 		.start	= 0x40b00000,
382 		.end	= 0x40b0000f,
383 		.flags	= IORESOURCE_MEM,
384 	},
385 };
386 
387 struct platform_device pxa25x_device_pwm0 = {
388 	.name		= "pxa25x-pwm",
389 	.id		= 0,
390 	.resource	= pxa25x_resource_pwm0,
391 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
392 };
393 
394 static struct resource pxa25x_resource_pwm1[] = {
395 	[0] = {
396 		.start	= 0x40c00000,
397 		.end	= 0x40c0000f,
398 		.flags	= IORESOURCE_MEM,
399 	},
400 };
401 
402 struct platform_device pxa25x_device_pwm1 = {
403 	.name		= "pxa25x-pwm",
404 	.id		= 1,
405 	.resource	= pxa25x_resource_pwm1,
406 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
407 };
408 
409 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
410 
411 static struct resource pxa25x_resource_ssp[] = {
412 	[0] = {
413 		.start	= 0x41000000,
414 		.end	= 0x4100001f,
415 		.flags	= IORESOURCE_MEM,
416 	},
417 	[1] = {
418 		.start	= IRQ_SSP,
419 		.end	= IRQ_SSP,
420 		.flags	= IORESOURCE_IRQ,
421 	},
422 };
423 
424 struct platform_device pxa25x_device_ssp = {
425 	.name		= "pxa25x-ssp",
426 	.id		= 0,
427 	.dev		= {
428 		.dma_mask = &pxa25x_ssp_dma_mask,
429 		.coherent_dma_mask = DMA_BIT_MASK(32),
430 	},
431 	.resource	= pxa25x_resource_ssp,
432 	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
433 };
434 
435 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
436 
437 static struct resource pxa25x_resource_nssp[] = {
438 	[0] = {
439 		.start	= 0x41400000,
440 		.end	= 0x4140002f,
441 		.flags	= IORESOURCE_MEM,
442 	},
443 	[1] = {
444 		.start	= IRQ_NSSP,
445 		.end	= IRQ_NSSP,
446 		.flags	= IORESOURCE_IRQ,
447 	},
448 };
449 
450 struct platform_device pxa25x_device_nssp = {
451 	.name		= "pxa25x-nssp",
452 	.id		= 1,
453 	.dev		= {
454 		.dma_mask = &pxa25x_nssp_dma_mask,
455 		.coherent_dma_mask = DMA_BIT_MASK(32),
456 	},
457 	.resource	= pxa25x_resource_nssp,
458 	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
459 };
460 
461 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
462 
463 static struct resource pxa25x_resource_assp[] = {
464 	[0] = {
465 		.start	= 0x41500000,
466 		.end	= 0x4150002f,
467 		.flags	= IORESOURCE_MEM,
468 	},
469 	[1] = {
470 		.start	= IRQ_ASSP,
471 		.end	= IRQ_ASSP,
472 		.flags	= IORESOURCE_IRQ,
473 	},
474 };
475 
476 struct platform_device pxa25x_device_assp = {
477 	/* ASSP is basically equivalent to NSSP */
478 	.name		= "pxa25x-nssp",
479 	.id		= 2,
480 	.dev		= {
481 		.dma_mask = &pxa25x_assp_dma_mask,
482 		.coherent_dma_mask = DMA_BIT_MASK(32),
483 	},
484 	.resource	= pxa25x_resource_assp,
485 	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
486 };
487 #endif /* CONFIG_PXA25x */
488 
489 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
490 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
491 
492 static struct resource pxa27x_resource_ohci[] = {
493 	[0] = {
494 		.start  = 0x4C000000,
495 		.end    = 0x4C00ff6f,
496 		.flags  = IORESOURCE_MEM,
497 	},
498 	[1] = {
499 		.start  = IRQ_USBH1,
500 		.end    = IRQ_USBH1,
501 		.flags  = IORESOURCE_IRQ,
502 	},
503 };
504 
505 struct platform_device pxa27x_device_ohci = {
506 	.name		= "pxa27x-ohci",
507 	.id		= -1,
508 	.dev		= {
509 		.dma_mask = &pxa27x_ohci_dma_mask,
510 		.coherent_dma_mask = DMA_BIT_MASK(32),
511 	},
512 	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
513 	.resource       = pxa27x_resource_ohci,
514 };
515 
516 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
517 {
518 	pxa_register_device(&pxa27x_device_ohci, info);
519 }
520 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
521 
522 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
523 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
524 
525 static struct resource pxa27x_resource_ssp1[] = {
526 	[0] = {
527 		.start	= 0x41000000,
528 		.end	= 0x4100003f,
529 		.flags	= IORESOURCE_MEM,
530 	},
531 	[1] = {
532 		.start	= IRQ_SSP,
533 		.end	= IRQ_SSP,
534 		.flags	= IORESOURCE_IRQ,
535 	},
536 };
537 
538 struct platform_device pxa27x_device_ssp1 = {
539 	.name		= "pxa27x-ssp",
540 	.id		= 0,
541 	.dev		= {
542 		.dma_mask = &pxa27x_ssp1_dma_mask,
543 		.coherent_dma_mask = DMA_BIT_MASK(32),
544 	},
545 	.resource	= pxa27x_resource_ssp1,
546 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
547 };
548 
549 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
550 
551 static struct resource pxa27x_resource_ssp2[] = {
552 	[0] = {
553 		.start	= 0x41700000,
554 		.end	= 0x4170003f,
555 		.flags	= IORESOURCE_MEM,
556 	},
557 	[1] = {
558 		.start	= IRQ_SSP2,
559 		.end	= IRQ_SSP2,
560 		.flags	= IORESOURCE_IRQ,
561 	},
562 };
563 
564 struct platform_device pxa27x_device_ssp2 = {
565 	.name		= "pxa27x-ssp",
566 	.id		= 1,
567 	.dev		= {
568 		.dma_mask = &pxa27x_ssp2_dma_mask,
569 		.coherent_dma_mask = DMA_BIT_MASK(32),
570 	},
571 	.resource	= pxa27x_resource_ssp2,
572 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
573 };
574 
575 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
576 
577 static struct resource pxa27x_resource_ssp3[] = {
578 	[0] = {
579 		.start	= 0x41900000,
580 		.end	= 0x4190003f,
581 		.flags	= IORESOURCE_MEM,
582 	},
583 	[1] = {
584 		.start	= IRQ_SSP3,
585 		.end	= IRQ_SSP3,
586 		.flags	= IORESOURCE_IRQ,
587 	},
588 };
589 
590 struct platform_device pxa27x_device_ssp3 = {
591 	.name		= "pxa27x-ssp",
592 	.id		= 2,
593 	.dev		= {
594 		.dma_mask = &pxa27x_ssp3_dma_mask,
595 		.coherent_dma_mask = DMA_BIT_MASK(32),
596 	},
597 	.resource	= pxa27x_resource_ssp3,
598 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
599 };
600 
601 static struct resource pxa27x_resource_pwm0[] = {
602 	[0] = {
603 		.start	= 0x40b00000,
604 		.end	= 0x40b0001f,
605 		.flags	= IORESOURCE_MEM,
606 	},
607 };
608 
609 struct platform_device pxa27x_device_pwm0 = {
610 	.name		= "pxa27x-pwm",
611 	.id		= 0,
612 	.resource	= pxa27x_resource_pwm0,
613 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
614 };
615 
616 static struct resource pxa27x_resource_pwm1[] = {
617 	[0] = {
618 		.start	= 0x40c00000,
619 		.end	= 0x40c0001f,
620 		.flags	= IORESOURCE_MEM,
621 	},
622 };
623 
624 struct platform_device pxa27x_device_pwm1 = {
625 	.name		= "pxa27x-pwm",
626 	.id		= 1,
627 	.resource	= pxa27x_resource_pwm1,
628 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
629 };
630 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
631 
632 struct resource pxa_resource_gpio[] = {
633 	{
634 		.start	= 0x40e00000,
635 		.end	= 0x40e0ffff,
636 		.flags	= IORESOURCE_MEM,
637 	}, {
638 		.start	= IRQ_GPIO0,
639 		.end	= IRQ_GPIO0,
640 		.name	= "gpio0",
641 		.flags	= IORESOURCE_IRQ,
642 	}, {
643 		.start	= IRQ_GPIO1,
644 		.end	= IRQ_GPIO1,
645 		.name	= "gpio1",
646 		.flags	= IORESOURCE_IRQ,
647 	}, {
648 		.start	= IRQ_GPIO_2_x,
649 		.end	= IRQ_GPIO_2_x,
650 		.name	= "gpio_mux",
651 		.flags	= IORESOURCE_IRQ,
652 	},
653 };
654 
655 static struct pxa_gpio_platform_data pxa2xx_gpio_info = {
656 	.irq_base	= PXA_GPIO_TO_IRQ(0),
657 	.gpio_set_wake	= gpio_set_wake,
658 };
659 
660 struct platform_device pxa25x_device_gpio = {
661 	.name		= "pxa25x-gpio",
662 	.id		= -1,
663 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
664 	.resource	= pxa_resource_gpio,
665 	.dev		= {
666 		.platform_data	= &pxa2xx_gpio_info,
667 	},
668 };
669 
670 struct platform_device pxa27x_device_gpio = {
671 	.name		= "pxa27x-gpio",
672 	.id		= -1,
673 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
674 	.resource	= pxa_resource_gpio,
675 	.dev		= {
676 		.platform_data	= &pxa2xx_gpio_info,
677 	},
678 };
679 
680 static struct resource pxa_dma_resource[] = {
681 	[0] = {
682 		.start	= 0x40000000,
683 		.end	= 0x4000ffff,
684 		.flags	= IORESOURCE_MEM,
685 	},
686 	[1] = {
687 		.start	= IRQ_DMA,
688 		.end	= IRQ_DMA,
689 		.flags	= IORESOURCE_IRQ,
690 	},
691 };
692 
693 static u64 pxadma_dmamask = 0xffffffffUL;
694 
695 static struct platform_device pxa2xx_pxa_dma = {
696 	.name		= "pxa-dma",
697 	.id		= 0,
698 	.dev		= {
699 		.dma_mask = &pxadma_dmamask,
700 		.coherent_dma_mask = 0xffffffff,
701 	},
702 	.num_resources	= ARRAY_SIZE(pxa_dma_resource),
703 	.resource	= pxa_dma_resource,
704 };
705 
706 void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
707 {
708 	pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
709 }
710 
711 void __init pxa_register_wdt(unsigned int reset_status)
712 {
713 	struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
714 
715 	reset_status &= RESET_STATUS_WATCHDOG;
716 	platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
717 					  &reset_status, sizeof(reset_status));
718 }
719