xref: /linux/arch/arm/mach-pxa/devices.c (revision 4321e1a12b811c02441240aa6183156791204f3f) 
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/spi/pxa2xx_spi.h>
7 
8 #include <asm/pmu.h>
9 #include <mach/udc.h>
10 #include <mach/pxa3xx-u2d.h>
11 #include <mach/pxafb.h>
12 #include <mach/mmc.h>
13 #include <mach/irda.h>
14 #include <mach/ohci.h>
15 #include <plat/pxa27x_keypad.h>
16 #include <mach/camera.h>
17 #include <mach/audio.h>
18 #include <mach/hardware.h>
19 #include <plat/i2c.h>
20 #include <plat/pxa3xx_nand.h>
21 
22 #include "devices.h"
23 #include "generic.h"
24 
25 void __init pxa_register_device(struct platform_device *dev, void *data)
26 {
27 	int ret;
28 
29 	dev->dev.platform_data = data;
30 
31 	ret = platform_device_register(dev);
32 	if (ret)
33 		dev_err(&dev->dev, "unable to register device: %d\n", ret);
34 }
35 
36 static struct resource pxa_resource_pmu = {
37 	.start	= IRQ_PMU,
38 	.end	= IRQ_PMU,
39 	.flags	= IORESOURCE_IRQ,
40 };
41 
42 struct platform_device pxa_device_pmu = {
43 	.name		= "arm-pmu",
44 	.id		= ARM_PMU_DEVICE_CPU,
45 	.resource	= &pxa_resource_pmu,
46 	.num_resources	= 1,
47 };
48 
49 static struct resource pxamci_resources[] = {
50 	[0] = {
51 		.start	= 0x41100000,
52 		.end	= 0x41100fff,
53 		.flags	= IORESOURCE_MEM,
54 	},
55 	[1] = {
56 		.start	= IRQ_MMC,
57 		.end	= IRQ_MMC,
58 		.flags	= IORESOURCE_IRQ,
59 	},
60 	[2] = {
61 		.start	= 21,
62 		.end	= 21,
63 		.flags	= IORESOURCE_DMA,
64 	},
65 	[3] = {
66 		.start	= 22,
67 		.end	= 22,
68 		.flags	= IORESOURCE_DMA,
69 	},
70 };
71 
72 static u64 pxamci_dmamask = 0xffffffffUL;
73 
74 struct platform_device pxa_device_mci = {
75 	.name		= "pxa2xx-mci",
76 	.id		= 0,
77 	.dev		= {
78 		.dma_mask = &pxamci_dmamask,
79 		.coherent_dma_mask = 0xffffffff,
80 	},
81 	.num_resources	= ARRAY_SIZE(pxamci_resources),
82 	.resource	= pxamci_resources,
83 };
84 
85 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86 {
87 	pxa_register_device(&pxa_device_mci, info);
88 }
89 
90 
91 static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 	.gpio_pullup = -1,
93 	.gpio_vbus   = -1,
94 };
95 
96 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
97 {
98 	memcpy(&pxa_udc_info, info, sizeof *info);
99 }
100 
101 static struct resource pxa2xx_udc_resources[] = {
102 	[0] = {
103 		.start	= 0x40600000,
104 		.end	= 0x4060ffff,
105 		.flags	= IORESOURCE_MEM,
106 	},
107 	[1] = {
108 		.start	= IRQ_USB,
109 		.end	= IRQ_USB,
110 		.flags	= IORESOURCE_IRQ,
111 	},
112 };
113 
114 static u64 udc_dma_mask = ~(u32)0;
115 
116 struct platform_device pxa25x_device_udc = {
117 	.name		= "pxa25x-udc",
118 	.id		= -1,
119 	.resource	= pxa2xx_udc_resources,
120 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
121 	.dev		=  {
122 		.platform_data	= &pxa_udc_info,
123 		.dma_mask	= &udc_dma_mask,
124 	}
125 };
126 
127 struct platform_device pxa27x_device_udc = {
128 	.name		= "pxa27x-udc",
129 	.id		= -1,
130 	.resource	= pxa2xx_udc_resources,
131 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
132 	.dev		=  {
133 		.platform_data	= &pxa_udc_info,
134 		.dma_mask	= &udc_dma_mask,
135 	}
136 };
137 
138 #ifdef CONFIG_PXA3xx
139 static struct resource pxa3xx_u2d_resources[] = {
140 	[0] = {
141 		.start	= 0x54100000,
142 		.end	= 0x54100fff,
143 		.flags	= IORESOURCE_MEM,
144 	},
145 	[1] = {
146 		.start	= IRQ_USB2,
147 		.end	= IRQ_USB2,
148 		.flags	= IORESOURCE_IRQ,
149 	},
150 };
151 
152 struct platform_device pxa3xx_device_u2d = {
153 	.name		= "pxa3xx-u2d",
154 	.id		= -1,
155 	.resource	= pxa3xx_u2d_resources,
156 	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
157 };
158 
159 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
160 {
161 	pxa_register_device(&pxa3xx_device_u2d, info);
162 }
163 #endif /* CONFIG_PXA3xx */
164 
165 static struct resource pxafb_resources[] = {
166 	[0] = {
167 		.start	= 0x44000000,
168 		.end	= 0x4400ffff,
169 		.flags	= IORESOURCE_MEM,
170 	},
171 	[1] = {
172 		.start	= IRQ_LCD,
173 		.end	= IRQ_LCD,
174 		.flags	= IORESOURCE_IRQ,
175 	},
176 };
177 
178 static u64 fb_dma_mask = ~(u64)0;
179 
180 struct platform_device pxa_device_fb = {
181 	.name		= "pxa2xx-fb",
182 	.id		= -1,
183 	.dev		= {
184 		.dma_mask	= &fb_dma_mask,
185 		.coherent_dma_mask = 0xffffffff,
186 	},
187 	.num_resources	= ARRAY_SIZE(pxafb_resources),
188 	.resource	= pxafb_resources,
189 };
190 
191 void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
192 {
193 	pxa_device_fb.dev.parent = parent;
194 	pxa_register_device(&pxa_device_fb, info);
195 }
196 
197 static struct resource pxa_resource_ffuart[] = {
198 	{
199 		.start	= 0x40100000,
200 		.end	= 0x40100023,
201 		.flags	= IORESOURCE_MEM,
202 	}, {
203 		.start	= IRQ_FFUART,
204 		.end	= IRQ_FFUART,
205 		.flags	= IORESOURCE_IRQ,
206 	}
207 };
208 
209 struct platform_device pxa_device_ffuart = {
210 	.name		= "pxa2xx-uart",
211 	.id		= 0,
212 	.resource	= pxa_resource_ffuart,
213 	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
214 };
215 
216 void __init pxa_set_ffuart_info(void *info)
217 {
218 	pxa_register_device(&pxa_device_ffuart, info);
219 }
220 
221 static struct resource pxa_resource_btuart[] = {
222 	{
223 		.start	= 0x40200000,
224 		.end	= 0x40200023,
225 		.flags	= IORESOURCE_MEM,
226 	}, {
227 		.start	= IRQ_BTUART,
228 		.end	= IRQ_BTUART,
229 		.flags	= IORESOURCE_IRQ,
230 	}
231 };
232 
233 struct platform_device pxa_device_btuart = {
234 	.name		= "pxa2xx-uart",
235 	.id		= 1,
236 	.resource	= pxa_resource_btuart,
237 	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
238 };
239 
240 void __init pxa_set_btuart_info(void *info)
241 {
242 	pxa_register_device(&pxa_device_btuart, info);
243 }
244 
245 static struct resource pxa_resource_stuart[] = {
246 	{
247 		.start	= 0x40700000,
248 		.end	= 0x40700023,
249 		.flags	= IORESOURCE_MEM,
250 	}, {
251 		.start	= IRQ_STUART,
252 		.end	= IRQ_STUART,
253 		.flags	= IORESOURCE_IRQ,
254 	}
255 };
256 
257 struct platform_device pxa_device_stuart = {
258 	.name		= "pxa2xx-uart",
259 	.id		= 2,
260 	.resource	= pxa_resource_stuart,
261 	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
262 };
263 
264 void __init pxa_set_stuart_info(void *info)
265 {
266 	pxa_register_device(&pxa_device_stuart, info);
267 }
268 
269 static struct resource pxa_resource_hwuart[] = {
270 	{
271 		.start	= 0x41600000,
272 		.end	= 0x4160002F,
273 		.flags	= IORESOURCE_MEM,
274 	}, {
275 		.start	= IRQ_HWUART,
276 		.end	= IRQ_HWUART,
277 		.flags	= IORESOURCE_IRQ,
278 	}
279 };
280 
281 struct platform_device pxa_device_hwuart = {
282 	.name		= "pxa2xx-uart",
283 	.id		= 3,
284 	.resource	= pxa_resource_hwuart,
285 	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
286 };
287 
288 void __init pxa_set_hwuart_info(void *info)
289 {
290 	if (cpu_is_pxa255())
291 		pxa_register_device(&pxa_device_hwuart, info);
292 	else
293 		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
294 }
295 
296 static struct resource pxai2c_resources[] = {
297 	{
298 		.start	= 0x40301680,
299 		.end	= 0x403016a3,
300 		.flags	= IORESOURCE_MEM,
301 	}, {
302 		.start	= IRQ_I2C,
303 		.end	= IRQ_I2C,
304 		.flags	= IORESOURCE_IRQ,
305 	},
306 };
307 
308 struct platform_device pxa_device_i2c = {
309 	.name		= "pxa2xx-i2c",
310 	.id		= 0,
311 	.resource	= pxai2c_resources,
312 	.num_resources	= ARRAY_SIZE(pxai2c_resources),
313 };
314 
315 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
316 {
317 	pxa_register_device(&pxa_device_i2c, info);
318 }
319 
320 #ifdef CONFIG_PXA27x
321 static struct resource pxa27x_resources_i2c_power[] = {
322 	{
323 		.start	= 0x40f00180,
324 		.end	= 0x40f001a3,
325 		.flags	= IORESOURCE_MEM,
326 	}, {
327 		.start	= IRQ_PWRI2C,
328 		.end	= IRQ_PWRI2C,
329 		.flags	= IORESOURCE_IRQ,
330 	},
331 };
332 
333 struct platform_device pxa27x_device_i2c_power = {
334 	.name		= "pxa2xx-i2c",
335 	.id		= 1,
336 	.resource	= pxa27x_resources_i2c_power,
337 	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
338 };
339 #endif
340 
341 static struct resource pxai2s_resources[] = {
342 	{
343 		.start	= 0x40400000,
344 		.end	= 0x40400083,
345 		.flags	= IORESOURCE_MEM,
346 	}, {
347 		.start	= IRQ_I2S,
348 		.end	= IRQ_I2S,
349 		.flags	= IORESOURCE_IRQ,
350 	},
351 };
352 
353 struct platform_device pxa_device_i2s = {
354 	.name		= "pxa2xx-i2s",
355 	.id		= -1,
356 	.resource	= pxai2s_resources,
357 	.num_resources	= ARRAY_SIZE(pxai2s_resources),
358 };
359 
360 struct platform_device pxa_device_asoc_ssp1 = {
361 	.name		= "pxa-ssp-dai",
362 	.id		= 0,
363 };
364 
365 struct platform_device pxa_device_asoc_ssp2= {
366 	.name		= "pxa-ssp-dai",
367 	.id		= 1,
368 };
369 
370 struct platform_device pxa_device_asoc_ssp3 = {
371 	.name		= "pxa-ssp-dai",
372 	.id		= 2,
373 };
374 
375 struct platform_device pxa_device_asoc_ssp4 = {
376 	.name		= "pxa-ssp-dai",
377 	.id		= 3,
378 };
379 
380 struct platform_device pxa_device_asoc_platform = {
381 	.name		= "pxa-pcm-audio",
382 	.id		= -1,
383 };
384 
385 static u64 pxaficp_dmamask = ~(u32)0;
386 
387 struct platform_device pxa_device_ficp = {
388 	.name		= "pxa2xx-ir",
389 	.id		= -1,
390 	.dev		= {
391 		.dma_mask = &pxaficp_dmamask,
392 		.coherent_dma_mask = 0xffffffff,
393 	},
394 };
395 
396 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
397 {
398 	pxa_register_device(&pxa_device_ficp, info);
399 }
400 
401 static struct resource pxa_rtc_resources[] = {
402 	[0] = {
403 		.start  = 0x40900000,
404 		.end	= 0x40900000 + 0x3b,
405 		.flags  = IORESOURCE_MEM,
406 	},
407 	[1] = {
408 		.start  = IRQ_RTC1Hz,
409 		.end    = IRQ_RTC1Hz,
410 		.flags  = IORESOURCE_IRQ,
411 	},
412 	[2] = {
413 		.start  = IRQ_RTCAlrm,
414 		.end    = IRQ_RTCAlrm,
415 		.flags  = IORESOURCE_IRQ,
416 	},
417 };
418 
419 struct platform_device sa1100_device_rtc = {
420 	.name		= "sa1100-rtc",
421 	.id		= -1,
422 };
423 
424 struct platform_device pxa_device_rtc = {
425 	.name		= "pxa-rtc",
426 	.id		= -1,
427 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
428 	.resource       = pxa_rtc_resources,
429 };
430 
431 static struct resource pxa_ac97_resources[] = {
432 	[0] = {
433 		.start  = 0x40500000,
434 		.end	= 0x40500000 + 0xfff,
435 		.flags  = IORESOURCE_MEM,
436 	},
437 	[1] = {
438 		.start  = IRQ_AC97,
439 		.end    = IRQ_AC97,
440 		.flags  = IORESOURCE_IRQ,
441 	},
442 };
443 
444 static u64 pxa_ac97_dmamask = 0xffffffffUL;
445 
446 struct platform_device pxa_device_ac97 = {
447 	.name           = "pxa2xx-ac97",
448 	.id             = -1,
449 	.dev            = {
450 		.dma_mask = &pxa_ac97_dmamask,
451 		.coherent_dma_mask = 0xffffffff,
452 	},
453 	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
454 	.resource       = pxa_ac97_resources,
455 };
456 
457 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
458 {
459 	pxa_register_device(&pxa_device_ac97, ops);
460 }
461 
462 #ifdef CONFIG_PXA25x
463 
464 static struct resource pxa25x_resource_pwm0[] = {
465 	[0] = {
466 		.start	= 0x40b00000,
467 		.end	= 0x40b0000f,
468 		.flags	= IORESOURCE_MEM,
469 	},
470 };
471 
472 struct platform_device pxa25x_device_pwm0 = {
473 	.name		= "pxa25x-pwm",
474 	.id		= 0,
475 	.resource	= pxa25x_resource_pwm0,
476 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
477 };
478 
479 static struct resource pxa25x_resource_pwm1[] = {
480 	[0] = {
481 		.start	= 0x40c00000,
482 		.end	= 0x40c0000f,
483 		.flags	= IORESOURCE_MEM,
484 	},
485 };
486 
487 struct platform_device pxa25x_device_pwm1 = {
488 	.name		= "pxa25x-pwm",
489 	.id		= 1,
490 	.resource	= pxa25x_resource_pwm1,
491 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
492 };
493 
494 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
495 
496 static struct resource pxa25x_resource_ssp[] = {
497 	[0] = {
498 		.start	= 0x41000000,
499 		.end	= 0x4100001f,
500 		.flags	= IORESOURCE_MEM,
501 	},
502 	[1] = {
503 		.start	= IRQ_SSP,
504 		.end	= IRQ_SSP,
505 		.flags	= IORESOURCE_IRQ,
506 	},
507 	[2] = {
508 		/* DRCMR for RX */
509 		.start	= 13,
510 		.end	= 13,
511 		.flags	= IORESOURCE_DMA,
512 	},
513 	[3] = {
514 		/* DRCMR for TX */
515 		.start	= 14,
516 		.end	= 14,
517 		.flags	= IORESOURCE_DMA,
518 	},
519 };
520 
521 struct platform_device pxa25x_device_ssp = {
522 	.name		= "pxa25x-ssp",
523 	.id		= 0,
524 	.dev		= {
525 		.dma_mask = &pxa25x_ssp_dma_mask,
526 		.coherent_dma_mask = DMA_BIT_MASK(32),
527 	},
528 	.resource	= pxa25x_resource_ssp,
529 	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
530 };
531 
532 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
533 
534 static struct resource pxa25x_resource_nssp[] = {
535 	[0] = {
536 		.start	= 0x41400000,
537 		.end	= 0x4140002f,
538 		.flags	= IORESOURCE_MEM,
539 	},
540 	[1] = {
541 		.start	= IRQ_NSSP,
542 		.end	= IRQ_NSSP,
543 		.flags	= IORESOURCE_IRQ,
544 	},
545 	[2] = {
546 		/* DRCMR for RX */
547 		.start	= 15,
548 		.end	= 15,
549 		.flags	= IORESOURCE_DMA,
550 	},
551 	[3] = {
552 		/* DRCMR for TX */
553 		.start	= 16,
554 		.end	= 16,
555 		.flags	= IORESOURCE_DMA,
556 	},
557 };
558 
559 struct platform_device pxa25x_device_nssp = {
560 	.name		= "pxa25x-nssp",
561 	.id		= 1,
562 	.dev		= {
563 		.dma_mask = &pxa25x_nssp_dma_mask,
564 		.coherent_dma_mask = DMA_BIT_MASK(32),
565 	},
566 	.resource	= pxa25x_resource_nssp,
567 	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
568 };
569 
570 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
571 
572 static struct resource pxa25x_resource_assp[] = {
573 	[0] = {
574 		.start	= 0x41500000,
575 		.end	= 0x4150002f,
576 		.flags	= IORESOURCE_MEM,
577 	},
578 	[1] = {
579 		.start	= IRQ_ASSP,
580 		.end	= IRQ_ASSP,
581 		.flags	= IORESOURCE_IRQ,
582 	},
583 	[2] = {
584 		/* DRCMR for RX */
585 		.start	= 23,
586 		.end	= 23,
587 		.flags	= IORESOURCE_DMA,
588 	},
589 	[3] = {
590 		/* DRCMR for TX */
591 		.start	= 24,
592 		.end	= 24,
593 		.flags	= IORESOURCE_DMA,
594 	},
595 };
596 
597 struct platform_device pxa25x_device_assp = {
598 	/* ASSP is basically equivalent to NSSP */
599 	.name		= "pxa25x-nssp",
600 	.id		= 2,
601 	.dev		= {
602 		.dma_mask = &pxa25x_assp_dma_mask,
603 		.coherent_dma_mask = DMA_BIT_MASK(32),
604 	},
605 	.resource	= pxa25x_resource_assp,
606 	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
607 };
608 #endif /* CONFIG_PXA25x */
609 
610 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
611 static struct resource pxa27x_resource_camera[] = {
612 	[0] = {
613 		.start	= 0x50000000,
614 		.end	= 0x50000fff,
615 		.flags	= IORESOURCE_MEM,
616 	},
617 	[1] = {
618 		.start	= IRQ_CAMERA,
619 		.end	= IRQ_CAMERA,
620 		.flags	= IORESOURCE_IRQ,
621 	},
622 };
623 
624 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
625 
626 static struct platform_device pxa27x_device_camera = {
627 	.name		= "pxa27x-camera",
628 	.id		= 0, /* This is used to put cameras on this interface */
629 	.dev		= {
630 		.dma_mask      		= &pxa27x_dma_mask_camera,
631 		.coherent_dma_mask	= 0xffffffff,
632 	},
633 	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
634 	.resource	= pxa27x_resource_camera,
635 };
636 
637 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
638 {
639 	pxa_register_device(&pxa27x_device_camera, info);
640 }
641 
642 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
643 
644 static struct resource pxa27x_resource_ohci[] = {
645 	[0] = {
646 		.start  = 0x4C000000,
647 		.end    = 0x4C00ff6f,
648 		.flags  = IORESOURCE_MEM,
649 	},
650 	[1] = {
651 		.start  = IRQ_USBH1,
652 		.end    = IRQ_USBH1,
653 		.flags  = IORESOURCE_IRQ,
654 	},
655 };
656 
657 struct platform_device pxa27x_device_ohci = {
658 	.name		= "pxa27x-ohci",
659 	.id		= -1,
660 	.dev		= {
661 		.dma_mask = &pxa27x_ohci_dma_mask,
662 		.coherent_dma_mask = DMA_BIT_MASK(32),
663 	},
664 	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
665 	.resource       = pxa27x_resource_ohci,
666 };
667 
668 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
669 {
670 	pxa_register_device(&pxa27x_device_ohci, info);
671 }
672 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
673 
674 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
675 static struct resource pxa27x_resource_keypad[] = {
676 	[0] = {
677 		.start	= 0x41500000,
678 		.end	= 0x4150004c,
679 		.flags	= IORESOURCE_MEM,
680 	},
681 	[1] = {
682 		.start	= IRQ_KEYPAD,
683 		.end	= IRQ_KEYPAD,
684 		.flags	= IORESOURCE_IRQ,
685 	},
686 };
687 
688 struct platform_device pxa27x_device_keypad = {
689 	.name		= "pxa27x-keypad",
690 	.id		= -1,
691 	.resource	= pxa27x_resource_keypad,
692 	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
693 };
694 
695 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
696 {
697 	pxa_register_device(&pxa27x_device_keypad, info);
698 }
699 
700 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
701 
702 static struct resource pxa27x_resource_ssp1[] = {
703 	[0] = {
704 		.start	= 0x41000000,
705 		.end	= 0x4100003f,
706 		.flags	= IORESOURCE_MEM,
707 	},
708 	[1] = {
709 		.start	= IRQ_SSP,
710 		.end	= IRQ_SSP,
711 		.flags	= IORESOURCE_IRQ,
712 	},
713 	[2] = {
714 		/* DRCMR for RX */
715 		.start	= 13,
716 		.end	= 13,
717 		.flags	= IORESOURCE_DMA,
718 	},
719 	[3] = {
720 		/* DRCMR for TX */
721 		.start	= 14,
722 		.end	= 14,
723 		.flags	= IORESOURCE_DMA,
724 	},
725 };
726 
727 struct platform_device pxa27x_device_ssp1 = {
728 	.name		= "pxa27x-ssp",
729 	.id		= 0,
730 	.dev		= {
731 		.dma_mask = &pxa27x_ssp1_dma_mask,
732 		.coherent_dma_mask = DMA_BIT_MASK(32),
733 	},
734 	.resource	= pxa27x_resource_ssp1,
735 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
736 };
737 
738 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
739 
740 static struct resource pxa27x_resource_ssp2[] = {
741 	[0] = {
742 		.start	= 0x41700000,
743 		.end	= 0x4170003f,
744 		.flags	= IORESOURCE_MEM,
745 	},
746 	[1] = {
747 		.start	= IRQ_SSP2,
748 		.end	= IRQ_SSP2,
749 		.flags	= IORESOURCE_IRQ,
750 	},
751 	[2] = {
752 		/* DRCMR for RX */
753 		.start	= 15,
754 		.end	= 15,
755 		.flags	= IORESOURCE_DMA,
756 	},
757 	[3] = {
758 		/* DRCMR for TX */
759 		.start	= 16,
760 		.end	= 16,
761 		.flags	= IORESOURCE_DMA,
762 	},
763 };
764 
765 struct platform_device pxa27x_device_ssp2 = {
766 	.name		= "pxa27x-ssp",
767 	.id		= 1,
768 	.dev		= {
769 		.dma_mask = &pxa27x_ssp2_dma_mask,
770 		.coherent_dma_mask = DMA_BIT_MASK(32),
771 	},
772 	.resource	= pxa27x_resource_ssp2,
773 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
774 };
775 
776 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
777 
778 static struct resource pxa27x_resource_ssp3[] = {
779 	[0] = {
780 		.start	= 0x41900000,
781 		.end	= 0x4190003f,
782 		.flags	= IORESOURCE_MEM,
783 	},
784 	[1] = {
785 		.start	= IRQ_SSP3,
786 		.end	= IRQ_SSP3,
787 		.flags	= IORESOURCE_IRQ,
788 	},
789 	[2] = {
790 		/* DRCMR for RX */
791 		.start	= 66,
792 		.end	= 66,
793 		.flags	= IORESOURCE_DMA,
794 	},
795 	[3] = {
796 		/* DRCMR for TX */
797 		.start	= 67,
798 		.end	= 67,
799 		.flags	= IORESOURCE_DMA,
800 	},
801 };
802 
803 struct platform_device pxa27x_device_ssp3 = {
804 	.name		= "pxa27x-ssp",
805 	.id		= 2,
806 	.dev		= {
807 		.dma_mask = &pxa27x_ssp3_dma_mask,
808 		.coherent_dma_mask = DMA_BIT_MASK(32),
809 	},
810 	.resource	= pxa27x_resource_ssp3,
811 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
812 };
813 
814 static struct resource pxa27x_resource_pwm0[] = {
815 	[0] = {
816 		.start	= 0x40b00000,
817 		.end	= 0x40b0001f,
818 		.flags	= IORESOURCE_MEM,
819 	},
820 };
821 
822 struct platform_device pxa27x_device_pwm0 = {
823 	.name		= "pxa27x-pwm",
824 	.id		= 0,
825 	.resource	= pxa27x_resource_pwm0,
826 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
827 };
828 
829 static struct resource pxa27x_resource_pwm1[] = {
830 	[0] = {
831 		.start	= 0x40c00000,
832 		.end	= 0x40c0001f,
833 		.flags	= IORESOURCE_MEM,
834 	},
835 };
836 
837 struct platform_device pxa27x_device_pwm1 = {
838 	.name		= "pxa27x-pwm",
839 	.id		= 1,
840 	.resource	= pxa27x_resource_pwm1,
841 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
842 };
843 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx || CONFIG_PXA95x*/
844 
845 #ifdef CONFIG_PXA3xx
846 static struct resource pxa3xx_resources_mci2[] = {
847 	[0] = {
848 		.start	= 0x42000000,
849 		.end	= 0x42000fff,
850 		.flags	= IORESOURCE_MEM,
851 	},
852 	[1] = {
853 		.start	= IRQ_MMC2,
854 		.end	= IRQ_MMC2,
855 		.flags	= IORESOURCE_IRQ,
856 	},
857 	[2] = {
858 		.start	= 93,
859 		.end	= 93,
860 		.flags	= IORESOURCE_DMA,
861 	},
862 	[3] = {
863 		.start	= 94,
864 		.end	= 94,
865 		.flags	= IORESOURCE_DMA,
866 	},
867 };
868 
869 struct platform_device pxa3xx_device_mci2 = {
870 	.name		= "pxa2xx-mci",
871 	.id		= 1,
872 	.dev		= {
873 		.dma_mask = &pxamci_dmamask,
874 		.coherent_dma_mask =	0xffffffff,
875 	},
876 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
877 	.resource	= pxa3xx_resources_mci2,
878 };
879 
880 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
881 {
882 	pxa_register_device(&pxa3xx_device_mci2, info);
883 }
884 
885 static struct resource pxa3xx_resources_mci3[] = {
886 	[0] = {
887 		.start	= 0x42500000,
888 		.end	= 0x42500fff,
889 		.flags	= IORESOURCE_MEM,
890 	},
891 	[1] = {
892 		.start	= IRQ_MMC3,
893 		.end	= IRQ_MMC3,
894 		.flags	= IORESOURCE_IRQ,
895 	},
896 	[2] = {
897 		.start	= 100,
898 		.end	= 100,
899 		.flags	= IORESOURCE_DMA,
900 	},
901 	[3] = {
902 		.start	= 101,
903 		.end	= 101,
904 		.flags	= IORESOURCE_DMA,
905 	},
906 };
907 
908 struct platform_device pxa3xx_device_mci3 = {
909 	.name		= "pxa2xx-mci",
910 	.id		= 2,
911 	.dev		= {
912 		.dma_mask = &pxamci_dmamask,
913 		.coherent_dma_mask = 0xffffffff,
914 	},
915 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
916 	.resource	= pxa3xx_resources_mci3,
917 };
918 
919 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
920 {
921 	pxa_register_device(&pxa3xx_device_mci3, info);
922 }
923 
924 static struct resource pxa3xx_resources_gcu[] = {
925 	{
926 		.start	= 0x54000000,
927 		.end	= 0x54000fff,
928 		.flags	= IORESOURCE_MEM,
929 	},
930 	{
931 		.start	= IRQ_GCU,
932 		.end	= IRQ_GCU,
933 		.flags	= IORESOURCE_IRQ,
934 	},
935 };
936 
937 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
938 
939 struct platform_device pxa3xx_device_gcu = {
940 	.name		= "pxa3xx-gcu",
941 	.id		= -1,
942 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
943 	.resource	= pxa3xx_resources_gcu,
944 	.dev		= {
945 		.dma_mask = &pxa3xx_gcu_dmamask,
946 		.coherent_dma_mask = 0xffffffff,
947 	},
948 };
949 
950 #endif /* CONFIG_PXA3xx */
951 
952 #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
953 static struct resource pxa3xx_resources_i2c_power[] = {
954 	{
955 		.start  = 0x40f500c0,
956 		.end    = 0x40f500d3,
957 		.flags	= IORESOURCE_MEM,
958 	}, {
959 		.start	= IRQ_PWRI2C,
960 		.end	= IRQ_PWRI2C,
961 		.flags	= IORESOURCE_IRQ,
962 	},
963 };
964 
965 struct platform_device pxa3xx_device_i2c_power = {
966 	.name		= "pxa3xx-pwri2c",
967 	.id		= 1,
968 	.resource	= pxa3xx_resources_i2c_power,
969 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
970 };
971 
972 static struct resource pxa3xx_resources_nand[] = {
973 	[0] = {
974 		.start	= 0x43100000,
975 		.end	= 0x43100053,
976 		.flags	= IORESOURCE_MEM,
977 	},
978 	[1] = {
979 		.start	= IRQ_NAND,
980 		.end	= IRQ_NAND,
981 		.flags	= IORESOURCE_IRQ,
982 	},
983 	[2] = {
984 		/* DRCMR for Data DMA */
985 		.start	= 97,
986 		.end	= 97,
987 		.flags	= IORESOURCE_DMA,
988 	},
989 	[3] = {
990 		/* DRCMR for Command DMA */
991 		.start	= 99,
992 		.end	= 99,
993 		.flags	= IORESOURCE_DMA,
994 	},
995 };
996 
997 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
998 
999 struct platform_device pxa3xx_device_nand = {
1000 	.name		= "pxa3xx-nand",
1001 	.id		= -1,
1002 	.dev		= {
1003 		.dma_mask = &pxa3xx_nand_dma_mask,
1004 		.coherent_dma_mask = DMA_BIT_MASK(32),
1005 	},
1006 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
1007 	.resource	= pxa3xx_resources_nand,
1008 };
1009 
1010 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1011 {
1012 	pxa_register_device(&pxa3xx_device_nand, info);
1013 }
1014 
1015 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1016 
1017 static struct resource pxa3xx_resource_ssp4[] = {
1018 	[0] = {
1019 		.start	= 0x41a00000,
1020 		.end	= 0x41a0003f,
1021 		.flags	= IORESOURCE_MEM,
1022 	},
1023 	[1] = {
1024 		.start	= IRQ_SSP4,
1025 		.end	= IRQ_SSP4,
1026 		.flags	= IORESOURCE_IRQ,
1027 	},
1028 	[2] = {
1029 		/* DRCMR for RX */
1030 		.start	= 2,
1031 		.end	= 2,
1032 		.flags	= IORESOURCE_DMA,
1033 	},
1034 	[3] = {
1035 		/* DRCMR for TX */
1036 		.start	= 3,
1037 		.end	= 3,
1038 		.flags	= IORESOURCE_DMA,
1039 	},
1040 };
1041 
1042 struct platform_device pxa3xx_device_ssp4 = {
1043 	/* PXA3xx SSP is basically equivalent to PXA27x */
1044 	.name		= "pxa27x-ssp",
1045 	.id		= 3,
1046 	.dev		= {
1047 		.dma_mask = &pxa3xx_ssp4_dma_mask,
1048 		.coherent_dma_mask = DMA_BIT_MASK(32),
1049 	},
1050 	.resource	= pxa3xx_resource_ssp4,
1051 	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1052 };
1053 #endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1054 
1055 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1056  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1057 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1058 {
1059 	struct platform_device *pd;
1060 
1061 	pd = platform_device_alloc("pxa2xx-spi", id);
1062 	if (pd == NULL) {
1063 		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1064 		       id);
1065 		return;
1066 	}
1067 
1068 	pd->dev.platform_data = info;
1069 	platform_device_add(pd);
1070 }
1071