1 // SPDX-License-Identifier: GPL-2.0 2 #include <linux/module.h> 3 #include <linux/kernel.h> 4 #include <linux/init.h> 5 #include <linux/platform_device.h> 6 #include <linux/dma-mapping.h> 7 #include <linux/dmaengine.h> 8 #include <linux/spi/pxa2xx_spi.h> 9 #include <linux/platform_data/i2c-pxa.h> 10 11 #include "udc.h" 12 #include <linux/platform_data/usb-pxa3xx-ulpi.h> 13 #include <linux/platform_data/video-pxafb.h> 14 #include <linux/platform_data/mmc-pxamci.h> 15 #include <linux/platform_data/irda-pxaficp.h> 16 #include <mach/irqs.h> 17 #include <linux/platform_data/usb-ohci-pxa27x.h> 18 #include <linux/platform_data/keypad-pxa27x.h> 19 #include <linux/platform_data/media/camera-pxa.h> 20 #include <mach/audio.h> 21 #include <mach/hardware.h> 22 #include <linux/platform_data/mmp_dma.h> 23 #include <linux/platform_data/mtd-nand-pxa3xx.h> 24 25 #include "devices.h" 26 #include "generic.h" 27 28 void __init pxa_register_device(struct platform_device *dev, void *data) 29 { 30 int ret; 31 32 dev->dev.platform_data = data; 33 34 ret = platform_device_register(dev); 35 if (ret) 36 dev_err(&dev->dev, "unable to register device: %d\n", ret); 37 } 38 39 static struct resource pxa_resource_pmu = { 40 .start = IRQ_PMU, 41 .end = IRQ_PMU, 42 .flags = IORESOURCE_IRQ, 43 }; 44 45 struct platform_device pxa_device_pmu = { 46 .name = "xscale-pmu", 47 .id = -1, 48 .resource = &pxa_resource_pmu, 49 .num_resources = 1, 50 }; 51 52 static struct resource pxamci_resources[] = { 53 [0] = { 54 .start = 0x41100000, 55 .end = 0x41100fff, 56 .flags = IORESOURCE_MEM, 57 }, 58 [1] = { 59 .start = IRQ_MMC, 60 .end = IRQ_MMC, 61 .flags = IORESOURCE_IRQ, 62 }, 63 }; 64 65 static u64 pxamci_dmamask = 0xffffffffUL; 66 67 struct platform_device pxa_device_mci = { 68 .name = "pxa2xx-mci", 69 .id = 0, 70 .dev = { 71 .dma_mask = &pxamci_dmamask, 72 .coherent_dma_mask = 0xffffffff, 73 }, 74 .num_resources = ARRAY_SIZE(pxamci_resources), 75 .resource = pxamci_resources, 76 }; 77 78 void __init pxa_set_mci_info(struct pxamci_platform_data *info) 79 { 80 pxa_register_device(&pxa_device_mci, info); 81 } 82 83 84 static struct pxa2xx_udc_mach_info pxa_udc_info = { 85 .gpio_pullup = -1, 86 }; 87 88 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 89 { 90 memcpy(&pxa_udc_info, info, sizeof *info); 91 } 92 93 static struct resource pxa2xx_udc_resources[] = { 94 [0] = { 95 .start = 0x40600000, 96 .end = 0x4060ffff, 97 .flags = IORESOURCE_MEM, 98 }, 99 [1] = { 100 .start = IRQ_USB, 101 .end = IRQ_USB, 102 .flags = IORESOURCE_IRQ, 103 }, 104 }; 105 106 static u64 udc_dma_mask = ~(u32)0; 107 108 struct platform_device pxa25x_device_udc = { 109 .name = "pxa25x-udc", 110 .id = -1, 111 .resource = pxa2xx_udc_resources, 112 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), 113 .dev = { 114 .platform_data = &pxa_udc_info, 115 .dma_mask = &udc_dma_mask, 116 } 117 }; 118 119 struct platform_device pxa27x_device_udc = { 120 .name = "pxa27x-udc", 121 .id = -1, 122 .resource = pxa2xx_udc_resources, 123 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), 124 .dev = { 125 .platform_data = &pxa_udc_info, 126 .dma_mask = &udc_dma_mask, 127 } 128 }; 129 130 #ifdef CONFIG_PXA3xx 131 static struct resource pxa3xx_u2d_resources[] = { 132 [0] = { 133 .start = 0x54100000, 134 .end = 0x54100fff, 135 .flags = IORESOURCE_MEM, 136 }, 137 [1] = { 138 .start = IRQ_USB2, 139 .end = IRQ_USB2, 140 .flags = IORESOURCE_IRQ, 141 }, 142 }; 143 144 struct platform_device pxa3xx_device_u2d = { 145 .name = "pxa3xx-u2d", 146 .id = -1, 147 .resource = pxa3xx_u2d_resources, 148 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources), 149 }; 150 151 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info) 152 { 153 pxa_register_device(&pxa3xx_device_u2d, info); 154 } 155 #endif /* CONFIG_PXA3xx */ 156 157 static struct resource pxafb_resources[] = { 158 [0] = { 159 .start = 0x44000000, 160 .end = 0x4400ffff, 161 .flags = IORESOURCE_MEM, 162 }, 163 [1] = { 164 .start = IRQ_LCD, 165 .end = IRQ_LCD, 166 .flags = IORESOURCE_IRQ, 167 }, 168 }; 169 170 static u64 fb_dma_mask = ~(u64)0; 171 172 struct platform_device pxa_device_fb = { 173 .name = "pxa2xx-fb", 174 .id = -1, 175 .dev = { 176 .dma_mask = &fb_dma_mask, 177 .coherent_dma_mask = 0xffffffff, 178 }, 179 .num_resources = ARRAY_SIZE(pxafb_resources), 180 .resource = pxafb_resources, 181 }; 182 183 void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info) 184 { 185 pxa_device_fb.dev.parent = parent; 186 pxa_register_device(&pxa_device_fb, info); 187 } 188 189 static struct resource pxa_resource_ffuart[] = { 190 { 191 .start = 0x40100000, 192 .end = 0x40100023, 193 .flags = IORESOURCE_MEM, 194 }, { 195 .start = IRQ_FFUART, 196 .end = IRQ_FFUART, 197 .flags = IORESOURCE_IRQ, 198 } 199 }; 200 201 struct platform_device pxa_device_ffuart = { 202 .name = "pxa2xx-uart", 203 .id = 0, 204 .resource = pxa_resource_ffuart, 205 .num_resources = ARRAY_SIZE(pxa_resource_ffuart), 206 }; 207 208 void __init pxa_set_ffuart_info(void *info) 209 { 210 pxa_register_device(&pxa_device_ffuart, info); 211 } 212 213 static struct resource pxa_resource_btuart[] = { 214 { 215 .start = 0x40200000, 216 .end = 0x40200023, 217 .flags = IORESOURCE_MEM, 218 }, { 219 .start = IRQ_BTUART, 220 .end = IRQ_BTUART, 221 .flags = IORESOURCE_IRQ, 222 } 223 }; 224 225 struct platform_device pxa_device_btuart = { 226 .name = "pxa2xx-uart", 227 .id = 1, 228 .resource = pxa_resource_btuart, 229 .num_resources = ARRAY_SIZE(pxa_resource_btuart), 230 }; 231 232 void __init pxa_set_btuart_info(void *info) 233 { 234 pxa_register_device(&pxa_device_btuart, info); 235 } 236 237 static struct resource pxa_resource_stuart[] = { 238 { 239 .start = 0x40700000, 240 .end = 0x40700023, 241 .flags = IORESOURCE_MEM, 242 }, { 243 .start = IRQ_STUART, 244 .end = IRQ_STUART, 245 .flags = IORESOURCE_IRQ, 246 } 247 }; 248 249 struct platform_device pxa_device_stuart = { 250 .name = "pxa2xx-uart", 251 .id = 2, 252 .resource = pxa_resource_stuart, 253 .num_resources = ARRAY_SIZE(pxa_resource_stuart), 254 }; 255 256 void __init pxa_set_stuart_info(void *info) 257 { 258 pxa_register_device(&pxa_device_stuart, info); 259 } 260 261 static struct resource pxa_resource_hwuart[] = { 262 { 263 .start = 0x41600000, 264 .end = 0x4160002F, 265 .flags = IORESOURCE_MEM, 266 }, { 267 .start = IRQ_HWUART, 268 .end = IRQ_HWUART, 269 .flags = IORESOURCE_IRQ, 270 } 271 }; 272 273 struct platform_device pxa_device_hwuart = { 274 .name = "pxa2xx-uart", 275 .id = 3, 276 .resource = pxa_resource_hwuart, 277 .num_resources = ARRAY_SIZE(pxa_resource_hwuart), 278 }; 279 280 void __init pxa_set_hwuart_info(void *info) 281 { 282 if (cpu_is_pxa255()) 283 pxa_register_device(&pxa_device_hwuart, info); 284 else 285 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware"); 286 } 287 288 static struct resource pxai2c_resources[] = { 289 { 290 .start = 0x40301680, 291 .end = 0x403016a3, 292 .flags = IORESOURCE_MEM, 293 }, { 294 .start = IRQ_I2C, 295 .end = IRQ_I2C, 296 .flags = IORESOURCE_IRQ, 297 }, 298 }; 299 300 struct platform_device pxa_device_i2c = { 301 .name = "pxa2xx-i2c", 302 .id = 0, 303 .resource = pxai2c_resources, 304 .num_resources = ARRAY_SIZE(pxai2c_resources), 305 }; 306 307 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) 308 { 309 pxa_register_device(&pxa_device_i2c, info); 310 } 311 312 #ifdef CONFIG_PXA27x 313 static struct resource pxa27x_resources_i2c_power[] = { 314 { 315 .start = 0x40f00180, 316 .end = 0x40f001a3, 317 .flags = IORESOURCE_MEM, 318 }, { 319 .start = IRQ_PWRI2C, 320 .end = IRQ_PWRI2C, 321 .flags = IORESOURCE_IRQ, 322 }, 323 }; 324 325 struct platform_device pxa27x_device_i2c_power = { 326 .name = "pxa2xx-i2c", 327 .id = 1, 328 .resource = pxa27x_resources_i2c_power, 329 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power), 330 }; 331 #endif 332 333 static struct resource pxai2s_resources[] = { 334 { 335 .start = 0x40400000, 336 .end = 0x40400083, 337 .flags = IORESOURCE_MEM, 338 }, { 339 .start = IRQ_I2S, 340 .end = IRQ_I2S, 341 .flags = IORESOURCE_IRQ, 342 }, 343 }; 344 345 struct platform_device pxa_device_i2s = { 346 .name = "pxa2xx-i2s", 347 .id = -1, 348 .resource = pxai2s_resources, 349 .num_resources = ARRAY_SIZE(pxai2s_resources), 350 }; 351 352 struct platform_device pxa_device_asoc_ssp1 = { 353 .name = "pxa-ssp-dai", 354 .id = 0, 355 }; 356 357 struct platform_device pxa_device_asoc_ssp2= { 358 .name = "pxa-ssp-dai", 359 .id = 1, 360 }; 361 362 struct platform_device pxa_device_asoc_ssp3 = { 363 .name = "pxa-ssp-dai", 364 .id = 2, 365 }; 366 367 struct platform_device pxa_device_asoc_ssp4 = { 368 .name = "pxa-ssp-dai", 369 .id = 3, 370 }; 371 372 struct platform_device pxa_device_asoc_platform = { 373 .name = "pxa-pcm-audio", 374 .id = -1, 375 }; 376 377 static u64 pxaficp_dmamask = ~(u32)0; 378 379 static struct resource pxa_ir_resources[] = { 380 [0] = { 381 .start = IRQ_STUART, 382 .end = IRQ_STUART, 383 .flags = IORESOURCE_IRQ, 384 }, 385 [1] = { 386 .start = IRQ_ICP, 387 .end = IRQ_ICP, 388 .flags = IORESOURCE_IRQ, 389 }, 390 [3] = { 391 .start = 0x40800000, 392 .end = 0x4080001b, 393 .flags = IORESOURCE_MEM, 394 }, 395 [4] = { 396 .start = 0x40700000, 397 .end = 0x40700023, 398 .flags = IORESOURCE_MEM, 399 }, 400 }; 401 402 struct platform_device pxa_device_ficp = { 403 .name = "pxa2xx-ir", 404 .id = -1, 405 .num_resources = ARRAY_SIZE(pxa_ir_resources), 406 .resource = pxa_ir_resources, 407 .dev = { 408 .dma_mask = &pxaficp_dmamask, 409 .coherent_dma_mask = 0xffffffff, 410 }, 411 }; 412 413 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) 414 { 415 pxa_register_device(&pxa_device_ficp, info); 416 } 417 418 static struct resource pxa_rtc_resources[] = { 419 [0] = { 420 .start = 0x40900000, 421 .end = 0x40900000 + 0x3b, 422 .flags = IORESOURCE_MEM, 423 }, 424 [1] = { 425 .start = IRQ_RTC1Hz, 426 .end = IRQ_RTC1Hz, 427 .name = "rtc 1Hz", 428 .flags = IORESOURCE_IRQ, 429 }, 430 [2] = { 431 .start = IRQ_RTCAlrm, 432 .end = IRQ_RTCAlrm, 433 .name = "rtc alarm", 434 .flags = IORESOURCE_IRQ, 435 }, 436 }; 437 438 struct platform_device pxa_device_rtc = { 439 .name = "pxa-rtc", 440 .id = -1, 441 .num_resources = ARRAY_SIZE(pxa_rtc_resources), 442 .resource = pxa_rtc_resources, 443 }; 444 445 struct platform_device sa1100_device_rtc = { 446 .name = "sa1100-rtc", 447 .id = -1, 448 .num_resources = ARRAY_SIZE(pxa_rtc_resources), 449 .resource = pxa_rtc_resources, 450 }; 451 452 static struct resource pxa_ac97_resources[] = { 453 [0] = { 454 .start = 0x40500000, 455 .end = 0x40500000 + 0xfff, 456 .flags = IORESOURCE_MEM, 457 }, 458 [1] = { 459 .start = IRQ_AC97, 460 .end = IRQ_AC97, 461 .flags = IORESOURCE_IRQ, 462 }, 463 }; 464 465 static u64 pxa_ac97_dmamask = 0xffffffffUL; 466 467 struct platform_device pxa_device_ac97 = { 468 .name = "pxa2xx-ac97", 469 .id = -1, 470 .dev = { 471 .dma_mask = &pxa_ac97_dmamask, 472 .coherent_dma_mask = 0xffffffff, 473 }, 474 .num_resources = ARRAY_SIZE(pxa_ac97_resources), 475 .resource = pxa_ac97_resources, 476 }; 477 478 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops) 479 { 480 pxa_register_device(&pxa_device_ac97, ops); 481 } 482 483 #ifdef CONFIG_PXA25x 484 485 static struct resource pxa25x_resource_pwm0[] = { 486 [0] = { 487 .start = 0x40b00000, 488 .end = 0x40b0000f, 489 .flags = IORESOURCE_MEM, 490 }, 491 }; 492 493 struct platform_device pxa25x_device_pwm0 = { 494 .name = "pxa25x-pwm", 495 .id = 0, 496 .resource = pxa25x_resource_pwm0, 497 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0), 498 }; 499 500 static struct resource pxa25x_resource_pwm1[] = { 501 [0] = { 502 .start = 0x40c00000, 503 .end = 0x40c0000f, 504 .flags = IORESOURCE_MEM, 505 }, 506 }; 507 508 struct platform_device pxa25x_device_pwm1 = { 509 .name = "pxa25x-pwm", 510 .id = 1, 511 .resource = pxa25x_resource_pwm1, 512 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1), 513 }; 514 515 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); 516 517 static struct resource pxa25x_resource_ssp[] = { 518 [0] = { 519 .start = 0x41000000, 520 .end = 0x4100001f, 521 .flags = IORESOURCE_MEM, 522 }, 523 [1] = { 524 .start = IRQ_SSP, 525 .end = IRQ_SSP, 526 .flags = IORESOURCE_IRQ, 527 }, 528 }; 529 530 struct platform_device pxa25x_device_ssp = { 531 .name = "pxa25x-ssp", 532 .id = 0, 533 .dev = { 534 .dma_mask = &pxa25x_ssp_dma_mask, 535 .coherent_dma_mask = DMA_BIT_MASK(32), 536 }, 537 .resource = pxa25x_resource_ssp, 538 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp), 539 }; 540 541 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32); 542 543 static struct resource pxa25x_resource_nssp[] = { 544 [0] = { 545 .start = 0x41400000, 546 .end = 0x4140002f, 547 .flags = IORESOURCE_MEM, 548 }, 549 [1] = { 550 .start = IRQ_NSSP, 551 .end = IRQ_NSSP, 552 .flags = IORESOURCE_IRQ, 553 }, 554 }; 555 556 struct platform_device pxa25x_device_nssp = { 557 .name = "pxa25x-nssp", 558 .id = 1, 559 .dev = { 560 .dma_mask = &pxa25x_nssp_dma_mask, 561 .coherent_dma_mask = DMA_BIT_MASK(32), 562 }, 563 .resource = pxa25x_resource_nssp, 564 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp), 565 }; 566 567 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32); 568 569 static struct resource pxa25x_resource_assp[] = { 570 [0] = { 571 .start = 0x41500000, 572 .end = 0x4150002f, 573 .flags = IORESOURCE_MEM, 574 }, 575 [1] = { 576 .start = IRQ_ASSP, 577 .end = IRQ_ASSP, 578 .flags = IORESOURCE_IRQ, 579 }, 580 }; 581 582 struct platform_device pxa25x_device_assp = { 583 /* ASSP is basically equivalent to NSSP */ 584 .name = "pxa25x-nssp", 585 .id = 2, 586 .dev = { 587 .dma_mask = &pxa25x_assp_dma_mask, 588 .coherent_dma_mask = DMA_BIT_MASK(32), 589 }, 590 .resource = pxa25x_resource_assp, 591 .num_resources = ARRAY_SIZE(pxa25x_resource_assp), 592 }; 593 #endif /* CONFIG_PXA25x */ 594 595 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 596 static struct resource pxa27x_resource_camera[] = { 597 [0] = { 598 .start = 0x50000000, 599 .end = 0x50000fff, 600 .flags = IORESOURCE_MEM, 601 }, 602 [1] = { 603 .start = IRQ_CAMERA, 604 .end = IRQ_CAMERA, 605 .flags = IORESOURCE_IRQ, 606 }, 607 }; 608 609 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32); 610 611 static struct platform_device pxa27x_device_camera = { 612 .name = "pxa27x-camera", 613 .id = 0, /* This is used to put cameras on this interface */ 614 .dev = { 615 .dma_mask = &pxa27x_dma_mask_camera, 616 .coherent_dma_mask = 0xffffffff, 617 }, 618 .num_resources = ARRAY_SIZE(pxa27x_resource_camera), 619 .resource = pxa27x_resource_camera, 620 }; 621 622 void __init pxa_set_camera_info(struct pxacamera_platform_data *info) 623 { 624 pxa_register_device(&pxa27x_device_camera, info); 625 } 626 627 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); 628 629 static struct resource pxa27x_resource_ohci[] = { 630 [0] = { 631 .start = 0x4C000000, 632 .end = 0x4C00ff6f, 633 .flags = IORESOURCE_MEM, 634 }, 635 [1] = { 636 .start = IRQ_USBH1, 637 .end = IRQ_USBH1, 638 .flags = IORESOURCE_IRQ, 639 }, 640 }; 641 642 struct platform_device pxa27x_device_ohci = { 643 .name = "pxa27x-ohci", 644 .id = -1, 645 .dev = { 646 .dma_mask = &pxa27x_ohci_dma_mask, 647 .coherent_dma_mask = DMA_BIT_MASK(32), 648 }, 649 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci), 650 .resource = pxa27x_resource_ohci, 651 }; 652 653 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) 654 { 655 pxa_register_device(&pxa27x_device_ohci, info); 656 } 657 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ 658 659 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 660 static struct resource pxa27x_resource_keypad[] = { 661 [0] = { 662 .start = 0x41500000, 663 .end = 0x4150004c, 664 .flags = IORESOURCE_MEM, 665 }, 666 [1] = { 667 .start = IRQ_KEYPAD, 668 .end = IRQ_KEYPAD, 669 .flags = IORESOURCE_IRQ, 670 }, 671 }; 672 673 struct platform_device pxa27x_device_keypad = { 674 .name = "pxa27x-keypad", 675 .id = -1, 676 .resource = pxa27x_resource_keypad, 677 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), 678 }; 679 680 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) 681 { 682 pxa_register_device(&pxa27x_device_keypad, info); 683 } 684 685 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); 686 687 static struct resource pxa27x_resource_ssp1[] = { 688 [0] = { 689 .start = 0x41000000, 690 .end = 0x4100003f, 691 .flags = IORESOURCE_MEM, 692 }, 693 [1] = { 694 .start = IRQ_SSP, 695 .end = IRQ_SSP, 696 .flags = IORESOURCE_IRQ, 697 }, 698 }; 699 700 struct platform_device pxa27x_device_ssp1 = { 701 .name = "pxa27x-ssp", 702 .id = 0, 703 .dev = { 704 .dma_mask = &pxa27x_ssp1_dma_mask, 705 .coherent_dma_mask = DMA_BIT_MASK(32), 706 }, 707 .resource = pxa27x_resource_ssp1, 708 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), 709 }; 710 711 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32); 712 713 static struct resource pxa27x_resource_ssp2[] = { 714 [0] = { 715 .start = 0x41700000, 716 .end = 0x4170003f, 717 .flags = IORESOURCE_MEM, 718 }, 719 [1] = { 720 .start = IRQ_SSP2, 721 .end = IRQ_SSP2, 722 .flags = IORESOURCE_IRQ, 723 }, 724 }; 725 726 struct platform_device pxa27x_device_ssp2 = { 727 .name = "pxa27x-ssp", 728 .id = 1, 729 .dev = { 730 .dma_mask = &pxa27x_ssp2_dma_mask, 731 .coherent_dma_mask = DMA_BIT_MASK(32), 732 }, 733 .resource = pxa27x_resource_ssp2, 734 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), 735 }; 736 737 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32); 738 739 static struct resource pxa27x_resource_ssp3[] = { 740 [0] = { 741 .start = 0x41900000, 742 .end = 0x4190003f, 743 .flags = IORESOURCE_MEM, 744 }, 745 [1] = { 746 .start = IRQ_SSP3, 747 .end = IRQ_SSP3, 748 .flags = IORESOURCE_IRQ, 749 }, 750 }; 751 752 struct platform_device pxa27x_device_ssp3 = { 753 .name = "pxa27x-ssp", 754 .id = 2, 755 .dev = { 756 .dma_mask = &pxa27x_ssp3_dma_mask, 757 .coherent_dma_mask = DMA_BIT_MASK(32), 758 }, 759 .resource = pxa27x_resource_ssp3, 760 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), 761 }; 762 763 static struct resource pxa27x_resource_pwm0[] = { 764 [0] = { 765 .start = 0x40b00000, 766 .end = 0x40b0001f, 767 .flags = IORESOURCE_MEM, 768 }, 769 }; 770 771 struct platform_device pxa27x_device_pwm0 = { 772 .name = "pxa27x-pwm", 773 .id = 0, 774 .resource = pxa27x_resource_pwm0, 775 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0), 776 }; 777 778 static struct resource pxa27x_resource_pwm1[] = { 779 [0] = { 780 .start = 0x40c00000, 781 .end = 0x40c0001f, 782 .flags = IORESOURCE_MEM, 783 }, 784 }; 785 786 struct platform_device pxa27x_device_pwm1 = { 787 .name = "pxa27x-pwm", 788 .id = 1, 789 .resource = pxa27x_resource_pwm1, 790 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), 791 }; 792 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ 793 794 #ifdef CONFIG_PXA3xx 795 static struct resource pxa3xx_resources_mci2[] = { 796 [0] = { 797 .start = 0x42000000, 798 .end = 0x42000fff, 799 .flags = IORESOURCE_MEM, 800 }, 801 [1] = { 802 .start = IRQ_MMC2, 803 .end = IRQ_MMC2, 804 .flags = IORESOURCE_IRQ, 805 }, 806 }; 807 808 struct platform_device pxa3xx_device_mci2 = { 809 .name = "pxa2xx-mci", 810 .id = 1, 811 .dev = { 812 .dma_mask = &pxamci_dmamask, 813 .coherent_dma_mask = 0xffffffff, 814 }, 815 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2), 816 .resource = pxa3xx_resources_mci2, 817 }; 818 819 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info) 820 { 821 pxa_register_device(&pxa3xx_device_mci2, info); 822 } 823 824 static struct resource pxa3xx_resources_mci3[] = { 825 [0] = { 826 .start = 0x42500000, 827 .end = 0x42500fff, 828 .flags = IORESOURCE_MEM, 829 }, 830 [1] = { 831 .start = IRQ_MMC3, 832 .end = IRQ_MMC3, 833 .flags = IORESOURCE_IRQ, 834 }, 835 }; 836 837 struct platform_device pxa3xx_device_mci3 = { 838 .name = "pxa2xx-mci", 839 .id = 2, 840 .dev = { 841 .dma_mask = &pxamci_dmamask, 842 .coherent_dma_mask = 0xffffffff, 843 }, 844 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3), 845 .resource = pxa3xx_resources_mci3, 846 }; 847 848 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) 849 { 850 pxa_register_device(&pxa3xx_device_mci3, info); 851 } 852 853 static struct resource pxa3xx_resources_gcu[] = { 854 { 855 .start = 0x54000000, 856 .end = 0x54000fff, 857 .flags = IORESOURCE_MEM, 858 }, 859 { 860 .start = IRQ_GCU, 861 .end = IRQ_GCU, 862 .flags = IORESOURCE_IRQ, 863 }, 864 }; 865 866 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32); 867 868 struct platform_device pxa3xx_device_gcu = { 869 .name = "pxa3xx-gcu", 870 .id = -1, 871 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu), 872 .resource = pxa3xx_resources_gcu, 873 .dev = { 874 .dma_mask = &pxa3xx_gcu_dmamask, 875 .coherent_dma_mask = 0xffffffff, 876 }, 877 }; 878 879 #endif /* CONFIG_PXA3xx */ 880 881 #if defined(CONFIG_PXA3xx) 882 static struct resource pxa3xx_resources_i2c_power[] = { 883 { 884 .start = 0x40f500c0, 885 .end = 0x40f500d3, 886 .flags = IORESOURCE_MEM, 887 }, { 888 .start = IRQ_PWRI2C, 889 .end = IRQ_PWRI2C, 890 .flags = IORESOURCE_IRQ, 891 }, 892 }; 893 894 struct platform_device pxa3xx_device_i2c_power = { 895 .name = "pxa3xx-pwri2c", 896 .id = 1, 897 .resource = pxa3xx_resources_i2c_power, 898 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power), 899 }; 900 901 static struct resource pxa3xx_resources_nand[] = { 902 [0] = { 903 .start = 0x43100000, 904 .end = 0x43100053, 905 .flags = IORESOURCE_MEM, 906 }, 907 [1] = { 908 .start = IRQ_NAND, 909 .end = IRQ_NAND, 910 .flags = IORESOURCE_IRQ, 911 }, 912 }; 913 914 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32); 915 916 struct platform_device pxa3xx_device_nand = { 917 .name = "pxa3xx-nand", 918 .id = -1, 919 .dev = { 920 .dma_mask = &pxa3xx_nand_dma_mask, 921 .coherent_dma_mask = DMA_BIT_MASK(32), 922 }, 923 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand), 924 .resource = pxa3xx_resources_nand, 925 }; 926 927 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info) 928 { 929 pxa_register_device(&pxa3xx_device_nand, info); 930 } 931 932 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32); 933 934 static struct resource pxa3xx_resource_ssp4[] = { 935 [0] = { 936 .start = 0x41a00000, 937 .end = 0x41a0003f, 938 .flags = IORESOURCE_MEM, 939 }, 940 [1] = { 941 .start = IRQ_SSP4, 942 .end = IRQ_SSP4, 943 .flags = IORESOURCE_IRQ, 944 }, 945 }; 946 947 /* 948 * PXA3xx SSP is basically equivalent to PXA27x. 949 * However, we need to register the device by the correct name in order to 950 * make the driver set the correct internal type, hence we provide specific 951 * platform_devices for each of them. 952 */ 953 struct platform_device pxa3xx_device_ssp1 = { 954 .name = "pxa3xx-ssp", 955 .id = 0, 956 .dev = { 957 .dma_mask = &pxa27x_ssp1_dma_mask, 958 .coherent_dma_mask = DMA_BIT_MASK(32), 959 }, 960 .resource = pxa27x_resource_ssp1, 961 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), 962 }; 963 964 struct platform_device pxa3xx_device_ssp2 = { 965 .name = "pxa3xx-ssp", 966 .id = 1, 967 .dev = { 968 .dma_mask = &pxa27x_ssp2_dma_mask, 969 .coherent_dma_mask = DMA_BIT_MASK(32), 970 }, 971 .resource = pxa27x_resource_ssp2, 972 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), 973 }; 974 975 struct platform_device pxa3xx_device_ssp3 = { 976 .name = "pxa3xx-ssp", 977 .id = 2, 978 .dev = { 979 .dma_mask = &pxa27x_ssp3_dma_mask, 980 .coherent_dma_mask = DMA_BIT_MASK(32), 981 }, 982 .resource = pxa27x_resource_ssp3, 983 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), 984 }; 985 986 struct platform_device pxa3xx_device_ssp4 = { 987 .name = "pxa3xx-ssp", 988 .id = 3, 989 .dev = { 990 .dma_mask = &pxa3xx_ssp4_dma_mask, 991 .coherent_dma_mask = DMA_BIT_MASK(32), 992 }, 993 .resource = pxa3xx_resource_ssp4, 994 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), 995 }; 996 #endif /* CONFIG_PXA3xx */ 997 998 struct resource pxa_resource_gpio[] = { 999 { 1000 .start = 0x40e00000, 1001 .end = 0x40e0ffff, 1002 .flags = IORESOURCE_MEM, 1003 }, { 1004 .start = IRQ_GPIO0, 1005 .end = IRQ_GPIO0, 1006 .name = "gpio0", 1007 .flags = IORESOURCE_IRQ, 1008 }, { 1009 .start = IRQ_GPIO1, 1010 .end = IRQ_GPIO1, 1011 .name = "gpio1", 1012 .flags = IORESOURCE_IRQ, 1013 }, { 1014 .start = IRQ_GPIO_2_x, 1015 .end = IRQ_GPIO_2_x, 1016 .name = "gpio_mux", 1017 .flags = IORESOURCE_IRQ, 1018 }, 1019 }; 1020 1021 struct platform_device pxa25x_device_gpio = { 1022 #ifdef CONFIG_CPU_PXA26x 1023 .name = "pxa26x-gpio", 1024 #else 1025 .name = "pxa25x-gpio", 1026 #endif 1027 .id = -1, 1028 .num_resources = ARRAY_SIZE(pxa_resource_gpio), 1029 .resource = pxa_resource_gpio, 1030 }; 1031 1032 struct platform_device pxa27x_device_gpio = { 1033 .name = "pxa27x-gpio", 1034 .id = -1, 1035 .num_resources = ARRAY_SIZE(pxa_resource_gpio), 1036 .resource = pxa_resource_gpio, 1037 }; 1038 1039 struct platform_device pxa3xx_device_gpio = { 1040 .name = "pxa3xx-gpio", 1041 .id = -1, 1042 .num_resources = ARRAY_SIZE(pxa_resource_gpio), 1043 .resource = pxa_resource_gpio, 1044 }; 1045 1046 struct platform_device pxa93x_device_gpio = { 1047 .name = "pxa93x-gpio", 1048 .id = -1, 1049 .num_resources = ARRAY_SIZE(pxa_resource_gpio), 1050 .resource = pxa_resource_gpio, 1051 }; 1052 1053 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1054 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1055 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) 1056 { 1057 struct platform_device *pd; 1058 1059 pd = platform_device_alloc("pxa2xx-spi", id); 1060 if (pd == NULL) { 1061 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n", 1062 id); 1063 return; 1064 } 1065 1066 pd->dev.platform_data = info; 1067 platform_device_add(pd); 1068 } 1069 1070 static struct resource pxa_dma_resource[] = { 1071 [0] = { 1072 .start = 0x40000000, 1073 .end = 0x4000ffff, 1074 .flags = IORESOURCE_MEM, 1075 }, 1076 [1] = { 1077 .start = IRQ_DMA, 1078 .end = IRQ_DMA, 1079 .flags = IORESOURCE_IRQ, 1080 }, 1081 }; 1082 1083 static u64 pxadma_dmamask = 0xffffffffUL; 1084 1085 static struct platform_device pxa2xx_pxa_dma = { 1086 .name = "pxa-dma", 1087 .id = 0, 1088 .dev = { 1089 .dma_mask = &pxadma_dmamask, 1090 .coherent_dma_mask = 0xffffffff, 1091 }, 1092 .num_resources = ARRAY_SIZE(pxa_dma_resource), 1093 .resource = pxa_dma_resource, 1094 }; 1095 1096 void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata) 1097 { 1098 pxa_register_device(&pxa2xx_pxa_dma, dma_pdata); 1099 } 1100