xref: /linux/arch/arm/mach-pxa/devices.c (revision e6acc4062c02ee4a1a3ae961d073229f72e8f200)
1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
28f58de7cSeric miao #include <linux/module.h>
38f58de7cSeric miao #include <linux/kernel.h>
48f58de7cSeric miao #include <linux/init.h>
58f58de7cSeric miao #include <linux/platform_device.h>
622abc0d2SRobert Jarzmik #include <linux/clkdev.h>
7a52e1736SEzequiel Garcia #include <linux/clk-provider.h>
88f58de7cSeric miao #include <linux/dma-mapping.h>
91da10c17SRobert Jarzmik #include <linux/dmaengine.h>
108348c259SSebastian Andrzej Siewior #include <linux/spi/pxa2xx_spi.h>
11f15fc9b1SWolfram Sang #include <linux/platform_data/i2c-pxa.h>
1208d3df8cSArnd Bergmann #include <linux/soc/pxa/cpu.h>
138f58de7cSeric miao 
144c25c5d2SArnd Bergmann #include "udc.h"
15293b2da1SArnd Bergmann #include <linux/platform_data/usb-pxa3xx-ulpi.h>
16293b2da1SArnd Bergmann #include <linux/platform_data/video-pxafb.h>
17293b2da1SArnd Bergmann #include <linux/platform_data/mmc-pxamci.h>
18293b2da1SArnd Bergmann #include <linux/platform_data/irda-pxaficp.h>
19*e6acc406SArnd Bergmann #include "irqs.h"
20293b2da1SArnd Bergmann #include <linux/platform_data/usb-ohci-pxa27x.h>
21293b2da1SArnd Bergmann #include <linux/platform_data/keypad-pxa27x.h>
22a71daaa1SMauro Carvalho Chehab #include <linux/platform_data/media/camera-pxa.h>
2322f08665SArnd Bergmann #include <linux/platform_data/asoc-pxa.h>
244be0856fSRobert Jarzmik #include <linux/platform_data/mmp_dma.h>
25293b2da1SArnd Bergmann #include <linux/platform_data/mtd-nand-pxa3xx.h>
268f58de7cSeric miao 
27*e6acc406SArnd Bergmann #include "regs-ost.h"
28*e6acc406SArnd Bergmann #include "reset.h"
298f58de7cSeric miao #include "devices.h"
30bc3a5959SPhilipp Zabel #include "generic.h"
318f58de7cSeric miao 
328f58de7cSeric miao void __init pxa_register_device(struct platform_device *dev, void *data)
338f58de7cSeric miao {
348f58de7cSeric miao 	int ret;
358f58de7cSeric miao 
368f58de7cSeric miao 	dev->dev.platform_data = data;
378f58de7cSeric miao 
388f58de7cSeric miao 	ret = platform_device_register(dev);
398f58de7cSeric miao 	if (ret)
408f58de7cSeric miao 		dev_err(&dev->dev, "unable to register device: %d\n", ret);
418f58de7cSeric miao }
428f58de7cSeric miao 
4309a5358dSEric Miao static struct resource pxa_resource_pmu = {
4409a5358dSEric Miao 	.start	= IRQ_PMU,
4509a5358dSEric Miao 	.end	= IRQ_PMU,
4609a5358dSEric Miao 	.flags	= IORESOURCE_IRQ,
4709a5358dSEric Miao };
4809a5358dSEric Miao 
4909a5358dSEric Miao struct platform_device pxa_device_pmu = {
50f9eff219SMark Rutland 	.name		= "xscale-pmu",
51df3d17e0SSudeep KarkadaNagesha 	.id		= -1,
5209a5358dSEric Miao 	.resource	= &pxa_resource_pmu,
5309a5358dSEric Miao 	.num_resources	= 1,
5409a5358dSEric Miao };
5509a5358dSEric Miao 
568f58de7cSeric miao static struct resource pxamci_resources[] = {
578f58de7cSeric miao 	[0] = {
588f58de7cSeric miao 		.start	= 0x41100000,
598f58de7cSeric miao 		.end	= 0x41100fff,
608f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
618f58de7cSeric miao 	},
628f58de7cSeric miao 	[1] = {
638f58de7cSeric miao 		.start	= IRQ_MMC,
648f58de7cSeric miao 		.end	= IRQ_MMC,
658f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
668f58de7cSeric miao 	},
678f58de7cSeric miao };
688f58de7cSeric miao 
698f58de7cSeric miao static u64 pxamci_dmamask = 0xffffffffUL;
708f58de7cSeric miao 
718f58de7cSeric miao struct platform_device pxa_device_mci = {
728f58de7cSeric miao 	.name		= "pxa2xx-mci",
73fafc9d3fSBridge Wu 	.id		= 0,
748f58de7cSeric miao 	.dev		= {
758f58de7cSeric miao 		.dma_mask = &pxamci_dmamask,
768f58de7cSeric miao 		.coherent_dma_mask = 0xffffffff,
778f58de7cSeric miao 	},
788f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxamci_resources),
798f58de7cSeric miao 	.resource	= pxamci_resources,
808f58de7cSeric miao };
818f58de7cSeric miao 
828f58de7cSeric miao void __init pxa_set_mci_info(struct pxamci_platform_data *info)
838f58de7cSeric miao {
848f58de7cSeric miao 	pxa_register_device(&pxa_device_mci, info);
858f58de7cSeric miao }
868f58de7cSeric miao 
878f58de7cSeric miao 
881257629bSPhilipp Zabel static struct pxa2xx_udc_mach_info pxa_udc_info = {
891257629bSPhilipp Zabel 	.gpio_pullup = -1,
901257629bSPhilipp Zabel };
918f58de7cSeric miao 
928f58de7cSeric miao void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
938f58de7cSeric miao {
948f58de7cSeric miao 	memcpy(&pxa_udc_info, info, sizeof *info);
958f58de7cSeric miao }
968f58de7cSeric miao 
978f58de7cSeric miao static struct resource pxa2xx_udc_resources[] = {
988f58de7cSeric miao 	[0] = {
998f58de7cSeric miao 		.start	= 0x40600000,
1008f58de7cSeric miao 		.end	= 0x4060ffff,
1018f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
1028f58de7cSeric miao 	},
1038f58de7cSeric miao 	[1] = {
1048f58de7cSeric miao 		.start	= IRQ_USB,
1058f58de7cSeric miao 		.end	= IRQ_USB,
1068f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
1078f58de7cSeric miao 	},
1088f58de7cSeric miao };
1098f58de7cSeric miao 
1108f58de7cSeric miao static u64 udc_dma_mask = ~(u32)0;
1118f58de7cSeric miao 
1127a857620SPhilipp Zabel struct platform_device pxa25x_device_udc = {
1137a857620SPhilipp Zabel 	.name		= "pxa25x-udc",
1147a857620SPhilipp Zabel 	.id		= -1,
1157a857620SPhilipp Zabel 	.resource	= pxa2xx_udc_resources,
1167a857620SPhilipp Zabel 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
1177a857620SPhilipp Zabel 	.dev		=  {
1187a857620SPhilipp Zabel 		.platform_data	= &pxa_udc_info,
1197a857620SPhilipp Zabel 		.dma_mask	= &udc_dma_mask,
1207a857620SPhilipp Zabel 	}
1217a857620SPhilipp Zabel };
1227a857620SPhilipp Zabel 
1237a857620SPhilipp Zabel struct platform_device pxa27x_device_udc = {
1247a857620SPhilipp Zabel 	.name		= "pxa27x-udc",
1258f58de7cSeric miao 	.id		= -1,
1268f58de7cSeric miao 	.resource	= pxa2xx_udc_resources,
1278f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
1288f58de7cSeric miao 	.dev		=  {
1298f58de7cSeric miao 		.platform_data	= &pxa_udc_info,
1308f58de7cSeric miao 		.dma_mask	= &udc_dma_mask,
1318f58de7cSeric miao 	}
1328f58de7cSeric miao };
1338f58de7cSeric miao 
13469f22be7SIgor Grinberg #ifdef CONFIG_PXA3xx
13569f22be7SIgor Grinberg static struct resource pxa3xx_u2d_resources[] = {
13669f22be7SIgor Grinberg 	[0] = {
13769f22be7SIgor Grinberg 		.start	= 0x54100000,
13869f22be7SIgor Grinberg 		.end	= 0x54100fff,
13969f22be7SIgor Grinberg 		.flags	= IORESOURCE_MEM,
14069f22be7SIgor Grinberg 	},
14169f22be7SIgor Grinberg 	[1] = {
14269f22be7SIgor Grinberg 		.start	= IRQ_USB2,
14369f22be7SIgor Grinberg 		.end	= IRQ_USB2,
14469f22be7SIgor Grinberg 		.flags	= IORESOURCE_IRQ,
14569f22be7SIgor Grinberg 	},
14669f22be7SIgor Grinberg };
14769f22be7SIgor Grinberg 
14869f22be7SIgor Grinberg struct platform_device pxa3xx_device_u2d = {
14969f22be7SIgor Grinberg 	.name		= "pxa3xx-u2d",
15069f22be7SIgor Grinberg 	.id		= -1,
15169f22be7SIgor Grinberg 	.resource	= pxa3xx_u2d_resources,
15269f22be7SIgor Grinberg 	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
15369f22be7SIgor Grinberg };
15469f22be7SIgor Grinberg 
15569f22be7SIgor Grinberg void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
15669f22be7SIgor Grinberg {
15769f22be7SIgor Grinberg 	pxa_register_device(&pxa3xx_device_u2d, info);
15869f22be7SIgor Grinberg }
15969f22be7SIgor Grinberg #endif /* CONFIG_PXA3xx */
16069f22be7SIgor Grinberg 
1618f58de7cSeric miao static struct resource pxafb_resources[] = {
1628f58de7cSeric miao 	[0] = {
1638f58de7cSeric miao 		.start	= 0x44000000,
1648f58de7cSeric miao 		.end	= 0x4400ffff,
1658f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
1668f58de7cSeric miao 	},
1678f58de7cSeric miao 	[1] = {
1688f58de7cSeric miao 		.start	= IRQ_LCD,
1698f58de7cSeric miao 		.end	= IRQ_LCD,
1708f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
1718f58de7cSeric miao 	},
1728f58de7cSeric miao };
1738f58de7cSeric miao 
1748f58de7cSeric miao static u64 fb_dma_mask = ~(u64)0;
1758f58de7cSeric miao 
1768f58de7cSeric miao struct platform_device pxa_device_fb = {
1778f58de7cSeric miao 	.name		= "pxa2xx-fb",
1788f58de7cSeric miao 	.id		= -1,
1798f58de7cSeric miao 	.dev		= {
1808f58de7cSeric miao 		.dma_mask	= &fb_dma_mask,
1818f58de7cSeric miao 		.coherent_dma_mask = 0xffffffff,
1828f58de7cSeric miao 	},
1838f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxafb_resources),
1848f58de7cSeric miao 	.resource	= pxafb_resources,
1858f58de7cSeric miao };
1868f58de7cSeric miao 
1874321e1a1SRussell King - ARM Linux void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
1888f58de7cSeric miao {
1894321e1a1SRussell King - ARM Linux 	pxa_device_fb.dev.parent = parent;
1908f58de7cSeric miao 	pxa_register_device(&pxa_device_fb, info);
1918f58de7cSeric miao }
1928f58de7cSeric miao 
1938f58de7cSeric miao static struct resource pxa_resource_ffuart[] = {
1948f58de7cSeric miao 	{
19502f65262SEric Miao 		.start	= 0x40100000,
19602f65262SEric Miao 		.end	= 0x40100023,
1978f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
1988f58de7cSeric miao 	}, {
1998f58de7cSeric miao 		.start	= IRQ_FFUART,
2008f58de7cSeric miao 		.end	= IRQ_FFUART,
2018f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2028f58de7cSeric miao 	}
2038f58de7cSeric miao };
2048f58de7cSeric miao 
2058f58de7cSeric miao struct platform_device pxa_device_ffuart = {
2068f58de7cSeric miao 	.name		= "pxa2xx-uart",
2078f58de7cSeric miao 	.id		= 0,
2088f58de7cSeric miao 	.resource	= pxa_resource_ffuart,
2098f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
2108f58de7cSeric miao };
2118f58de7cSeric miao 
212cc155c6fSRussell King void __init pxa_set_ffuart_info(void *info)
213cc155c6fSRussell King {
214cc155c6fSRussell King 	pxa_register_device(&pxa_device_ffuart, info);
215cc155c6fSRussell King }
216cc155c6fSRussell King 
2178f58de7cSeric miao static struct resource pxa_resource_btuart[] = {
2188f58de7cSeric miao 	{
21902f65262SEric Miao 		.start	= 0x40200000,
22002f65262SEric Miao 		.end	= 0x40200023,
2218f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2228f58de7cSeric miao 	}, {
2238f58de7cSeric miao 		.start	= IRQ_BTUART,
2248f58de7cSeric miao 		.end	= IRQ_BTUART,
2258f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2268f58de7cSeric miao 	}
2278f58de7cSeric miao };
2288f58de7cSeric miao 
2298f58de7cSeric miao struct platform_device pxa_device_btuart = {
2308f58de7cSeric miao 	.name		= "pxa2xx-uart",
2318f58de7cSeric miao 	.id		= 1,
2328f58de7cSeric miao 	.resource	= pxa_resource_btuart,
2338f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
2348f58de7cSeric miao };
2358f58de7cSeric miao 
236cc155c6fSRussell King void __init pxa_set_btuart_info(void *info)
237cc155c6fSRussell King {
238cc155c6fSRussell King 	pxa_register_device(&pxa_device_btuart, info);
239cc155c6fSRussell King }
240cc155c6fSRussell King 
2418f58de7cSeric miao static struct resource pxa_resource_stuart[] = {
2428f58de7cSeric miao 	{
24302f65262SEric Miao 		.start	= 0x40700000,
24402f65262SEric Miao 		.end	= 0x40700023,
2458f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2468f58de7cSeric miao 	}, {
2478f58de7cSeric miao 		.start	= IRQ_STUART,
2488f58de7cSeric miao 		.end	= IRQ_STUART,
2498f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2508f58de7cSeric miao 	}
2518f58de7cSeric miao };
2528f58de7cSeric miao 
2538f58de7cSeric miao struct platform_device pxa_device_stuart = {
2548f58de7cSeric miao 	.name		= "pxa2xx-uart",
2558f58de7cSeric miao 	.id		= 2,
2568f58de7cSeric miao 	.resource	= pxa_resource_stuart,
2578f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
2588f58de7cSeric miao };
2598f58de7cSeric miao 
260cc155c6fSRussell King void __init pxa_set_stuart_info(void *info)
261cc155c6fSRussell King {
262cc155c6fSRussell King 	pxa_register_device(&pxa_device_stuart, info);
263cc155c6fSRussell King }
264cc155c6fSRussell King 
2658f58de7cSeric miao static struct resource pxa_resource_hwuart[] = {
2668f58de7cSeric miao 	{
26702f65262SEric Miao 		.start	= 0x41600000,
26802f65262SEric Miao 		.end	= 0x4160002F,
2698f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2708f58de7cSeric miao 	}, {
2718f58de7cSeric miao 		.start	= IRQ_HWUART,
2728f58de7cSeric miao 		.end	= IRQ_HWUART,
2738f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2748f58de7cSeric miao 	}
2758f58de7cSeric miao };
2768f58de7cSeric miao 
2778f58de7cSeric miao struct platform_device pxa_device_hwuart = {
2788f58de7cSeric miao 	.name		= "pxa2xx-uart",
2798f58de7cSeric miao 	.id		= 3,
2808f58de7cSeric miao 	.resource	= pxa_resource_hwuart,
2818f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
2828f58de7cSeric miao };
2838f58de7cSeric miao 
284cc155c6fSRussell King void __init pxa_set_hwuart_info(void *info)
285cc155c6fSRussell King {
286cc155c6fSRussell King 	if (cpu_is_pxa255())
287cc155c6fSRussell King 		pxa_register_device(&pxa_device_hwuart, info);
288cc155c6fSRussell King 	else
289cc155c6fSRussell King 		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
290cc155c6fSRussell King }
291cc155c6fSRussell King 
2928f58de7cSeric miao static struct resource pxai2c_resources[] = {
2938f58de7cSeric miao 	{
2948f58de7cSeric miao 		.start	= 0x40301680,
2958f58de7cSeric miao 		.end	= 0x403016a3,
2968f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2978f58de7cSeric miao 	}, {
2988f58de7cSeric miao 		.start	= IRQ_I2C,
2998f58de7cSeric miao 		.end	= IRQ_I2C,
3008f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
3018f58de7cSeric miao 	},
3028f58de7cSeric miao };
3038f58de7cSeric miao 
3048f58de7cSeric miao struct platform_device pxa_device_i2c = {
3058f58de7cSeric miao 	.name		= "pxa2xx-i2c",
3068f58de7cSeric miao 	.id		= 0,
3078f58de7cSeric miao 	.resource	= pxai2c_resources,
3088f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxai2c_resources),
3098f58de7cSeric miao };
3108f58de7cSeric miao 
3118f58de7cSeric miao void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
3128f58de7cSeric miao {
3138f58de7cSeric miao 	pxa_register_device(&pxa_device_i2c, info);
3148f58de7cSeric miao }
3158f58de7cSeric miao 
31699464293SEric Miao #ifdef CONFIG_PXA27x
31799464293SEric Miao static struct resource pxa27x_resources_i2c_power[] = {
31899464293SEric Miao 	{
31999464293SEric Miao 		.start	= 0x40f00180,
32099464293SEric Miao 		.end	= 0x40f001a3,
32199464293SEric Miao 		.flags	= IORESOURCE_MEM,
32299464293SEric Miao 	}, {
32399464293SEric Miao 		.start	= IRQ_PWRI2C,
32499464293SEric Miao 		.end	= IRQ_PWRI2C,
32599464293SEric Miao 		.flags	= IORESOURCE_IRQ,
32699464293SEric Miao 	},
32799464293SEric Miao };
32899464293SEric Miao 
32999464293SEric Miao struct platform_device pxa27x_device_i2c_power = {
33099464293SEric Miao 	.name		= "pxa2xx-i2c",
33199464293SEric Miao 	.id		= 1,
33299464293SEric Miao 	.resource	= pxa27x_resources_i2c_power,
33399464293SEric Miao 	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
33499464293SEric Miao };
33599464293SEric Miao #endif
33699464293SEric Miao 
3378f58de7cSeric miao static struct resource pxai2s_resources[] = {
3388f58de7cSeric miao 	{
3398f58de7cSeric miao 		.start	= 0x40400000,
3408f58de7cSeric miao 		.end	= 0x40400083,
3418f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
3428f58de7cSeric miao 	}, {
3438f58de7cSeric miao 		.start	= IRQ_I2S,
3448f58de7cSeric miao 		.end	= IRQ_I2S,
3458f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
3468f58de7cSeric miao 	},
3478f58de7cSeric miao };
3488f58de7cSeric miao 
3498f58de7cSeric miao struct platform_device pxa_device_i2s = {
3508f58de7cSeric miao 	.name		= "pxa2xx-i2s",
3518f58de7cSeric miao 	.id		= -1,
3528f58de7cSeric miao 	.resource	= pxai2s_resources,
3538f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxai2s_resources),
3548f58de7cSeric miao };
3558f58de7cSeric miao 
356f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp1 = {
357f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
358f0fba2adSLiam Girdwood 	.id		= 0,
359f0fba2adSLiam Girdwood };
360f0fba2adSLiam Girdwood 
361f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp2= {
362f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
363f0fba2adSLiam Girdwood 	.id		= 1,
364f0fba2adSLiam Girdwood };
365f0fba2adSLiam Girdwood 
366f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp3 = {
367f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
368f0fba2adSLiam Girdwood 	.id		= 2,
369f0fba2adSLiam Girdwood };
370f0fba2adSLiam Girdwood 
371f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp4 = {
372f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
373f0fba2adSLiam Girdwood 	.id		= 3,
374f0fba2adSLiam Girdwood };
375f0fba2adSLiam Girdwood 
376f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_platform = {
377f0fba2adSLiam Girdwood 	.name		= "pxa-pcm-audio",
378f0fba2adSLiam Girdwood 	.id		= -1,
379f0fba2adSLiam Girdwood };
380f0fba2adSLiam Girdwood 
3818f58de7cSeric miao static u64 pxaficp_dmamask = ~(u32)0;
3828f58de7cSeric miao 
383121f3f9bSRob Herring static struct resource pxa_ir_resources[] = {
384121f3f9bSRob Herring 	[0] = {
385121f3f9bSRob Herring 		.start  = IRQ_STUART,
386121f3f9bSRob Herring 		.end    = IRQ_STUART,
387121f3f9bSRob Herring 		.flags  = IORESOURCE_IRQ,
388121f3f9bSRob Herring 	},
389121f3f9bSRob Herring 	[1] = {
390121f3f9bSRob Herring 		.start  = IRQ_ICP,
391121f3f9bSRob Herring 		.end    = IRQ_ICP,
392121f3f9bSRob Herring 		.flags  = IORESOURCE_IRQ,
393121f3f9bSRob Herring 	},
39448a629daSRobert Jarzmik 	[3] = {
39548a629daSRobert Jarzmik 		.start  = 0x40800000,
39648a629daSRobert Jarzmik 		.end	= 0x4080001b,
39748a629daSRobert Jarzmik 		.flags  = IORESOURCE_MEM,
39848a629daSRobert Jarzmik 	},
39948a629daSRobert Jarzmik 	[4] = {
40048a629daSRobert Jarzmik 		.start  = 0x40700000,
40148a629daSRobert Jarzmik 		.end	= 0x40700023,
40248a629daSRobert Jarzmik 		.flags  = IORESOURCE_MEM,
40348a629daSRobert Jarzmik 	},
404121f3f9bSRob Herring };
405121f3f9bSRob Herring 
4068f58de7cSeric miao struct platform_device pxa_device_ficp = {
4078f58de7cSeric miao 	.name		= "pxa2xx-ir",
4088f58de7cSeric miao 	.id		= -1,
409121f3f9bSRob Herring 	.num_resources	= ARRAY_SIZE(pxa_ir_resources),
410121f3f9bSRob Herring 	.resource	= pxa_ir_resources,
4118f58de7cSeric miao 	.dev		= {
4128f58de7cSeric miao 		.dma_mask = &pxaficp_dmamask,
4138f58de7cSeric miao 		.coherent_dma_mask = 0xffffffff,
4148f58de7cSeric miao 	},
4158f58de7cSeric miao };
4168f58de7cSeric miao 
4178f58de7cSeric miao void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
4188f58de7cSeric miao {
4198f58de7cSeric miao 	pxa_register_device(&pxa_device_ficp, info);
4208f58de7cSeric miao }
4218f58de7cSeric miao 
42272493146SRobert Jarzmik static struct resource pxa_rtc_resources[] = {
42372493146SRobert Jarzmik 	[0] = {
42472493146SRobert Jarzmik 		.start  = 0x40900000,
42572493146SRobert Jarzmik 		.end	= 0x40900000 + 0x3b,
42672493146SRobert Jarzmik 		.flags  = IORESOURCE_MEM,
42772493146SRobert Jarzmik 	},
42872493146SRobert Jarzmik 	[1] = {
42972493146SRobert Jarzmik 		.start  = IRQ_RTC1Hz,
43072493146SRobert Jarzmik 		.end    = IRQ_RTC1Hz,
4313888c090SHaojian Zhuang 		.name	= "rtc 1Hz",
43272493146SRobert Jarzmik 		.flags  = IORESOURCE_IRQ,
43372493146SRobert Jarzmik 	},
43472493146SRobert Jarzmik 	[2] = {
43572493146SRobert Jarzmik 		.start  = IRQ_RTCAlrm,
43672493146SRobert Jarzmik 		.end    = IRQ_RTCAlrm,
4373888c090SHaojian Zhuang 		.name	= "rtc alarm",
43872493146SRobert Jarzmik 		.flags  = IORESOURCE_IRQ,
43972493146SRobert Jarzmik 	},
44072493146SRobert Jarzmik };
44172493146SRobert Jarzmik 
44272493146SRobert Jarzmik struct platform_device pxa_device_rtc = {
44372493146SRobert Jarzmik 	.name		= "pxa-rtc",
44472493146SRobert Jarzmik 	.id		= -1,
44572493146SRobert Jarzmik 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
44672493146SRobert Jarzmik 	.resource       = pxa_rtc_resources,
44772493146SRobert Jarzmik };
44872493146SRobert Jarzmik 
4493888c090SHaojian Zhuang struct platform_device sa1100_device_rtc = {
4503888c090SHaojian Zhuang 	.name		= "sa1100-rtc",
4513888c090SHaojian Zhuang 	.id		= -1,
4522c4fabecSRob Herring 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
4532c4fabecSRob Herring 	.resource       = pxa_rtc_resources,
4543888c090SHaojian Zhuang };
4553888c090SHaojian Zhuang 
4569f19d638SMark Brown static struct resource pxa_ac97_resources[] = {
4579f19d638SMark Brown 	[0] = {
4589f19d638SMark Brown 		.start  = 0x40500000,
4599f19d638SMark Brown 		.end	= 0x40500000 + 0xfff,
4609f19d638SMark Brown 		.flags  = IORESOURCE_MEM,
4619f19d638SMark Brown 	},
4629f19d638SMark Brown 	[1] = {
4639f19d638SMark Brown 		.start  = IRQ_AC97,
4649f19d638SMark Brown 		.end    = IRQ_AC97,
4659f19d638SMark Brown 		.flags  = IORESOURCE_IRQ,
4669f19d638SMark Brown 	},
4679f19d638SMark Brown };
4689f19d638SMark Brown 
4699f19d638SMark Brown static u64 pxa_ac97_dmamask = 0xffffffffUL;
4709f19d638SMark Brown 
4719f19d638SMark Brown struct platform_device pxa_device_ac97 = {
4729f19d638SMark Brown 	.name           = "pxa2xx-ac97",
4739f19d638SMark Brown 	.id             = -1,
4749f19d638SMark Brown 	.dev            = {
4759f19d638SMark Brown 		.dma_mask = &pxa_ac97_dmamask,
4769f19d638SMark Brown 		.coherent_dma_mask = 0xffffffff,
4779f19d638SMark Brown 	},
4789f19d638SMark Brown 	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
4799f19d638SMark Brown 	.resource       = pxa_ac97_resources,
4809f19d638SMark Brown };
4819f19d638SMark Brown 
4829f19d638SMark Brown void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
4839f19d638SMark Brown {
48422abc0d2SRobert Jarzmik 	int ret;
48522abc0d2SRobert Jarzmik 
48622abc0d2SRobert Jarzmik 	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK",
48722abc0d2SRobert Jarzmik 			   &pxa_device_ac97.dev);
48822abc0d2SRobert Jarzmik 	if (ret)
48922abc0d2SRobert Jarzmik 		pr_err("PXA AC97 clock1 alias error: %d\n", ret);
49022abc0d2SRobert Jarzmik 
49122abc0d2SRobert Jarzmik 	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK",
49222abc0d2SRobert Jarzmik 			    &pxa_device_ac97.dev);
49322abc0d2SRobert Jarzmik 	if (ret)
49422abc0d2SRobert Jarzmik 		pr_err("PXA AC97 clock2 alias error: %d\n", ret);
49522abc0d2SRobert Jarzmik 
4969f19d638SMark Brown 	pxa_register_device(&pxa_device_ac97, ops);
4979f19d638SMark Brown }
4989f19d638SMark Brown 
4998f58de7cSeric miao #ifdef CONFIG_PXA25x
5008f58de7cSeric miao 
50175540c1aSeric miao static struct resource pxa25x_resource_pwm0[] = {
50275540c1aSeric miao 	[0] = {
50375540c1aSeric miao 		.start	= 0x40b00000,
50475540c1aSeric miao 		.end	= 0x40b0000f,
50575540c1aSeric miao 		.flags	= IORESOURCE_MEM,
50675540c1aSeric miao 	},
50775540c1aSeric miao };
50875540c1aSeric miao 
50975540c1aSeric miao struct platform_device pxa25x_device_pwm0 = {
51075540c1aSeric miao 	.name		= "pxa25x-pwm",
51175540c1aSeric miao 	.id		= 0,
51275540c1aSeric miao 	.resource	= pxa25x_resource_pwm0,
51375540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
51475540c1aSeric miao };
51575540c1aSeric miao 
51675540c1aSeric miao static struct resource pxa25x_resource_pwm1[] = {
51775540c1aSeric miao 	[0] = {
51875540c1aSeric miao 		.start	= 0x40c00000,
51975540c1aSeric miao 		.end	= 0x40c0000f,
52075540c1aSeric miao 		.flags	= IORESOURCE_MEM,
52175540c1aSeric miao 	},
52275540c1aSeric miao };
52375540c1aSeric miao 
52475540c1aSeric miao struct platform_device pxa25x_device_pwm1 = {
52575540c1aSeric miao 	.name		= "pxa25x-pwm",
52675540c1aSeric miao 	.id		= 1,
52775540c1aSeric miao 	.resource	= pxa25x_resource_pwm1,
52875540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
52975540c1aSeric miao };
53075540c1aSeric miao 
5318f58de7cSeric miao static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
5328f58de7cSeric miao 
5338f58de7cSeric miao static struct resource pxa25x_resource_ssp[] = {
5348f58de7cSeric miao 	[0] = {
5358f58de7cSeric miao 		.start	= 0x41000000,
5368f58de7cSeric miao 		.end	= 0x4100001f,
5378f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
5388f58de7cSeric miao 	},
5398f58de7cSeric miao 	[1] = {
5408f58de7cSeric miao 		.start	= IRQ_SSP,
5418f58de7cSeric miao 		.end	= IRQ_SSP,
5428f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
5438f58de7cSeric miao 	},
5448f58de7cSeric miao };
5458f58de7cSeric miao 
5468f58de7cSeric miao struct platform_device pxa25x_device_ssp = {
5478f58de7cSeric miao 	.name		= "pxa25x-ssp",
5488f58de7cSeric miao 	.id		= 0,
5498f58de7cSeric miao 	.dev		= {
5508f58de7cSeric miao 		.dma_mask = &pxa25x_ssp_dma_mask,
5518f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
5528f58de7cSeric miao 	},
5538f58de7cSeric miao 	.resource	= pxa25x_resource_ssp,
5548f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
5558f58de7cSeric miao };
5568f58de7cSeric miao 
5578f58de7cSeric miao static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
5588f58de7cSeric miao 
5598f58de7cSeric miao static struct resource pxa25x_resource_nssp[] = {
5608f58de7cSeric miao 	[0] = {
5618f58de7cSeric miao 		.start	= 0x41400000,
5628f58de7cSeric miao 		.end	= 0x4140002f,
5638f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
5648f58de7cSeric miao 	},
5658f58de7cSeric miao 	[1] = {
5668f58de7cSeric miao 		.start	= IRQ_NSSP,
5678f58de7cSeric miao 		.end	= IRQ_NSSP,
5688f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
5698f58de7cSeric miao 	},
5708f58de7cSeric miao };
5718f58de7cSeric miao 
5728f58de7cSeric miao struct platform_device pxa25x_device_nssp = {
5738f58de7cSeric miao 	.name		= "pxa25x-nssp",
5748f58de7cSeric miao 	.id		= 1,
5758f58de7cSeric miao 	.dev		= {
5768f58de7cSeric miao 		.dma_mask = &pxa25x_nssp_dma_mask,
5778f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
5788f58de7cSeric miao 	},
5798f58de7cSeric miao 	.resource	= pxa25x_resource_nssp,
5808f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
5818f58de7cSeric miao };
5828f58de7cSeric miao 
5838f58de7cSeric miao static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
5848f58de7cSeric miao 
5858f58de7cSeric miao static struct resource pxa25x_resource_assp[] = {
5868f58de7cSeric miao 	[0] = {
5878f58de7cSeric miao 		.start	= 0x41500000,
5888f58de7cSeric miao 		.end	= 0x4150002f,
5898f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
5908f58de7cSeric miao 	},
5918f58de7cSeric miao 	[1] = {
5928f58de7cSeric miao 		.start	= IRQ_ASSP,
5938f58de7cSeric miao 		.end	= IRQ_ASSP,
5948f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
5958f58de7cSeric miao 	},
5968f58de7cSeric miao };
5978f58de7cSeric miao 
5988f58de7cSeric miao struct platform_device pxa25x_device_assp = {
5998f58de7cSeric miao 	/* ASSP is basically equivalent to NSSP */
6008f58de7cSeric miao 	.name		= "pxa25x-nssp",
6018f58de7cSeric miao 	.id		= 2,
6028f58de7cSeric miao 	.dev		= {
6038f58de7cSeric miao 		.dma_mask = &pxa25x_assp_dma_mask,
6048f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
6058f58de7cSeric miao 	},
6068f58de7cSeric miao 	.resource	= pxa25x_resource_assp,
6078f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
6088f58de7cSeric miao };
6098f58de7cSeric miao #endif /* CONFIG_PXA25x */
6108f58de7cSeric miao 
6118f58de7cSeric miao #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
612a4553358SHaojian Zhuang static struct resource pxa27x_resource_camera[] = {
61337320980Seric miao 	[0] = {
614a4553358SHaojian Zhuang 		.start	= 0x50000000,
615a4553358SHaojian Zhuang 		.end	= 0x50000fff,
61637320980Seric miao 		.flags	= IORESOURCE_MEM,
61737320980Seric miao 	},
61837320980Seric miao 	[1] = {
619a4553358SHaojian Zhuang 		.start	= IRQ_CAMERA,
620a4553358SHaojian Zhuang 		.end	= IRQ_CAMERA,
62137320980Seric miao 		.flags	= IORESOURCE_IRQ,
62237320980Seric miao 	},
62337320980Seric miao };
62437320980Seric miao 
625a4553358SHaojian Zhuang static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
626a4553358SHaojian Zhuang 
627a4553358SHaojian Zhuang static struct platform_device pxa27x_device_camera = {
628a4553358SHaojian Zhuang 	.name		= "pxa27x-camera",
629a4553358SHaojian Zhuang 	.id		= 0, /* This is used to put cameras on this interface */
630a4553358SHaojian Zhuang 	.dev		= {
631a4553358SHaojian Zhuang 		.dma_mask      		= &pxa27x_dma_mask_camera,
632a4553358SHaojian Zhuang 		.coherent_dma_mask	= 0xffffffff,
633a4553358SHaojian Zhuang 	},
634a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
635a4553358SHaojian Zhuang 	.resource	= pxa27x_resource_camera,
63637320980Seric miao };
63737320980Seric miao 
638a4553358SHaojian Zhuang void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
63937320980Seric miao {
640a52e1736SEzequiel Garcia 	struct clk *mclk;
641a52e1736SEzequiel Garcia 
642a52e1736SEzequiel Garcia 	/* Register a fixed-rate clock for camera sensors. */
643a52e1736SEzequiel Garcia 	mclk = clk_register_fixed_rate(NULL, "pxa_camera_clk", NULL, 0,
644a52e1736SEzequiel Garcia 					     info->mclk_10khz * 10000);
645a52e1736SEzequiel Garcia 	if (!IS_ERR(mclk))
646a52e1736SEzequiel Garcia 		clkdev_create(mclk, "mclk", NULL);
647a4553358SHaojian Zhuang 	pxa_register_device(&pxa27x_device_camera, info);
64837320980Seric miao }
64937320980Seric miao 
650ec68e45bSeric miao static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
651ec68e45bSeric miao 
652ec68e45bSeric miao static struct resource pxa27x_resource_ohci[] = {
653ec68e45bSeric miao 	[0] = {
654ec68e45bSeric miao 		.start  = 0x4C000000,
655ec68e45bSeric miao 		.end    = 0x4C00ff6f,
656ec68e45bSeric miao 		.flags  = IORESOURCE_MEM,
657ec68e45bSeric miao 	},
658ec68e45bSeric miao 	[1] = {
659ec68e45bSeric miao 		.start  = IRQ_USBH1,
660ec68e45bSeric miao 		.end    = IRQ_USBH1,
661ec68e45bSeric miao 		.flags  = IORESOURCE_IRQ,
662ec68e45bSeric miao 	},
663ec68e45bSeric miao };
664ec68e45bSeric miao 
665ec68e45bSeric miao struct platform_device pxa27x_device_ohci = {
666ec68e45bSeric miao 	.name		= "pxa27x-ohci",
667ec68e45bSeric miao 	.id		= -1,
668ec68e45bSeric miao 	.dev		= {
669ec68e45bSeric miao 		.dma_mask = &pxa27x_ohci_dma_mask,
670ec68e45bSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
671ec68e45bSeric miao 	},
672ec68e45bSeric miao 	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
673ec68e45bSeric miao 	.resource       = pxa27x_resource_ohci,
674ec68e45bSeric miao };
675ec68e45bSeric miao 
676ec68e45bSeric miao void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
677ec68e45bSeric miao {
678ec68e45bSeric miao 	pxa_register_device(&pxa27x_device_ohci, info);
679ec68e45bSeric miao }
680a4553358SHaojian Zhuang #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
681a4553358SHaojian Zhuang 
68249ea7fc0SHaojian Zhuang #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
683a4553358SHaojian Zhuang static struct resource pxa27x_resource_keypad[] = {
684a4553358SHaojian Zhuang 	[0] = {
685a4553358SHaojian Zhuang 		.start	= 0x41500000,
686a4553358SHaojian Zhuang 		.end	= 0x4150004c,
687a4553358SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
688a4553358SHaojian Zhuang 	},
689a4553358SHaojian Zhuang 	[1] = {
690a4553358SHaojian Zhuang 		.start	= IRQ_KEYPAD,
691a4553358SHaojian Zhuang 		.end	= IRQ_KEYPAD,
692a4553358SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
693a4553358SHaojian Zhuang 	},
694a4553358SHaojian Zhuang };
695a4553358SHaojian Zhuang 
696a4553358SHaojian Zhuang struct platform_device pxa27x_device_keypad = {
697a4553358SHaojian Zhuang 	.name		= "pxa27x-keypad",
698a4553358SHaojian Zhuang 	.id		= -1,
699a4553358SHaojian Zhuang 	.resource	= pxa27x_resource_keypad,
700a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
701a4553358SHaojian Zhuang };
702a4553358SHaojian Zhuang 
703a4553358SHaojian Zhuang void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
704a4553358SHaojian Zhuang {
705a4553358SHaojian Zhuang 	pxa_register_device(&pxa27x_device_keypad, info);
706a4553358SHaojian Zhuang }
707ec68e45bSeric miao 
7088f58de7cSeric miao static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
7098f58de7cSeric miao 
7108f58de7cSeric miao static struct resource pxa27x_resource_ssp1[] = {
7118f58de7cSeric miao 	[0] = {
7128f58de7cSeric miao 		.start	= 0x41000000,
7138f58de7cSeric miao 		.end	= 0x4100003f,
7148f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
7158f58de7cSeric miao 	},
7168f58de7cSeric miao 	[1] = {
7178f58de7cSeric miao 		.start	= IRQ_SSP,
7188f58de7cSeric miao 		.end	= IRQ_SSP,
7198f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
7208f58de7cSeric miao 	},
7218f58de7cSeric miao };
7228f58de7cSeric miao 
7238f58de7cSeric miao struct platform_device pxa27x_device_ssp1 = {
7248f58de7cSeric miao 	.name		= "pxa27x-ssp",
7258f58de7cSeric miao 	.id		= 0,
7268f58de7cSeric miao 	.dev		= {
7278f58de7cSeric miao 		.dma_mask = &pxa27x_ssp1_dma_mask,
7288f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
7298f58de7cSeric miao 	},
7308f58de7cSeric miao 	.resource	= pxa27x_resource_ssp1,
7318f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
7328f58de7cSeric miao };
7338f58de7cSeric miao 
7348f58de7cSeric miao static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
7358f58de7cSeric miao 
7368f58de7cSeric miao static struct resource pxa27x_resource_ssp2[] = {
7378f58de7cSeric miao 	[0] = {
7388f58de7cSeric miao 		.start	= 0x41700000,
7398f58de7cSeric miao 		.end	= 0x4170003f,
7408f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
7418f58de7cSeric miao 	},
7428f58de7cSeric miao 	[1] = {
7438f58de7cSeric miao 		.start	= IRQ_SSP2,
7448f58de7cSeric miao 		.end	= IRQ_SSP2,
7458f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
7468f58de7cSeric miao 	},
7478f58de7cSeric miao };
7488f58de7cSeric miao 
7498f58de7cSeric miao struct platform_device pxa27x_device_ssp2 = {
7508f58de7cSeric miao 	.name		= "pxa27x-ssp",
7518f58de7cSeric miao 	.id		= 1,
7528f58de7cSeric miao 	.dev		= {
7538f58de7cSeric miao 		.dma_mask = &pxa27x_ssp2_dma_mask,
7548f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
7558f58de7cSeric miao 	},
7568f58de7cSeric miao 	.resource	= pxa27x_resource_ssp2,
7578f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
7588f58de7cSeric miao };
7598f58de7cSeric miao 
7608f58de7cSeric miao static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
7618f58de7cSeric miao 
7628f58de7cSeric miao static struct resource pxa27x_resource_ssp3[] = {
7638f58de7cSeric miao 	[0] = {
7648f58de7cSeric miao 		.start	= 0x41900000,
7658f58de7cSeric miao 		.end	= 0x4190003f,
7668f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
7678f58de7cSeric miao 	},
7688f58de7cSeric miao 	[1] = {
7698f58de7cSeric miao 		.start	= IRQ_SSP3,
7708f58de7cSeric miao 		.end	= IRQ_SSP3,
7718f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
7728f58de7cSeric miao 	},
7738f58de7cSeric miao };
7748f58de7cSeric miao 
7758f58de7cSeric miao struct platform_device pxa27x_device_ssp3 = {
7768f58de7cSeric miao 	.name		= "pxa27x-ssp",
7778f58de7cSeric miao 	.id		= 2,
7788f58de7cSeric miao 	.dev		= {
7798f58de7cSeric miao 		.dma_mask = &pxa27x_ssp3_dma_mask,
7808f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
7818f58de7cSeric miao 	},
7828f58de7cSeric miao 	.resource	= pxa27x_resource_ssp3,
7838f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
7848f58de7cSeric miao };
7853f3acefbSGuennadi Liakhovetski 
78675540c1aSeric miao static struct resource pxa27x_resource_pwm0[] = {
78775540c1aSeric miao 	[0] = {
78875540c1aSeric miao 		.start	= 0x40b00000,
78975540c1aSeric miao 		.end	= 0x40b0001f,
79075540c1aSeric miao 		.flags	= IORESOURCE_MEM,
79175540c1aSeric miao 	},
79275540c1aSeric miao };
79375540c1aSeric miao 
79475540c1aSeric miao struct platform_device pxa27x_device_pwm0 = {
79575540c1aSeric miao 	.name		= "pxa27x-pwm",
79675540c1aSeric miao 	.id		= 0,
79775540c1aSeric miao 	.resource	= pxa27x_resource_pwm0,
79875540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
79975540c1aSeric miao };
80075540c1aSeric miao 
80175540c1aSeric miao static struct resource pxa27x_resource_pwm1[] = {
80275540c1aSeric miao 	[0] = {
80375540c1aSeric miao 		.start	= 0x40c00000,
80475540c1aSeric miao 		.end	= 0x40c0001f,
80575540c1aSeric miao 		.flags	= IORESOURCE_MEM,
80675540c1aSeric miao 	},
80775540c1aSeric miao };
80875540c1aSeric miao 
80975540c1aSeric miao struct platform_device pxa27x_device_pwm1 = {
81075540c1aSeric miao 	.name		= "pxa27x-pwm",
81175540c1aSeric miao 	.id		= 1,
81275540c1aSeric miao 	.resource	= pxa27x_resource_pwm1,
81375540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
81475540c1aSeric miao };
81549ea7fc0SHaojian Zhuang #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
8168f58de7cSeric miao 
8178f58de7cSeric miao #ifdef CONFIG_PXA3xx
8188d33b055SBridge Wu static struct resource pxa3xx_resources_mci2[] = {
8198d33b055SBridge Wu 	[0] = {
8208d33b055SBridge Wu 		.start	= 0x42000000,
8218d33b055SBridge Wu 		.end	= 0x42000fff,
8228d33b055SBridge Wu 		.flags	= IORESOURCE_MEM,
8238d33b055SBridge Wu 	},
8248d33b055SBridge Wu 	[1] = {
8258d33b055SBridge Wu 		.start	= IRQ_MMC2,
8268d33b055SBridge Wu 		.end	= IRQ_MMC2,
8278d33b055SBridge Wu 		.flags	= IORESOURCE_IRQ,
8288d33b055SBridge Wu 	},
8298d33b055SBridge Wu };
8308d33b055SBridge Wu 
8318d33b055SBridge Wu struct platform_device pxa3xx_device_mci2 = {
8328d33b055SBridge Wu 	.name		= "pxa2xx-mci",
8338d33b055SBridge Wu 	.id		= 1,
8348d33b055SBridge Wu 	.dev		= {
8358d33b055SBridge Wu 		.dma_mask = &pxamci_dmamask,
8368d33b055SBridge Wu 		.coherent_dma_mask =	0xffffffff,
8378d33b055SBridge Wu 	},
8388d33b055SBridge Wu 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
8398d33b055SBridge Wu 	.resource	= pxa3xx_resources_mci2,
8408d33b055SBridge Wu };
8418d33b055SBridge Wu 
8428d33b055SBridge Wu void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
8438d33b055SBridge Wu {
8448d33b055SBridge Wu 	pxa_register_device(&pxa3xx_device_mci2, info);
8458d33b055SBridge Wu }
8468d33b055SBridge Wu 
8475a1f21b1SBridge Wu static struct resource pxa3xx_resources_mci3[] = {
8485a1f21b1SBridge Wu 	[0] = {
8495a1f21b1SBridge Wu 		.start	= 0x42500000,
8505a1f21b1SBridge Wu 		.end	= 0x42500fff,
8515a1f21b1SBridge Wu 		.flags	= IORESOURCE_MEM,
8525a1f21b1SBridge Wu 	},
8535a1f21b1SBridge Wu 	[1] = {
8545a1f21b1SBridge Wu 		.start	= IRQ_MMC3,
8555a1f21b1SBridge Wu 		.end	= IRQ_MMC3,
8565a1f21b1SBridge Wu 		.flags	= IORESOURCE_IRQ,
8575a1f21b1SBridge Wu 	},
8585a1f21b1SBridge Wu };
8595a1f21b1SBridge Wu 
8605a1f21b1SBridge Wu struct platform_device pxa3xx_device_mci3 = {
8615a1f21b1SBridge Wu 	.name		= "pxa2xx-mci",
8625a1f21b1SBridge Wu 	.id		= 2,
8635a1f21b1SBridge Wu 	.dev		= {
8645a1f21b1SBridge Wu 		.dma_mask = &pxamci_dmamask,
8655a1f21b1SBridge Wu 		.coherent_dma_mask = 0xffffffff,
8665a1f21b1SBridge Wu 	},
8675a1f21b1SBridge Wu 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
8685a1f21b1SBridge Wu 	.resource	= pxa3xx_resources_mci3,
8695a1f21b1SBridge Wu };
8705a1f21b1SBridge Wu 
8715a1f21b1SBridge Wu void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
8725a1f21b1SBridge Wu {
8735a1f21b1SBridge Wu 	pxa_register_device(&pxa3xx_device_mci3, info);
8745a1f21b1SBridge Wu }
8755a1f21b1SBridge Wu 
876a4553358SHaojian Zhuang static struct resource pxa3xx_resources_gcu[] = {
877a4553358SHaojian Zhuang 	{
878a4553358SHaojian Zhuang 		.start	= 0x54000000,
879a4553358SHaojian Zhuang 		.end	= 0x54000fff,
880a4553358SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
881a4553358SHaojian Zhuang 	},
882a4553358SHaojian Zhuang 	{
883a4553358SHaojian Zhuang 		.start	= IRQ_GCU,
884a4553358SHaojian Zhuang 		.end	= IRQ_GCU,
885a4553358SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
886a4553358SHaojian Zhuang 	},
887a4553358SHaojian Zhuang };
888a4553358SHaojian Zhuang 
889a4553358SHaojian Zhuang static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
890a4553358SHaojian Zhuang 
891a4553358SHaojian Zhuang struct platform_device pxa3xx_device_gcu = {
892a4553358SHaojian Zhuang 	.name		= "pxa3xx-gcu",
893a4553358SHaojian Zhuang 	.id		= -1,
894a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
895a4553358SHaojian Zhuang 	.resource	= pxa3xx_resources_gcu,
896a4553358SHaojian Zhuang 	.dev		= {
897a4553358SHaojian Zhuang 		.dma_mask = &pxa3xx_gcu_dmamask,
898a4553358SHaojian Zhuang 		.coherent_dma_mask = 0xffffffff,
899a4553358SHaojian Zhuang 	},
900a4553358SHaojian Zhuang };
901a4553358SHaojian Zhuang 
902a4553358SHaojian Zhuang #endif /* CONFIG_PXA3xx */
903a4553358SHaojian Zhuang 
90449ea7fc0SHaojian Zhuang #if defined(CONFIG_PXA3xx)
905a4553358SHaojian Zhuang static struct resource pxa3xx_resources_i2c_power[] = {
906a4553358SHaojian Zhuang 	{
907a4553358SHaojian Zhuang 		.start  = 0x40f500c0,
908a4553358SHaojian Zhuang 		.end    = 0x40f500d3,
909a4553358SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
910a4553358SHaojian Zhuang 	}, {
911a4553358SHaojian Zhuang 		.start	= IRQ_PWRI2C,
912a4553358SHaojian Zhuang 		.end	= IRQ_PWRI2C,
913a4553358SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
914a4553358SHaojian Zhuang 	},
915a4553358SHaojian Zhuang };
916a4553358SHaojian Zhuang 
917a4553358SHaojian Zhuang struct platform_device pxa3xx_device_i2c_power = {
918a4553358SHaojian Zhuang 	.name		= "pxa3xx-pwri2c",
919a4553358SHaojian Zhuang 	.id		= 1,
920a4553358SHaojian Zhuang 	.resource	= pxa3xx_resources_i2c_power,
921a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
922a4553358SHaojian Zhuang };
923a4553358SHaojian Zhuang 
9249ae819a8SEric Miao static struct resource pxa3xx_resources_nand[] = {
9259ae819a8SEric Miao 	[0] = {
9269ae819a8SEric Miao 		.start	= 0x43100000,
9279ae819a8SEric Miao 		.end	= 0x43100053,
9289ae819a8SEric Miao 		.flags	= IORESOURCE_MEM,
9299ae819a8SEric Miao 	},
9309ae819a8SEric Miao 	[1] = {
9319ae819a8SEric Miao 		.start	= IRQ_NAND,
9329ae819a8SEric Miao 		.end	= IRQ_NAND,
9339ae819a8SEric Miao 		.flags	= IORESOURCE_IRQ,
9349ae819a8SEric Miao 	},
9359ae819a8SEric Miao };
9369ae819a8SEric Miao 
9379ae819a8SEric Miao static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
9389ae819a8SEric Miao 
9399ae819a8SEric Miao struct platform_device pxa3xx_device_nand = {
9409ae819a8SEric Miao 	.name		= "pxa3xx-nand",
9419ae819a8SEric Miao 	.id		= -1,
9429ae819a8SEric Miao 	.dev		= {
9439ae819a8SEric Miao 		.dma_mask = &pxa3xx_nand_dma_mask,
9449ae819a8SEric Miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
9459ae819a8SEric Miao 	},
9469ae819a8SEric Miao 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
9479ae819a8SEric Miao 	.resource	= pxa3xx_resources_nand,
9489ae819a8SEric Miao };
9499ae819a8SEric Miao 
9509ae819a8SEric Miao void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
9519ae819a8SEric Miao {
9529ae819a8SEric Miao 	pxa_register_device(&pxa3xx_device_nand, info);
9539ae819a8SEric Miao }
9541ff2c33eSDaniel Mack 
955a4553358SHaojian Zhuang static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
956a4553358SHaojian Zhuang 
957a4553358SHaojian Zhuang static struct resource pxa3xx_resource_ssp4[] = {
958a4553358SHaojian Zhuang 	[0] = {
959a4553358SHaojian Zhuang 		.start	= 0x41a00000,
960a4553358SHaojian Zhuang 		.end	= 0x41a0003f,
9611ff2c33eSDaniel Mack 		.flags	= IORESOURCE_MEM,
9621ff2c33eSDaniel Mack 	},
963a4553358SHaojian Zhuang 	[1] = {
964a4553358SHaojian Zhuang 		.start	= IRQ_SSP4,
965a4553358SHaojian Zhuang 		.end	= IRQ_SSP4,
9661ff2c33eSDaniel Mack 		.flags	= IORESOURCE_IRQ,
9671ff2c33eSDaniel Mack 	},
9681ff2c33eSDaniel Mack };
9691ff2c33eSDaniel Mack 
9700da0e227SDaniel Mack /*
9710da0e227SDaniel Mack  * PXA3xx SSP is basically equivalent to PXA27x.
9720da0e227SDaniel Mack  * However, we need to register the device by the correct name in order to
9730da0e227SDaniel Mack  * make the driver set the correct internal type, hence we provide specific
9740da0e227SDaniel Mack  * platform_devices for each of them.
9750da0e227SDaniel Mack  */
9760da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp1 = {
9770da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
9780da0e227SDaniel Mack 	.id		= 0,
9790da0e227SDaniel Mack 	.dev		= {
9800da0e227SDaniel Mack 		.dma_mask = &pxa27x_ssp1_dma_mask,
9810da0e227SDaniel Mack 		.coherent_dma_mask = DMA_BIT_MASK(32),
9820da0e227SDaniel Mack 	},
9830da0e227SDaniel Mack 	.resource	= pxa27x_resource_ssp1,
9840da0e227SDaniel Mack 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
9850da0e227SDaniel Mack };
9860da0e227SDaniel Mack 
9870da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp2 = {
9880da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
9890da0e227SDaniel Mack 	.id		= 1,
9900da0e227SDaniel Mack 	.dev		= {
9910da0e227SDaniel Mack 		.dma_mask = &pxa27x_ssp2_dma_mask,
9920da0e227SDaniel Mack 		.coherent_dma_mask = DMA_BIT_MASK(32),
9930da0e227SDaniel Mack 	},
9940da0e227SDaniel Mack 	.resource	= pxa27x_resource_ssp2,
9950da0e227SDaniel Mack 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
9960da0e227SDaniel Mack };
9970da0e227SDaniel Mack 
9980da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp3 = {
9990da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
10000da0e227SDaniel Mack 	.id		= 2,
10010da0e227SDaniel Mack 	.dev		= {
10020da0e227SDaniel Mack 		.dma_mask = &pxa27x_ssp3_dma_mask,
10030da0e227SDaniel Mack 		.coherent_dma_mask = DMA_BIT_MASK(32),
10040da0e227SDaniel Mack 	},
10050da0e227SDaniel Mack 	.resource	= pxa27x_resource_ssp3,
10060da0e227SDaniel Mack 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
10070da0e227SDaniel Mack };
10080da0e227SDaniel Mack 
1009a4553358SHaojian Zhuang struct platform_device pxa3xx_device_ssp4 = {
10100da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
1011a4553358SHaojian Zhuang 	.id		= 3,
1012a4553358SHaojian Zhuang 	.dev		= {
1013a4553358SHaojian Zhuang 		.dma_mask = &pxa3xx_ssp4_dma_mask,
1014a4553358SHaojian Zhuang 		.coherent_dma_mask = DMA_BIT_MASK(32),
1015a4553358SHaojian Zhuang 	},
1016a4553358SHaojian Zhuang 	.resource	= pxa3xx_resource_ssp4,
1017a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1018a4553358SHaojian Zhuang };
101949ea7fc0SHaojian Zhuang #endif /* CONFIG_PXA3xx */
1020e172274cSGuennadi Liakhovetski 
1021157d2644SHaojian Zhuang struct resource pxa_resource_gpio[] = {
1022157d2644SHaojian Zhuang 	{
1023157d2644SHaojian Zhuang 		.start	= 0x40e00000,
1024157d2644SHaojian Zhuang 		.end	= 0x40e0ffff,
1025157d2644SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
1026157d2644SHaojian Zhuang 	}, {
1027157d2644SHaojian Zhuang 		.start	= IRQ_GPIO0,
1028157d2644SHaojian Zhuang 		.end	= IRQ_GPIO0,
1029157d2644SHaojian Zhuang 		.name	= "gpio0",
1030157d2644SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
1031157d2644SHaojian Zhuang 	}, {
1032157d2644SHaojian Zhuang 		.start	= IRQ_GPIO1,
1033157d2644SHaojian Zhuang 		.end	= IRQ_GPIO1,
1034157d2644SHaojian Zhuang 		.name	= "gpio1",
1035157d2644SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
1036157d2644SHaojian Zhuang 	}, {
1037157d2644SHaojian Zhuang 		.start	= IRQ_GPIO_2_x,
1038157d2644SHaojian Zhuang 		.end	= IRQ_GPIO_2_x,
1039157d2644SHaojian Zhuang 		.name	= "gpio_mux",
1040157d2644SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
1041157d2644SHaojian Zhuang 	},
1042157d2644SHaojian Zhuang };
1043157d2644SHaojian Zhuang 
10442cab0292SHaojian Zhuang struct platform_device pxa25x_device_gpio = {
10452cab0292SHaojian Zhuang #ifdef CONFIG_CPU_PXA26x
10462cab0292SHaojian Zhuang 	.name		= "pxa26x-gpio",
10472cab0292SHaojian Zhuang #else
10482cab0292SHaojian Zhuang 	.name		= "pxa25x-gpio",
10492cab0292SHaojian Zhuang #endif
10502cab0292SHaojian Zhuang 	.id		= -1,
10512cab0292SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
10522cab0292SHaojian Zhuang 	.resource	= pxa_resource_gpio,
10532cab0292SHaojian Zhuang };
10542cab0292SHaojian Zhuang 
10552cab0292SHaojian Zhuang struct platform_device pxa27x_device_gpio = {
10562cab0292SHaojian Zhuang 	.name		= "pxa27x-gpio",
10572cab0292SHaojian Zhuang 	.id		= -1,
10582cab0292SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
10592cab0292SHaojian Zhuang 	.resource	= pxa_resource_gpio,
10602cab0292SHaojian Zhuang };
10612cab0292SHaojian Zhuang 
10622cab0292SHaojian Zhuang struct platform_device pxa3xx_device_gpio = {
10632cab0292SHaojian Zhuang 	.name		= "pxa3xx-gpio",
10642cab0292SHaojian Zhuang 	.id		= -1,
10652cab0292SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
10662cab0292SHaojian Zhuang 	.resource	= pxa_resource_gpio,
10672cab0292SHaojian Zhuang };
10682cab0292SHaojian Zhuang 
10692cab0292SHaojian Zhuang struct platform_device pxa93x_device_gpio = {
10702cab0292SHaojian Zhuang 	.name		= "pxa93x-gpio",
1071157d2644SHaojian Zhuang 	.id		= -1,
1072157d2644SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1073157d2644SHaojian Zhuang 	.resource	= pxa_resource_gpio,
1074157d2644SHaojian Zhuang };
1075157d2644SHaojian Zhuang 
1076e172274cSGuennadi Liakhovetski /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1077e172274cSGuennadi Liakhovetski  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
107851eea52dSLubomir Rintel void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)
1079e172274cSGuennadi Liakhovetski {
1080e172274cSGuennadi Liakhovetski 	struct platform_device *pd;
1081e172274cSGuennadi Liakhovetski 
1082e172274cSGuennadi Liakhovetski 	pd = platform_device_alloc("pxa2xx-spi", id);
1083e172274cSGuennadi Liakhovetski 	if (pd == NULL) {
1084e172274cSGuennadi Liakhovetski 		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1085e172274cSGuennadi Liakhovetski 		       id);
1086e172274cSGuennadi Liakhovetski 		return;
1087e172274cSGuennadi Liakhovetski 	}
1088e172274cSGuennadi Liakhovetski 
1089e172274cSGuennadi Liakhovetski 	pd->dev.platform_data = info;
1090e172274cSGuennadi Liakhovetski 	platform_device_add(pd);
1091e172274cSGuennadi Liakhovetski }
10924be0856fSRobert Jarzmik 
10934be0856fSRobert Jarzmik static struct resource pxa_dma_resource[] = {
10944be0856fSRobert Jarzmik 	[0] = {
10954be0856fSRobert Jarzmik 		.start	= 0x40000000,
10964be0856fSRobert Jarzmik 		.end	= 0x4000ffff,
10974be0856fSRobert Jarzmik 		.flags	= IORESOURCE_MEM,
10984be0856fSRobert Jarzmik 	},
10994be0856fSRobert Jarzmik 	[1] = {
11004be0856fSRobert Jarzmik 		.start	= IRQ_DMA,
11014be0856fSRobert Jarzmik 		.end	= IRQ_DMA,
11024be0856fSRobert Jarzmik 		.flags	= IORESOURCE_IRQ,
11034be0856fSRobert Jarzmik 	},
11044be0856fSRobert Jarzmik };
11054be0856fSRobert Jarzmik 
11064be0856fSRobert Jarzmik static u64 pxadma_dmamask = 0xffffffffUL;
11074be0856fSRobert Jarzmik 
11084be0856fSRobert Jarzmik static struct platform_device pxa2xx_pxa_dma = {
11094be0856fSRobert Jarzmik 	.name		= "pxa-dma",
11104be0856fSRobert Jarzmik 	.id		= 0,
11114be0856fSRobert Jarzmik 	.dev		= {
11124be0856fSRobert Jarzmik 		.dma_mask = &pxadma_dmamask,
11134be0856fSRobert Jarzmik 		.coherent_dma_mask = 0xffffffff,
11144be0856fSRobert Jarzmik 	},
11154be0856fSRobert Jarzmik 	.num_resources	= ARRAY_SIZE(pxa_dma_resource),
11164be0856fSRobert Jarzmik 	.resource	= pxa_dma_resource,
11174be0856fSRobert Jarzmik };
11184be0856fSRobert Jarzmik 
11191da10c17SRobert Jarzmik void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
11204be0856fSRobert Jarzmik {
11211da10c17SRobert Jarzmik 	pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
11224be0856fSRobert Jarzmik }
1123e86bd43bSArnd Bergmann 
1124e86bd43bSArnd Bergmann void __init pxa_register_wdt(unsigned int reset_status)
1125e86bd43bSArnd Bergmann {
1126e86bd43bSArnd Bergmann 	struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
1127e86bd43bSArnd Bergmann 
1128e86bd43bSArnd Bergmann 	reset_status &= RESET_STATUS_WATCHDOG;
1129e86bd43bSArnd Bergmann 	platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
1130e86bd43bSArnd Bergmann 					  &reset_status, sizeof(reset_status));
1131e86bd43bSArnd Bergmann }
1132