xref: /linux/arch/arm/mach-pxa/devices.c (revision a52e17361987782ecea7cc6ed0dc1f37a11949a8)
1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
28f58de7cSeric miao #include <linux/module.h>
38f58de7cSeric miao #include <linux/kernel.h>
48f58de7cSeric miao #include <linux/init.h>
58f58de7cSeric miao #include <linux/platform_device.h>
622abc0d2SRobert Jarzmik #include <linux/clkdev.h>
7*a52e1736SEzequiel Garcia #include <linux/clk-provider.h>
88f58de7cSeric miao #include <linux/dma-mapping.h>
91da10c17SRobert Jarzmik #include <linux/dmaengine.h>
108348c259SSebastian Andrzej Siewior #include <linux/spi/pxa2xx_spi.h>
11f15fc9b1SWolfram Sang #include <linux/platform_data/i2c-pxa.h>
128f58de7cSeric miao 
134c25c5d2SArnd Bergmann #include "udc.h"
14293b2da1SArnd Bergmann #include <linux/platform_data/usb-pxa3xx-ulpi.h>
15293b2da1SArnd Bergmann #include <linux/platform_data/video-pxafb.h>
16293b2da1SArnd Bergmann #include <linux/platform_data/mmc-pxamci.h>
17293b2da1SArnd Bergmann #include <linux/platform_data/irda-pxaficp.h>
184e611091SRob Herring #include <mach/irqs.h>
19293b2da1SArnd Bergmann #include <linux/platform_data/usb-ohci-pxa27x.h>
20293b2da1SArnd Bergmann #include <linux/platform_data/keypad-pxa27x.h>
21a71daaa1SMauro Carvalho Chehab #include <linux/platform_data/media/camera-pxa.h>
22a09e64fbSRussell King #include <mach/audio.h>
2375e874c6SEric Miao #include <mach/hardware.h>
244be0856fSRobert Jarzmik #include <linux/platform_data/mmp_dma.h>
25293b2da1SArnd Bergmann #include <linux/platform_data/mtd-nand-pxa3xx.h>
268f58de7cSeric miao 
278f58de7cSeric miao #include "devices.h"
28bc3a5959SPhilipp Zabel #include "generic.h"
298f58de7cSeric miao 
308f58de7cSeric miao void __init pxa_register_device(struct platform_device *dev, void *data)
318f58de7cSeric miao {
328f58de7cSeric miao 	int ret;
338f58de7cSeric miao 
348f58de7cSeric miao 	dev->dev.platform_data = data;
358f58de7cSeric miao 
368f58de7cSeric miao 	ret = platform_device_register(dev);
378f58de7cSeric miao 	if (ret)
388f58de7cSeric miao 		dev_err(&dev->dev, "unable to register device: %d\n", ret);
398f58de7cSeric miao }
408f58de7cSeric miao 
4109a5358dSEric Miao static struct resource pxa_resource_pmu = {
4209a5358dSEric Miao 	.start	= IRQ_PMU,
4309a5358dSEric Miao 	.end	= IRQ_PMU,
4409a5358dSEric Miao 	.flags	= IORESOURCE_IRQ,
4509a5358dSEric Miao };
4609a5358dSEric Miao 
4709a5358dSEric Miao struct platform_device pxa_device_pmu = {
48f9eff219SMark Rutland 	.name		= "xscale-pmu",
49df3d17e0SSudeep KarkadaNagesha 	.id		= -1,
5009a5358dSEric Miao 	.resource	= &pxa_resource_pmu,
5109a5358dSEric Miao 	.num_resources	= 1,
5209a5358dSEric Miao };
5309a5358dSEric Miao 
548f58de7cSeric miao static struct resource pxamci_resources[] = {
558f58de7cSeric miao 	[0] = {
568f58de7cSeric miao 		.start	= 0x41100000,
578f58de7cSeric miao 		.end	= 0x41100fff,
588f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
598f58de7cSeric miao 	},
608f58de7cSeric miao 	[1] = {
618f58de7cSeric miao 		.start	= IRQ_MMC,
628f58de7cSeric miao 		.end	= IRQ_MMC,
638f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
648f58de7cSeric miao 	},
658f58de7cSeric miao };
668f58de7cSeric miao 
678f58de7cSeric miao static u64 pxamci_dmamask = 0xffffffffUL;
688f58de7cSeric miao 
698f58de7cSeric miao struct platform_device pxa_device_mci = {
708f58de7cSeric miao 	.name		= "pxa2xx-mci",
71fafc9d3fSBridge Wu 	.id		= 0,
728f58de7cSeric miao 	.dev		= {
738f58de7cSeric miao 		.dma_mask = &pxamci_dmamask,
748f58de7cSeric miao 		.coherent_dma_mask = 0xffffffff,
758f58de7cSeric miao 	},
768f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxamci_resources),
778f58de7cSeric miao 	.resource	= pxamci_resources,
788f58de7cSeric miao };
798f58de7cSeric miao 
808f58de7cSeric miao void __init pxa_set_mci_info(struct pxamci_platform_data *info)
818f58de7cSeric miao {
828f58de7cSeric miao 	pxa_register_device(&pxa_device_mci, info);
838f58de7cSeric miao }
848f58de7cSeric miao 
858f58de7cSeric miao 
861257629bSPhilipp Zabel static struct pxa2xx_udc_mach_info pxa_udc_info = {
871257629bSPhilipp Zabel 	.gpio_pullup = -1,
881257629bSPhilipp Zabel };
898f58de7cSeric miao 
908f58de7cSeric miao void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
918f58de7cSeric miao {
928f58de7cSeric miao 	memcpy(&pxa_udc_info, info, sizeof *info);
938f58de7cSeric miao }
948f58de7cSeric miao 
958f58de7cSeric miao static struct resource pxa2xx_udc_resources[] = {
968f58de7cSeric miao 	[0] = {
978f58de7cSeric miao 		.start	= 0x40600000,
988f58de7cSeric miao 		.end	= 0x4060ffff,
998f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
1008f58de7cSeric miao 	},
1018f58de7cSeric miao 	[1] = {
1028f58de7cSeric miao 		.start	= IRQ_USB,
1038f58de7cSeric miao 		.end	= IRQ_USB,
1048f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
1058f58de7cSeric miao 	},
1068f58de7cSeric miao };
1078f58de7cSeric miao 
1088f58de7cSeric miao static u64 udc_dma_mask = ~(u32)0;
1098f58de7cSeric miao 
1107a857620SPhilipp Zabel struct platform_device pxa25x_device_udc = {
1117a857620SPhilipp Zabel 	.name		= "pxa25x-udc",
1127a857620SPhilipp Zabel 	.id		= -1,
1137a857620SPhilipp Zabel 	.resource	= pxa2xx_udc_resources,
1147a857620SPhilipp Zabel 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
1157a857620SPhilipp Zabel 	.dev		=  {
1167a857620SPhilipp Zabel 		.platform_data	= &pxa_udc_info,
1177a857620SPhilipp Zabel 		.dma_mask	= &udc_dma_mask,
1187a857620SPhilipp Zabel 	}
1197a857620SPhilipp Zabel };
1207a857620SPhilipp Zabel 
1217a857620SPhilipp Zabel struct platform_device pxa27x_device_udc = {
1227a857620SPhilipp Zabel 	.name		= "pxa27x-udc",
1238f58de7cSeric miao 	.id		= -1,
1248f58de7cSeric miao 	.resource	= pxa2xx_udc_resources,
1258f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
1268f58de7cSeric miao 	.dev		=  {
1278f58de7cSeric miao 		.platform_data	= &pxa_udc_info,
1288f58de7cSeric miao 		.dma_mask	= &udc_dma_mask,
1298f58de7cSeric miao 	}
1308f58de7cSeric miao };
1318f58de7cSeric miao 
13269f22be7SIgor Grinberg #ifdef CONFIG_PXA3xx
13369f22be7SIgor Grinberg static struct resource pxa3xx_u2d_resources[] = {
13469f22be7SIgor Grinberg 	[0] = {
13569f22be7SIgor Grinberg 		.start	= 0x54100000,
13669f22be7SIgor Grinberg 		.end	= 0x54100fff,
13769f22be7SIgor Grinberg 		.flags	= IORESOURCE_MEM,
13869f22be7SIgor Grinberg 	},
13969f22be7SIgor Grinberg 	[1] = {
14069f22be7SIgor Grinberg 		.start	= IRQ_USB2,
14169f22be7SIgor Grinberg 		.end	= IRQ_USB2,
14269f22be7SIgor Grinberg 		.flags	= IORESOURCE_IRQ,
14369f22be7SIgor Grinberg 	},
14469f22be7SIgor Grinberg };
14569f22be7SIgor Grinberg 
14669f22be7SIgor Grinberg struct platform_device pxa3xx_device_u2d = {
14769f22be7SIgor Grinberg 	.name		= "pxa3xx-u2d",
14869f22be7SIgor Grinberg 	.id		= -1,
14969f22be7SIgor Grinberg 	.resource	= pxa3xx_u2d_resources,
15069f22be7SIgor Grinberg 	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
15169f22be7SIgor Grinberg };
15269f22be7SIgor Grinberg 
15369f22be7SIgor Grinberg void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
15469f22be7SIgor Grinberg {
15569f22be7SIgor Grinberg 	pxa_register_device(&pxa3xx_device_u2d, info);
15669f22be7SIgor Grinberg }
15769f22be7SIgor Grinberg #endif /* CONFIG_PXA3xx */
15869f22be7SIgor Grinberg 
1598f58de7cSeric miao static struct resource pxafb_resources[] = {
1608f58de7cSeric miao 	[0] = {
1618f58de7cSeric miao 		.start	= 0x44000000,
1628f58de7cSeric miao 		.end	= 0x4400ffff,
1638f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
1648f58de7cSeric miao 	},
1658f58de7cSeric miao 	[1] = {
1668f58de7cSeric miao 		.start	= IRQ_LCD,
1678f58de7cSeric miao 		.end	= IRQ_LCD,
1688f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
1698f58de7cSeric miao 	},
1708f58de7cSeric miao };
1718f58de7cSeric miao 
1728f58de7cSeric miao static u64 fb_dma_mask = ~(u64)0;
1738f58de7cSeric miao 
1748f58de7cSeric miao struct platform_device pxa_device_fb = {
1758f58de7cSeric miao 	.name		= "pxa2xx-fb",
1768f58de7cSeric miao 	.id		= -1,
1778f58de7cSeric miao 	.dev		= {
1788f58de7cSeric miao 		.dma_mask	= &fb_dma_mask,
1798f58de7cSeric miao 		.coherent_dma_mask = 0xffffffff,
1808f58de7cSeric miao 	},
1818f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxafb_resources),
1828f58de7cSeric miao 	.resource	= pxafb_resources,
1838f58de7cSeric miao };
1848f58de7cSeric miao 
1854321e1a1SRussell King - ARM Linux void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
1868f58de7cSeric miao {
1874321e1a1SRussell King - ARM Linux 	pxa_device_fb.dev.parent = parent;
1888f58de7cSeric miao 	pxa_register_device(&pxa_device_fb, info);
1898f58de7cSeric miao }
1908f58de7cSeric miao 
1918f58de7cSeric miao static struct resource pxa_resource_ffuart[] = {
1928f58de7cSeric miao 	{
19302f65262SEric Miao 		.start	= 0x40100000,
19402f65262SEric Miao 		.end	= 0x40100023,
1958f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
1968f58de7cSeric miao 	}, {
1978f58de7cSeric miao 		.start	= IRQ_FFUART,
1988f58de7cSeric miao 		.end	= IRQ_FFUART,
1998f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2008f58de7cSeric miao 	}
2018f58de7cSeric miao };
2028f58de7cSeric miao 
2038f58de7cSeric miao struct platform_device pxa_device_ffuart = {
2048f58de7cSeric miao 	.name		= "pxa2xx-uart",
2058f58de7cSeric miao 	.id		= 0,
2068f58de7cSeric miao 	.resource	= pxa_resource_ffuart,
2078f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
2088f58de7cSeric miao };
2098f58de7cSeric miao 
210cc155c6fSRussell King void __init pxa_set_ffuart_info(void *info)
211cc155c6fSRussell King {
212cc155c6fSRussell King 	pxa_register_device(&pxa_device_ffuart, info);
213cc155c6fSRussell King }
214cc155c6fSRussell King 
2158f58de7cSeric miao static struct resource pxa_resource_btuart[] = {
2168f58de7cSeric miao 	{
21702f65262SEric Miao 		.start	= 0x40200000,
21802f65262SEric Miao 		.end	= 0x40200023,
2198f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2208f58de7cSeric miao 	}, {
2218f58de7cSeric miao 		.start	= IRQ_BTUART,
2228f58de7cSeric miao 		.end	= IRQ_BTUART,
2238f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2248f58de7cSeric miao 	}
2258f58de7cSeric miao };
2268f58de7cSeric miao 
2278f58de7cSeric miao struct platform_device pxa_device_btuart = {
2288f58de7cSeric miao 	.name		= "pxa2xx-uart",
2298f58de7cSeric miao 	.id		= 1,
2308f58de7cSeric miao 	.resource	= pxa_resource_btuart,
2318f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
2328f58de7cSeric miao };
2338f58de7cSeric miao 
234cc155c6fSRussell King void __init pxa_set_btuart_info(void *info)
235cc155c6fSRussell King {
236cc155c6fSRussell King 	pxa_register_device(&pxa_device_btuart, info);
237cc155c6fSRussell King }
238cc155c6fSRussell King 
2398f58de7cSeric miao static struct resource pxa_resource_stuart[] = {
2408f58de7cSeric miao 	{
24102f65262SEric Miao 		.start	= 0x40700000,
24202f65262SEric Miao 		.end	= 0x40700023,
2438f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2448f58de7cSeric miao 	}, {
2458f58de7cSeric miao 		.start	= IRQ_STUART,
2468f58de7cSeric miao 		.end	= IRQ_STUART,
2478f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2488f58de7cSeric miao 	}
2498f58de7cSeric miao };
2508f58de7cSeric miao 
2518f58de7cSeric miao struct platform_device pxa_device_stuart = {
2528f58de7cSeric miao 	.name		= "pxa2xx-uart",
2538f58de7cSeric miao 	.id		= 2,
2548f58de7cSeric miao 	.resource	= pxa_resource_stuart,
2558f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
2568f58de7cSeric miao };
2578f58de7cSeric miao 
258cc155c6fSRussell King void __init pxa_set_stuart_info(void *info)
259cc155c6fSRussell King {
260cc155c6fSRussell King 	pxa_register_device(&pxa_device_stuart, info);
261cc155c6fSRussell King }
262cc155c6fSRussell King 
2638f58de7cSeric miao static struct resource pxa_resource_hwuart[] = {
2648f58de7cSeric miao 	{
26502f65262SEric Miao 		.start	= 0x41600000,
26602f65262SEric Miao 		.end	= 0x4160002F,
2678f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2688f58de7cSeric miao 	}, {
2698f58de7cSeric miao 		.start	= IRQ_HWUART,
2708f58de7cSeric miao 		.end	= IRQ_HWUART,
2718f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2728f58de7cSeric miao 	}
2738f58de7cSeric miao };
2748f58de7cSeric miao 
2758f58de7cSeric miao struct platform_device pxa_device_hwuart = {
2768f58de7cSeric miao 	.name		= "pxa2xx-uart",
2778f58de7cSeric miao 	.id		= 3,
2788f58de7cSeric miao 	.resource	= pxa_resource_hwuart,
2798f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
2808f58de7cSeric miao };
2818f58de7cSeric miao 
282cc155c6fSRussell King void __init pxa_set_hwuart_info(void *info)
283cc155c6fSRussell King {
284cc155c6fSRussell King 	if (cpu_is_pxa255())
285cc155c6fSRussell King 		pxa_register_device(&pxa_device_hwuart, info);
286cc155c6fSRussell King 	else
287cc155c6fSRussell King 		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
288cc155c6fSRussell King }
289cc155c6fSRussell King 
2908f58de7cSeric miao static struct resource pxai2c_resources[] = {
2918f58de7cSeric miao 	{
2928f58de7cSeric miao 		.start	= 0x40301680,
2938f58de7cSeric miao 		.end	= 0x403016a3,
2948f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
2958f58de7cSeric miao 	}, {
2968f58de7cSeric miao 		.start	= IRQ_I2C,
2978f58de7cSeric miao 		.end	= IRQ_I2C,
2988f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
2998f58de7cSeric miao 	},
3008f58de7cSeric miao };
3018f58de7cSeric miao 
3028f58de7cSeric miao struct platform_device pxa_device_i2c = {
3038f58de7cSeric miao 	.name		= "pxa2xx-i2c",
3048f58de7cSeric miao 	.id		= 0,
3058f58de7cSeric miao 	.resource	= pxai2c_resources,
3068f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxai2c_resources),
3078f58de7cSeric miao };
3088f58de7cSeric miao 
3098f58de7cSeric miao void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
3108f58de7cSeric miao {
3118f58de7cSeric miao 	pxa_register_device(&pxa_device_i2c, info);
3128f58de7cSeric miao }
3138f58de7cSeric miao 
31499464293SEric Miao #ifdef CONFIG_PXA27x
31599464293SEric Miao static struct resource pxa27x_resources_i2c_power[] = {
31699464293SEric Miao 	{
31799464293SEric Miao 		.start	= 0x40f00180,
31899464293SEric Miao 		.end	= 0x40f001a3,
31999464293SEric Miao 		.flags	= IORESOURCE_MEM,
32099464293SEric Miao 	}, {
32199464293SEric Miao 		.start	= IRQ_PWRI2C,
32299464293SEric Miao 		.end	= IRQ_PWRI2C,
32399464293SEric Miao 		.flags	= IORESOURCE_IRQ,
32499464293SEric Miao 	},
32599464293SEric Miao };
32699464293SEric Miao 
32799464293SEric Miao struct platform_device pxa27x_device_i2c_power = {
32899464293SEric Miao 	.name		= "pxa2xx-i2c",
32999464293SEric Miao 	.id		= 1,
33099464293SEric Miao 	.resource	= pxa27x_resources_i2c_power,
33199464293SEric Miao 	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
33299464293SEric Miao };
33399464293SEric Miao #endif
33499464293SEric Miao 
3358f58de7cSeric miao static struct resource pxai2s_resources[] = {
3368f58de7cSeric miao 	{
3378f58de7cSeric miao 		.start	= 0x40400000,
3388f58de7cSeric miao 		.end	= 0x40400083,
3398f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
3408f58de7cSeric miao 	}, {
3418f58de7cSeric miao 		.start	= IRQ_I2S,
3428f58de7cSeric miao 		.end	= IRQ_I2S,
3438f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
3448f58de7cSeric miao 	},
3458f58de7cSeric miao };
3468f58de7cSeric miao 
3478f58de7cSeric miao struct platform_device pxa_device_i2s = {
3488f58de7cSeric miao 	.name		= "pxa2xx-i2s",
3498f58de7cSeric miao 	.id		= -1,
3508f58de7cSeric miao 	.resource	= pxai2s_resources,
3518f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxai2s_resources),
3528f58de7cSeric miao };
3538f58de7cSeric miao 
354f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp1 = {
355f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
356f0fba2adSLiam Girdwood 	.id		= 0,
357f0fba2adSLiam Girdwood };
358f0fba2adSLiam Girdwood 
359f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp2= {
360f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
361f0fba2adSLiam Girdwood 	.id		= 1,
362f0fba2adSLiam Girdwood };
363f0fba2adSLiam Girdwood 
364f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp3 = {
365f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
366f0fba2adSLiam Girdwood 	.id		= 2,
367f0fba2adSLiam Girdwood };
368f0fba2adSLiam Girdwood 
369f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp4 = {
370f0fba2adSLiam Girdwood 	.name		= "pxa-ssp-dai",
371f0fba2adSLiam Girdwood 	.id		= 3,
372f0fba2adSLiam Girdwood };
373f0fba2adSLiam Girdwood 
374f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_platform = {
375f0fba2adSLiam Girdwood 	.name		= "pxa-pcm-audio",
376f0fba2adSLiam Girdwood 	.id		= -1,
377f0fba2adSLiam Girdwood };
378f0fba2adSLiam Girdwood 
3798f58de7cSeric miao static u64 pxaficp_dmamask = ~(u32)0;
3808f58de7cSeric miao 
381121f3f9bSRob Herring static struct resource pxa_ir_resources[] = {
382121f3f9bSRob Herring 	[0] = {
383121f3f9bSRob Herring 		.start  = IRQ_STUART,
384121f3f9bSRob Herring 		.end    = IRQ_STUART,
385121f3f9bSRob Herring 		.flags  = IORESOURCE_IRQ,
386121f3f9bSRob Herring 	},
387121f3f9bSRob Herring 	[1] = {
388121f3f9bSRob Herring 		.start  = IRQ_ICP,
389121f3f9bSRob Herring 		.end    = IRQ_ICP,
390121f3f9bSRob Herring 		.flags  = IORESOURCE_IRQ,
391121f3f9bSRob Herring 	},
39248a629daSRobert Jarzmik 	[3] = {
39348a629daSRobert Jarzmik 		.start  = 0x40800000,
39448a629daSRobert Jarzmik 		.end	= 0x4080001b,
39548a629daSRobert Jarzmik 		.flags  = IORESOURCE_MEM,
39648a629daSRobert Jarzmik 	},
39748a629daSRobert Jarzmik 	[4] = {
39848a629daSRobert Jarzmik 		.start  = 0x40700000,
39948a629daSRobert Jarzmik 		.end	= 0x40700023,
40048a629daSRobert Jarzmik 		.flags  = IORESOURCE_MEM,
40148a629daSRobert Jarzmik 	},
402121f3f9bSRob Herring };
403121f3f9bSRob Herring 
4048f58de7cSeric miao struct platform_device pxa_device_ficp = {
4058f58de7cSeric miao 	.name		= "pxa2xx-ir",
4068f58de7cSeric miao 	.id		= -1,
407121f3f9bSRob Herring 	.num_resources	= ARRAY_SIZE(pxa_ir_resources),
408121f3f9bSRob Herring 	.resource	= pxa_ir_resources,
4098f58de7cSeric miao 	.dev		= {
4108f58de7cSeric miao 		.dma_mask = &pxaficp_dmamask,
4118f58de7cSeric miao 		.coherent_dma_mask = 0xffffffff,
4128f58de7cSeric miao 	},
4138f58de7cSeric miao };
4148f58de7cSeric miao 
4158f58de7cSeric miao void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
4168f58de7cSeric miao {
4178f58de7cSeric miao 	pxa_register_device(&pxa_device_ficp, info);
4188f58de7cSeric miao }
4198f58de7cSeric miao 
42072493146SRobert Jarzmik static struct resource pxa_rtc_resources[] = {
42172493146SRobert Jarzmik 	[0] = {
42272493146SRobert Jarzmik 		.start  = 0x40900000,
42372493146SRobert Jarzmik 		.end	= 0x40900000 + 0x3b,
42472493146SRobert Jarzmik 		.flags  = IORESOURCE_MEM,
42572493146SRobert Jarzmik 	},
42672493146SRobert Jarzmik 	[1] = {
42772493146SRobert Jarzmik 		.start  = IRQ_RTC1Hz,
42872493146SRobert Jarzmik 		.end    = IRQ_RTC1Hz,
4293888c090SHaojian Zhuang 		.name	= "rtc 1Hz",
43072493146SRobert Jarzmik 		.flags  = IORESOURCE_IRQ,
43172493146SRobert Jarzmik 	},
43272493146SRobert Jarzmik 	[2] = {
43372493146SRobert Jarzmik 		.start  = IRQ_RTCAlrm,
43472493146SRobert Jarzmik 		.end    = IRQ_RTCAlrm,
4353888c090SHaojian Zhuang 		.name	= "rtc alarm",
43672493146SRobert Jarzmik 		.flags  = IORESOURCE_IRQ,
43772493146SRobert Jarzmik 	},
43872493146SRobert Jarzmik };
43972493146SRobert Jarzmik 
44072493146SRobert Jarzmik struct platform_device pxa_device_rtc = {
44172493146SRobert Jarzmik 	.name		= "pxa-rtc",
44272493146SRobert Jarzmik 	.id		= -1,
44372493146SRobert Jarzmik 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
44472493146SRobert Jarzmik 	.resource       = pxa_rtc_resources,
44572493146SRobert Jarzmik };
44672493146SRobert Jarzmik 
4473888c090SHaojian Zhuang struct platform_device sa1100_device_rtc = {
4483888c090SHaojian Zhuang 	.name		= "sa1100-rtc",
4493888c090SHaojian Zhuang 	.id		= -1,
4502c4fabecSRob Herring 	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
4512c4fabecSRob Herring 	.resource       = pxa_rtc_resources,
4523888c090SHaojian Zhuang };
4533888c090SHaojian Zhuang 
4549f19d638SMark Brown static struct resource pxa_ac97_resources[] = {
4559f19d638SMark Brown 	[0] = {
4569f19d638SMark Brown 		.start  = 0x40500000,
4579f19d638SMark Brown 		.end	= 0x40500000 + 0xfff,
4589f19d638SMark Brown 		.flags  = IORESOURCE_MEM,
4599f19d638SMark Brown 	},
4609f19d638SMark Brown 	[1] = {
4619f19d638SMark Brown 		.start  = IRQ_AC97,
4629f19d638SMark Brown 		.end    = IRQ_AC97,
4639f19d638SMark Brown 		.flags  = IORESOURCE_IRQ,
4649f19d638SMark Brown 	},
4659f19d638SMark Brown };
4669f19d638SMark Brown 
4679f19d638SMark Brown static u64 pxa_ac97_dmamask = 0xffffffffUL;
4689f19d638SMark Brown 
4699f19d638SMark Brown struct platform_device pxa_device_ac97 = {
4709f19d638SMark Brown 	.name           = "pxa2xx-ac97",
4719f19d638SMark Brown 	.id             = -1,
4729f19d638SMark Brown 	.dev            = {
4739f19d638SMark Brown 		.dma_mask = &pxa_ac97_dmamask,
4749f19d638SMark Brown 		.coherent_dma_mask = 0xffffffff,
4759f19d638SMark Brown 	},
4769f19d638SMark Brown 	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
4779f19d638SMark Brown 	.resource       = pxa_ac97_resources,
4789f19d638SMark Brown };
4799f19d638SMark Brown 
4809f19d638SMark Brown void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
4819f19d638SMark Brown {
48222abc0d2SRobert Jarzmik 	int ret;
48322abc0d2SRobert Jarzmik 
48422abc0d2SRobert Jarzmik 	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK",
48522abc0d2SRobert Jarzmik 			   &pxa_device_ac97.dev);
48622abc0d2SRobert Jarzmik 	if (ret)
48722abc0d2SRobert Jarzmik 		pr_err("PXA AC97 clock1 alias error: %d\n", ret);
48822abc0d2SRobert Jarzmik 
48922abc0d2SRobert Jarzmik 	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK",
49022abc0d2SRobert Jarzmik 			    &pxa_device_ac97.dev);
49122abc0d2SRobert Jarzmik 	if (ret)
49222abc0d2SRobert Jarzmik 		pr_err("PXA AC97 clock2 alias error: %d\n", ret);
49322abc0d2SRobert Jarzmik 
4949f19d638SMark Brown 	pxa_register_device(&pxa_device_ac97, ops);
4959f19d638SMark Brown }
4969f19d638SMark Brown 
4978f58de7cSeric miao #ifdef CONFIG_PXA25x
4988f58de7cSeric miao 
49975540c1aSeric miao static struct resource pxa25x_resource_pwm0[] = {
50075540c1aSeric miao 	[0] = {
50175540c1aSeric miao 		.start	= 0x40b00000,
50275540c1aSeric miao 		.end	= 0x40b0000f,
50375540c1aSeric miao 		.flags	= IORESOURCE_MEM,
50475540c1aSeric miao 	},
50575540c1aSeric miao };
50675540c1aSeric miao 
50775540c1aSeric miao struct platform_device pxa25x_device_pwm0 = {
50875540c1aSeric miao 	.name		= "pxa25x-pwm",
50975540c1aSeric miao 	.id		= 0,
51075540c1aSeric miao 	.resource	= pxa25x_resource_pwm0,
51175540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
51275540c1aSeric miao };
51375540c1aSeric miao 
51475540c1aSeric miao static struct resource pxa25x_resource_pwm1[] = {
51575540c1aSeric miao 	[0] = {
51675540c1aSeric miao 		.start	= 0x40c00000,
51775540c1aSeric miao 		.end	= 0x40c0000f,
51875540c1aSeric miao 		.flags	= IORESOURCE_MEM,
51975540c1aSeric miao 	},
52075540c1aSeric miao };
52175540c1aSeric miao 
52275540c1aSeric miao struct platform_device pxa25x_device_pwm1 = {
52375540c1aSeric miao 	.name		= "pxa25x-pwm",
52475540c1aSeric miao 	.id		= 1,
52575540c1aSeric miao 	.resource	= pxa25x_resource_pwm1,
52675540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
52775540c1aSeric miao };
52875540c1aSeric miao 
5298f58de7cSeric miao static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
5308f58de7cSeric miao 
5318f58de7cSeric miao static struct resource pxa25x_resource_ssp[] = {
5328f58de7cSeric miao 	[0] = {
5338f58de7cSeric miao 		.start	= 0x41000000,
5348f58de7cSeric miao 		.end	= 0x4100001f,
5358f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
5368f58de7cSeric miao 	},
5378f58de7cSeric miao 	[1] = {
5388f58de7cSeric miao 		.start	= IRQ_SSP,
5398f58de7cSeric miao 		.end	= IRQ_SSP,
5408f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
5418f58de7cSeric miao 	},
5428f58de7cSeric miao };
5438f58de7cSeric miao 
5448f58de7cSeric miao struct platform_device pxa25x_device_ssp = {
5458f58de7cSeric miao 	.name		= "pxa25x-ssp",
5468f58de7cSeric miao 	.id		= 0,
5478f58de7cSeric miao 	.dev		= {
5488f58de7cSeric miao 		.dma_mask = &pxa25x_ssp_dma_mask,
5498f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
5508f58de7cSeric miao 	},
5518f58de7cSeric miao 	.resource	= pxa25x_resource_ssp,
5528f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
5538f58de7cSeric miao };
5548f58de7cSeric miao 
5558f58de7cSeric miao static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
5568f58de7cSeric miao 
5578f58de7cSeric miao static struct resource pxa25x_resource_nssp[] = {
5588f58de7cSeric miao 	[0] = {
5598f58de7cSeric miao 		.start	= 0x41400000,
5608f58de7cSeric miao 		.end	= 0x4140002f,
5618f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
5628f58de7cSeric miao 	},
5638f58de7cSeric miao 	[1] = {
5648f58de7cSeric miao 		.start	= IRQ_NSSP,
5658f58de7cSeric miao 		.end	= IRQ_NSSP,
5668f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
5678f58de7cSeric miao 	},
5688f58de7cSeric miao };
5698f58de7cSeric miao 
5708f58de7cSeric miao struct platform_device pxa25x_device_nssp = {
5718f58de7cSeric miao 	.name		= "pxa25x-nssp",
5728f58de7cSeric miao 	.id		= 1,
5738f58de7cSeric miao 	.dev		= {
5748f58de7cSeric miao 		.dma_mask = &pxa25x_nssp_dma_mask,
5758f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
5768f58de7cSeric miao 	},
5778f58de7cSeric miao 	.resource	= pxa25x_resource_nssp,
5788f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
5798f58de7cSeric miao };
5808f58de7cSeric miao 
5818f58de7cSeric miao static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
5828f58de7cSeric miao 
5838f58de7cSeric miao static struct resource pxa25x_resource_assp[] = {
5848f58de7cSeric miao 	[0] = {
5858f58de7cSeric miao 		.start	= 0x41500000,
5868f58de7cSeric miao 		.end	= 0x4150002f,
5878f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
5888f58de7cSeric miao 	},
5898f58de7cSeric miao 	[1] = {
5908f58de7cSeric miao 		.start	= IRQ_ASSP,
5918f58de7cSeric miao 		.end	= IRQ_ASSP,
5928f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
5938f58de7cSeric miao 	},
5948f58de7cSeric miao };
5958f58de7cSeric miao 
5968f58de7cSeric miao struct platform_device pxa25x_device_assp = {
5978f58de7cSeric miao 	/* ASSP is basically equivalent to NSSP */
5988f58de7cSeric miao 	.name		= "pxa25x-nssp",
5998f58de7cSeric miao 	.id		= 2,
6008f58de7cSeric miao 	.dev		= {
6018f58de7cSeric miao 		.dma_mask = &pxa25x_assp_dma_mask,
6028f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
6038f58de7cSeric miao 	},
6048f58de7cSeric miao 	.resource	= pxa25x_resource_assp,
6058f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
6068f58de7cSeric miao };
6078f58de7cSeric miao #endif /* CONFIG_PXA25x */
6088f58de7cSeric miao 
6098f58de7cSeric miao #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
610a4553358SHaojian Zhuang static struct resource pxa27x_resource_camera[] = {
61137320980Seric miao 	[0] = {
612a4553358SHaojian Zhuang 		.start	= 0x50000000,
613a4553358SHaojian Zhuang 		.end	= 0x50000fff,
61437320980Seric miao 		.flags	= IORESOURCE_MEM,
61537320980Seric miao 	},
61637320980Seric miao 	[1] = {
617a4553358SHaojian Zhuang 		.start	= IRQ_CAMERA,
618a4553358SHaojian Zhuang 		.end	= IRQ_CAMERA,
61937320980Seric miao 		.flags	= IORESOURCE_IRQ,
62037320980Seric miao 	},
62137320980Seric miao };
62237320980Seric miao 
623a4553358SHaojian Zhuang static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
624a4553358SHaojian Zhuang 
625a4553358SHaojian Zhuang static struct platform_device pxa27x_device_camera = {
626a4553358SHaojian Zhuang 	.name		= "pxa27x-camera",
627a4553358SHaojian Zhuang 	.id		= 0, /* This is used to put cameras on this interface */
628a4553358SHaojian Zhuang 	.dev		= {
629a4553358SHaojian Zhuang 		.dma_mask      		= &pxa27x_dma_mask_camera,
630a4553358SHaojian Zhuang 		.coherent_dma_mask	= 0xffffffff,
631a4553358SHaojian Zhuang 	},
632a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
633a4553358SHaojian Zhuang 	.resource	= pxa27x_resource_camera,
63437320980Seric miao };
63537320980Seric miao 
636a4553358SHaojian Zhuang void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
63737320980Seric miao {
638*a52e1736SEzequiel Garcia 	struct clk *mclk;
639*a52e1736SEzequiel Garcia 
640*a52e1736SEzequiel Garcia 	/* Register a fixed-rate clock for camera sensors. */
641*a52e1736SEzequiel Garcia 	mclk = clk_register_fixed_rate(NULL, "pxa_camera_clk", NULL, 0,
642*a52e1736SEzequiel Garcia 					     info->mclk_10khz * 10000);
643*a52e1736SEzequiel Garcia 	if (!IS_ERR(mclk))
644*a52e1736SEzequiel Garcia 		clkdev_create(mclk, "mclk", NULL);
645a4553358SHaojian Zhuang 	pxa_register_device(&pxa27x_device_camera, info);
64637320980Seric miao }
64737320980Seric miao 
648ec68e45bSeric miao static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
649ec68e45bSeric miao 
650ec68e45bSeric miao static struct resource pxa27x_resource_ohci[] = {
651ec68e45bSeric miao 	[0] = {
652ec68e45bSeric miao 		.start  = 0x4C000000,
653ec68e45bSeric miao 		.end    = 0x4C00ff6f,
654ec68e45bSeric miao 		.flags  = IORESOURCE_MEM,
655ec68e45bSeric miao 	},
656ec68e45bSeric miao 	[1] = {
657ec68e45bSeric miao 		.start  = IRQ_USBH1,
658ec68e45bSeric miao 		.end    = IRQ_USBH1,
659ec68e45bSeric miao 		.flags  = IORESOURCE_IRQ,
660ec68e45bSeric miao 	},
661ec68e45bSeric miao };
662ec68e45bSeric miao 
663ec68e45bSeric miao struct platform_device pxa27x_device_ohci = {
664ec68e45bSeric miao 	.name		= "pxa27x-ohci",
665ec68e45bSeric miao 	.id		= -1,
666ec68e45bSeric miao 	.dev		= {
667ec68e45bSeric miao 		.dma_mask = &pxa27x_ohci_dma_mask,
668ec68e45bSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
669ec68e45bSeric miao 	},
670ec68e45bSeric miao 	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
671ec68e45bSeric miao 	.resource       = pxa27x_resource_ohci,
672ec68e45bSeric miao };
673ec68e45bSeric miao 
674ec68e45bSeric miao void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
675ec68e45bSeric miao {
676ec68e45bSeric miao 	pxa_register_device(&pxa27x_device_ohci, info);
677ec68e45bSeric miao }
678a4553358SHaojian Zhuang #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
679a4553358SHaojian Zhuang 
68049ea7fc0SHaojian Zhuang #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
681a4553358SHaojian Zhuang static struct resource pxa27x_resource_keypad[] = {
682a4553358SHaojian Zhuang 	[0] = {
683a4553358SHaojian Zhuang 		.start	= 0x41500000,
684a4553358SHaojian Zhuang 		.end	= 0x4150004c,
685a4553358SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
686a4553358SHaojian Zhuang 	},
687a4553358SHaojian Zhuang 	[1] = {
688a4553358SHaojian Zhuang 		.start	= IRQ_KEYPAD,
689a4553358SHaojian Zhuang 		.end	= IRQ_KEYPAD,
690a4553358SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
691a4553358SHaojian Zhuang 	},
692a4553358SHaojian Zhuang };
693a4553358SHaojian Zhuang 
694a4553358SHaojian Zhuang struct platform_device pxa27x_device_keypad = {
695a4553358SHaojian Zhuang 	.name		= "pxa27x-keypad",
696a4553358SHaojian Zhuang 	.id		= -1,
697a4553358SHaojian Zhuang 	.resource	= pxa27x_resource_keypad,
698a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
699a4553358SHaojian Zhuang };
700a4553358SHaojian Zhuang 
701a4553358SHaojian Zhuang void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
702a4553358SHaojian Zhuang {
703a4553358SHaojian Zhuang 	pxa_register_device(&pxa27x_device_keypad, info);
704a4553358SHaojian Zhuang }
705ec68e45bSeric miao 
7068f58de7cSeric miao static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
7078f58de7cSeric miao 
7088f58de7cSeric miao static struct resource pxa27x_resource_ssp1[] = {
7098f58de7cSeric miao 	[0] = {
7108f58de7cSeric miao 		.start	= 0x41000000,
7118f58de7cSeric miao 		.end	= 0x4100003f,
7128f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
7138f58de7cSeric miao 	},
7148f58de7cSeric miao 	[1] = {
7158f58de7cSeric miao 		.start	= IRQ_SSP,
7168f58de7cSeric miao 		.end	= IRQ_SSP,
7178f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
7188f58de7cSeric miao 	},
7198f58de7cSeric miao };
7208f58de7cSeric miao 
7218f58de7cSeric miao struct platform_device pxa27x_device_ssp1 = {
7228f58de7cSeric miao 	.name		= "pxa27x-ssp",
7238f58de7cSeric miao 	.id		= 0,
7248f58de7cSeric miao 	.dev		= {
7258f58de7cSeric miao 		.dma_mask = &pxa27x_ssp1_dma_mask,
7268f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
7278f58de7cSeric miao 	},
7288f58de7cSeric miao 	.resource	= pxa27x_resource_ssp1,
7298f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
7308f58de7cSeric miao };
7318f58de7cSeric miao 
7328f58de7cSeric miao static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
7338f58de7cSeric miao 
7348f58de7cSeric miao static struct resource pxa27x_resource_ssp2[] = {
7358f58de7cSeric miao 	[0] = {
7368f58de7cSeric miao 		.start	= 0x41700000,
7378f58de7cSeric miao 		.end	= 0x4170003f,
7388f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
7398f58de7cSeric miao 	},
7408f58de7cSeric miao 	[1] = {
7418f58de7cSeric miao 		.start	= IRQ_SSP2,
7428f58de7cSeric miao 		.end	= IRQ_SSP2,
7438f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
7448f58de7cSeric miao 	},
7458f58de7cSeric miao };
7468f58de7cSeric miao 
7478f58de7cSeric miao struct platform_device pxa27x_device_ssp2 = {
7488f58de7cSeric miao 	.name		= "pxa27x-ssp",
7498f58de7cSeric miao 	.id		= 1,
7508f58de7cSeric miao 	.dev		= {
7518f58de7cSeric miao 		.dma_mask = &pxa27x_ssp2_dma_mask,
7528f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
7538f58de7cSeric miao 	},
7548f58de7cSeric miao 	.resource	= pxa27x_resource_ssp2,
7558f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
7568f58de7cSeric miao };
7578f58de7cSeric miao 
7588f58de7cSeric miao static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
7598f58de7cSeric miao 
7608f58de7cSeric miao static struct resource pxa27x_resource_ssp3[] = {
7618f58de7cSeric miao 	[0] = {
7628f58de7cSeric miao 		.start	= 0x41900000,
7638f58de7cSeric miao 		.end	= 0x4190003f,
7648f58de7cSeric miao 		.flags	= IORESOURCE_MEM,
7658f58de7cSeric miao 	},
7668f58de7cSeric miao 	[1] = {
7678f58de7cSeric miao 		.start	= IRQ_SSP3,
7688f58de7cSeric miao 		.end	= IRQ_SSP3,
7698f58de7cSeric miao 		.flags	= IORESOURCE_IRQ,
7708f58de7cSeric miao 	},
7718f58de7cSeric miao };
7728f58de7cSeric miao 
7738f58de7cSeric miao struct platform_device pxa27x_device_ssp3 = {
7748f58de7cSeric miao 	.name		= "pxa27x-ssp",
7758f58de7cSeric miao 	.id		= 2,
7768f58de7cSeric miao 	.dev		= {
7778f58de7cSeric miao 		.dma_mask = &pxa27x_ssp3_dma_mask,
7788f58de7cSeric miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
7798f58de7cSeric miao 	},
7808f58de7cSeric miao 	.resource	= pxa27x_resource_ssp3,
7818f58de7cSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
7828f58de7cSeric miao };
7833f3acefbSGuennadi Liakhovetski 
78475540c1aSeric miao static struct resource pxa27x_resource_pwm0[] = {
78575540c1aSeric miao 	[0] = {
78675540c1aSeric miao 		.start	= 0x40b00000,
78775540c1aSeric miao 		.end	= 0x40b0001f,
78875540c1aSeric miao 		.flags	= IORESOURCE_MEM,
78975540c1aSeric miao 	},
79075540c1aSeric miao };
79175540c1aSeric miao 
79275540c1aSeric miao struct platform_device pxa27x_device_pwm0 = {
79375540c1aSeric miao 	.name		= "pxa27x-pwm",
79475540c1aSeric miao 	.id		= 0,
79575540c1aSeric miao 	.resource	= pxa27x_resource_pwm0,
79675540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
79775540c1aSeric miao };
79875540c1aSeric miao 
79975540c1aSeric miao static struct resource pxa27x_resource_pwm1[] = {
80075540c1aSeric miao 	[0] = {
80175540c1aSeric miao 		.start	= 0x40c00000,
80275540c1aSeric miao 		.end	= 0x40c0001f,
80375540c1aSeric miao 		.flags	= IORESOURCE_MEM,
80475540c1aSeric miao 	},
80575540c1aSeric miao };
80675540c1aSeric miao 
80775540c1aSeric miao struct platform_device pxa27x_device_pwm1 = {
80875540c1aSeric miao 	.name		= "pxa27x-pwm",
80975540c1aSeric miao 	.id		= 1,
81075540c1aSeric miao 	.resource	= pxa27x_resource_pwm1,
81175540c1aSeric miao 	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
81275540c1aSeric miao };
81349ea7fc0SHaojian Zhuang #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
8148f58de7cSeric miao 
8158f58de7cSeric miao #ifdef CONFIG_PXA3xx
8168d33b055SBridge Wu static struct resource pxa3xx_resources_mci2[] = {
8178d33b055SBridge Wu 	[0] = {
8188d33b055SBridge Wu 		.start	= 0x42000000,
8198d33b055SBridge Wu 		.end	= 0x42000fff,
8208d33b055SBridge Wu 		.flags	= IORESOURCE_MEM,
8218d33b055SBridge Wu 	},
8228d33b055SBridge Wu 	[1] = {
8238d33b055SBridge Wu 		.start	= IRQ_MMC2,
8248d33b055SBridge Wu 		.end	= IRQ_MMC2,
8258d33b055SBridge Wu 		.flags	= IORESOURCE_IRQ,
8268d33b055SBridge Wu 	},
8278d33b055SBridge Wu };
8288d33b055SBridge Wu 
8298d33b055SBridge Wu struct platform_device pxa3xx_device_mci2 = {
8308d33b055SBridge Wu 	.name		= "pxa2xx-mci",
8318d33b055SBridge Wu 	.id		= 1,
8328d33b055SBridge Wu 	.dev		= {
8338d33b055SBridge Wu 		.dma_mask = &pxamci_dmamask,
8348d33b055SBridge Wu 		.coherent_dma_mask =	0xffffffff,
8358d33b055SBridge Wu 	},
8368d33b055SBridge Wu 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
8378d33b055SBridge Wu 	.resource	= pxa3xx_resources_mci2,
8388d33b055SBridge Wu };
8398d33b055SBridge Wu 
8408d33b055SBridge Wu void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
8418d33b055SBridge Wu {
8428d33b055SBridge Wu 	pxa_register_device(&pxa3xx_device_mci2, info);
8438d33b055SBridge Wu }
8448d33b055SBridge Wu 
8455a1f21b1SBridge Wu static struct resource pxa3xx_resources_mci3[] = {
8465a1f21b1SBridge Wu 	[0] = {
8475a1f21b1SBridge Wu 		.start	= 0x42500000,
8485a1f21b1SBridge Wu 		.end	= 0x42500fff,
8495a1f21b1SBridge Wu 		.flags	= IORESOURCE_MEM,
8505a1f21b1SBridge Wu 	},
8515a1f21b1SBridge Wu 	[1] = {
8525a1f21b1SBridge Wu 		.start	= IRQ_MMC3,
8535a1f21b1SBridge Wu 		.end	= IRQ_MMC3,
8545a1f21b1SBridge Wu 		.flags	= IORESOURCE_IRQ,
8555a1f21b1SBridge Wu 	},
8565a1f21b1SBridge Wu };
8575a1f21b1SBridge Wu 
8585a1f21b1SBridge Wu struct platform_device pxa3xx_device_mci3 = {
8595a1f21b1SBridge Wu 	.name		= "pxa2xx-mci",
8605a1f21b1SBridge Wu 	.id		= 2,
8615a1f21b1SBridge Wu 	.dev		= {
8625a1f21b1SBridge Wu 		.dma_mask = &pxamci_dmamask,
8635a1f21b1SBridge Wu 		.coherent_dma_mask = 0xffffffff,
8645a1f21b1SBridge Wu 	},
8655a1f21b1SBridge Wu 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
8665a1f21b1SBridge Wu 	.resource	= pxa3xx_resources_mci3,
8675a1f21b1SBridge Wu };
8685a1f21b1SBridge Wu 
8695a1f21b1SBridge Wu void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
8705a1f21b1SBridge Wu {
8715a1f21b1SBridge Wu 	pxa_register_device(&pxa3xx_device_mci3, info);
8725a1f21b1SBridge Wu }
8735a1f21b1SBridge Wu 
874a4553358SHaojian Zhuang static struct resource pxa3xx_resources_gcu[] = {
875a4553358SHaojian Zhuang 	{
876a4553358SHaojian Zhuang 		.start	= 0x54000000,
877a4553358SHaojian Zhuang 		.end	= 0x54000fff,
878a4553358SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
879a4553358SHaojian Zhuang 	},
880a4553358SHaojian Zhuang 	{
881a4553358SHaojian Zhuang 		.start	= IRQ_GCU,
882a4553358SHaojian Zhuang 		.end	= IRQ_GCU,
883a4553358SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
884a4553358SHaojian Zhuang 	},
885a4553358SHaojian Zhuang };
886a4553358SHaojian Zhuang 
887a4553358SHaojian Zhuang static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
888a4553358SHaojian Zhuang 
889a4553358SHaojian Zhuang struct platform_device pxa3xx_device_gcu = {
890a4553358SHaojian Zhuang 	.name		= "pxa3xx-gcu",
891a4553358SHaojian Zhuang 	.id		= -1,
892a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
893a4553358SHaojian Zhuang 	.resource	= pxa3xx_resources_gcu,
894a4553358SHaojian Zhuang 	.dev		= {
895a4553358SHaojian Zhuang 		.dma_mask = &pxa3xx_gcu_dmamask,
896a4553358SHaojian Zhuang 		.coherent_dma_mask = 0xffffffff,
897a4553358SHaojian Zhuang 	},
898a4553358SHaojian Zhuang };
899a4553358SHaojian Zhuang 
900a4553358SHaojian Zhuang #endif /* CONFIG_PXA3xx */
901a4553358SHaojian Zhuang 
90249ea7fc0SHaojian Zhuang #if defined(CONFIG_PXA3xx)
903a4553358SHaojian Zhuang static struct resource pxa3xx_resources_i2c_power[] = {
904a4553358SHaojian Zhuang 	{
905a4553358SHaojian Zhuang 		.start  = 0x40f500c0,
906a4553358SHaojian Zhuang 		.end    = 0x40f500d3,
907a4553358SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
908a4553358SHaojian Zhuang 	}, {
909a4553358SHaojian Zhuang 		.start	= IRQ_PWRI2C,
910a4553358SHaojian Zhuang 		.end	= IRQ_PWRI2C,
911a4553358SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
912a4553358SHaojian Zhuang 	},
913a4553358SHaojian Zhuang };
914a4553358SHaojian Zhuang 
915a4553358SHaojian Zhuang struct platform_device pxa3xx_device_i2c_power = {
916a4553358SHaojian Zhuang 	.name		= "pxa3xx-pwri2c",
917a4553358SHaojian Zhuang 	.id		= 1,
918a4553358SHaojian Zhuang 	.resource	= pxa3xx_resources_i2c_power,
919a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
920a4553358SHaojian Zhuang };
921a4553358SHaojian Zhuang 
9229ae819a8SEric Miao static struct resource pxa3xx_resources_nand[] = {
9239ae819a8SEric Miao 	[0] = {
9249ae819a8SEric Miao 		.start	= 0x43100000,
9259ae819a8SEric Miao 		.end	= 0x43100053,
9269ae819a8SEric Miao 		.flags	= IORESOURCE_MEM,
9279ae819a8SEric Miao 	},
9289ae819a8SEric Miao 	[1] = {
9299ae819a8SEric Miao 		.start	= IRQ_NAND,
9309ae819a8SEric Miao 		.end	= IRQ_NAND,
9319ae819a8SEric Miao 		.flags	= IORESOURCE_IRQ,
9329ae819a8SEric Miao 	},
9339ae819a8SEric Miao };
9349ae819a8SEric Miao 
9359ae819a8SEric Miao static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
9369ae819a8SEric Miao 
9379ae819a8SEric Miao struct platform_device pxa3xx_device_nand = {
9389ae819a8SEric Miao 	.name		= "pxa3xx-nand",
9399ae819a8SEric Miao 	.id		= -1,
9409ae819a8SEric Miao 	.dev		= {
9419ae819a8SEric Miao 		.dma_mask = &pxa3xx_nand_dma_mask,
9429ae819a8SEric Miao 		.coherent_dma_mask = DMA_BIT_MASK(32),
9439ae819a8SEric Miao 	},
9449ae819a8SEric Miao 	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
9459ae819a8SEric Miao 	.resource	= pxa3xx_resources_nand,
9469ae819a8SEric Miao };
9479ae819a8SEric Miao 
9489ae819a8SEric Miao void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
9499ae819a8SEric Miao {
9509ae819a8SEric Miao 	pxa_register_device(&pxa3xx_device_nand, info);
9519ae819a8SEric Miao }
9521ff2c33eSDaniel Mack 
953a4553358SHaojian Zhuang static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
954a4553358SHaojian Zhuang 
955a4553358SHaojian Zhuang static struct resource pxa3xx_resource_ssp4[] = {
956a4553358SHaojian Zhuang 	[0] = {
957a4553358SHaojian Zhuang 		.start	= 0x41a00000,
958a4553358SHaojian Zhuang 		.end	= 0x41a0003f,
9591ff2c33eSDaniel Mack 		.flags	= IORESOURCE_MEM,
9601ff2c33eSDaniel Mack 	},
961a4553358SHaojian Zhuang 	[1] = {
962a4553358SHaojian Zhuang 		.start	= IRQ_SSP4,
963a4553358SHaojian Zhuang 		.end	= IRQ_SSP4,
9641ff2c33eSDaniel Mack 		.flags	= IORESOURCE_IRQ,
9651ff2c33eSDaniel Mack 	},
9661ff2c33eSDaniel Mack };
9671ff2c33eSDaniel Mack 
9680da0e227SDaniel Mack /*
9690da0e227SDaniel Mack  * PXA3xx SSP is basically equivalent to PXA27x.
9700da0e227SDaniel Mack  * However, we need to register the device by the correct name in order to
9710da0e227SDaniel Mack  * make the driver set the correct internal type, hence we provide specific
9720da0e227SDaniel Mack  * platform_devices for each of them.
9730da0e227SDaniel Mack  */
9740da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp1 = {
9750da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
9760da0e227SDaniel Mack 	.id		= 0,
9770da0e227SDaniel Mack 	.dev		= {
9780da0e227SDaniel Mack 		.dma_mask = &pxa27x_ssp1_dma_mask,
9790da0e227SDaniel Mack 		.coherent_dma_mask = DMA_BIT_MASK(32),
9800da0e227SDaniel Mack 	},
9810da0e227SDaniel Mack 	.resource	= pxa27x_resource_ssp1,
9820da0e227SDaniel Mack 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
9830da0e227SDaniel Mack };
9840da0e227SDaniel Mack 
9850da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp2 = {
9860da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
9870da0e227SDaniel Mack 	.id		= 1,
9880da0e227SDaniel Mack 	.dev		= {
9890da0e227SDaniel Mack 		.dma_mask = &pxa27x_ssp2_dma_mask,
9900da0e227SDaniel Mack 		.coherent_dma_mask = DMA_BIT_MASK(32),
9910da0e227SDaniel Mack 	},
9920da0e227SDaniel Mack 	.resource	= pxa27x_resource_ssp2,
9930da0e227SDaniel Mack 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
9940da0e227SDaniel Mack };
9950da0e227SDaniel Mack 
9960da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp3 = {
9970da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
9980da0e227SDaniel Mack 	.id		= 2,
9990da0e227SDaniel Mack 	.dev		= {
10000da0e227SDaniel Mack 		.dma_mask = &pxa27x_ssp3_dma_mask,
10010da0e227SDaniel Mack 		.coherent_dma_mask = DMA_BIT_MASK(32),
10020da0e227SDaniel Mack 	},
10030da0e227SDaniel Mack 	.resource	= pxa27x_resource_ssp3,
10040da0e227SDaniel Mack 	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
10050da0e227SDaniel Mack };
10060da0e227SDaniel Mack 
1007a4553358SHaojian Zhuang struct platform_device pxa3xx_device_ssp4 = {
10080da0e227SDaniel Mack 	.name		= "pxa3xx-ssp",
1009a4553358SHaojian Zhuang 	.id		= 3,
1010a4553358SHaojian Zhuang 	.dev		= {
1011a4553358SHaojian Zhuang 		.dma_mask = &pxa3xx_ssp4_dma_mask,
1012a4553358SHaojian Zhuang 		.coherent_dma_mask = DMA_BIT_MASK(32),
1013a4553358SHaojian Zhuang 	},
1014a4553358SHaojian Zhuang 	.resource	= pxa3xx_resource_ssp4,
1015a4553358SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1016a4553358SHaojian Zhuang };
101749ea7fc0SHaojian Zhuang #endif /* CONFIG_PXA3xx */
1018e172274cSGuennadi Liakhovetski 
1019157d2644SHaojian Zhuang struct resource pxa_resource_gpio[] = {
1020157d2644SHaojian Zhuang 	{
1021157d2644SHaojian Zhuang 		.start	= 0x40e00000,
1022157d2644SHaojian Zhuang 		.end	= 0x40e0ffff,
1023157d2644SHaojian Zhuang 		.flags	= IORESOURCE_MEM,
1024157d2644SHaojian Zhuang 	}, {
1025157d2644SHaojian Zhuang 		.start	= IRQ_GPIO0,
1026157d2644SHaojian Zhuang 		.end	= IRQ_GPIO0,
1027157d2644SHaojian Zhuang 		.name	= "gpio0",
1028157d2644SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
1029157d2644SHaojian Zhuang 	}, {
1030157d2644SHaojian Zhuang 		.start	= IRQ_GPIO1,
1031157d2644SHaojian Zhuang 		.end	= IRQ_GPIO1,
1032157d2644SHaojian Zhuang 		.name	= "gpio1",
1033157d2644SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
1034157d2644SHaojian Zhuang 	}, {
1035157d2644SHaojian Zhuang 		.start	= IRQ_GPIO_2_x,
1036157d2644SHaojian Zhuang 		.end	= IRQ_GPIO_2_x,
1037157d2644SHaojian Zhuang 		.name	= "gpio_mux",
1038157d2644SHaojian Zhuang 		.flags	= IORESOURCE_IRQ,
1039157d2644SHaojian Zhuang 	},
1040157d2644SHaojian Zhuang };
1041157d2644SHaojian Zhuang 
10422cab0292SHaojian Zhuang struct platform_device pxa25x_device_gpio = {
10432cab0292SHaojian Zhuang #ifdef CONFIG_CPU_PXA26x
10442cab0292SHaojian Zhuang 	.name		= "pxa26x-gpio",
10452cab0292SHaojian Zhuang #else
10462cab0292SHaojian Zhuang 	.name		= "pxa25x-gpio",
10472cab0292SHaojian Zhuang #endif
10482cab0292SHaojian Zhuang 	.id		= -1,
10492cab0292SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
10502cab0292SHaojian Zhuang 	.resource	= pxa_resource_gpio,
10512cab0292SHaojian Zhuang };
10522cab0292SHaojian Zhuang 
10532cab0292SHaojian Zhuang struct platform_device pxa27x_device_gpio = {
10542cab0292SHaojian Zhuang 	.name		= "pxa27x-gpio",
10552cab0292SHaojian Zhuang 	.id		= -1,
10562cab0292SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
10572cab0292SHaojian Zhuang 	.resource	= pxa_resource_gpio,
10582cab0292SHaojian Zhuang };
10592cab0292SHaojian Zhuang 
10602cab0292SHaojian Zhuang struct platform_device pxa3xx_device_gpio = {
10612cab0292SHaojian Zhuang 	.name		= "pxa3xx-gpio",
10622cab0292SHaojian Zhuang 	.id		= -1,
10632cab0292SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
10642cab0292SHaojian Zhuang 	.resource	= pxa_resource_gpio,
10652cab0292SHaojian Zhuang };
10662cab0292SHaojian Zhuang 
10672cab0292SHaojian Zhuang struct platform_device pxa93x_device_gpio = {
10682cab0292SHaojian Zhuang 	.name		= "pxa93x-gpio",
1069157d2644SHaojian Zhuang 	.id		= -1,
1070157d2644SHaojian Zhuang 	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1071157d2644SHaojian Zhuang 	.resource	= pxa_resource_gpio,
1072157d2644SHaojian Zhuang };
1073157d2644SHaojian Zhuang 
1074e172274cSGuennadi Liakhovetski /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1075e172274cSGuennadi Liakhovetski  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
107651eea52dSLubomir Rintel void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)
1077e172274cSGuennadi Liakhovetski {
1078e172274cSGuennadi Liakhovetski 	struct platform_device *pd;
1079e172274cSGuennadi Liakhovetski 
1080e172274cSGuennadi Liakhovetski 	pd = platform_device_alloc("pxa2xx-spi", id);
1081e172274cSGuennadi Liakhovetski 	if (pd == NULL) {
1082e172274cSGuennadi Liakhovetski 		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1083e172274cSGuennadi Liakhovetski 		       id);
1084e172274cSGuennadi Liakhovetski 		return;
1085e172274cSGuennadi Liakhovetski 	}
1086e172274cSGuennadi Liakhovetski 
1087e172274cSGuennadi Liakhovetski 	pd->dev.platform_data = info;
1088e172274cSGuennadi Liakhovetski 	platform_device_add(pd);
1089e172274cSGuennadi Liakhovetski }
10904be0856fSRobert Jarzmik 
10914be0856fSRobert Jarzmik static struct resource pxa_dma_resource[] = {
10924be0856fSRobert Jarzmik 	[0] = {
10934be0856fSRobert Jarzmik 		.start	= 0x40000000,
10944be0856fSRobert Jarzmik 		.end	= 0x4000ffff,
10954be0856fSRobert Jarzmik 		.flags	= IORESOURCE_MEM,
10964be0856fSRobert Jarzmik 	},
10974be0856fSRobert Jarzmik 	[1] = {
10984be0856fSRobert Jarzmik 		.start	= IRQ_DMA,
10994be0856fSRobert Jarzmik 		.end	= IRQ_DMA,
11004be0856fSRobert Jarzmik 		.flags	= IORESOURCE_IRQ,
11014be0856fSRobert Jarzmik 	},
11024be0856fSRobert Jarzmik };
11034be0856fSRobert Jarzmik 
11044be0856fSRobert Jarzmik static u64 pxadma_dmamask = 0xffffffffUL;
11054be0856fSRobert Jarzmik 
11064be0856fSRobert Jarzmik static struct platform_device pxa2xx_pxa_dma = {
11074be0856fSRobert Jarzmik 	.name		= "pxa-dma",
11084be0856fSRobert Jarzmik 	.id		= 0,
11094be0856fSRobert Jarzmik 	.dev		= {
11104be0856fSRobert Jarzmik 		.dma_mask = &pxadma_dmamask,
11114be0856fSRobert Jarzmik 		.coherent_dma_mask = 0xffffffff,
11124be0856fSRobert Jarzmik 	},
11134be0856fSRobert Jarzmik 	.num_resources	= ARRAY_SIZE(pxa_dma_resource),
11144be0856fSRobert Jarzmik 	.resource	= pxa_dma_resource,
11154be0856fSRobert Jarzmik };
11164be0856fSRobert Jarzmik 
11171da10c17SRobert Jarzmik void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
11184be0856fSRobert Jarzmik {
11191da10c17SRobert Jarzmik 	pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
11204be0856fSRobert Jarzmik }
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