1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 28f58de7cSeric miao #include <linux/module.h> 38f58de7cSeric miao #include <linux/kernel.h> 48f58de7cSeric miao #include <linux/init.h> 58f58de7cSeric miao #include <linux/platform_device.h> 6*22abc0d2SRobert Jarzmik #include <linux/clkdev.h> 78f58de7cSeric miao #include <linux/dma-mapping.h> 81da10c17SRobert Jarzmik #include <linux/dmaengine.h> 98348c259SSebastian Andrzej Siewior #include <linux/spi/pxa2xx_spi.h> 10f15fc9b1SWolfram Sang #include <linux/platform_data/i2c-pxa.h> 118f58de7cSeric miao 124c25c5d2SArnd Bergmann #include "udc.h" 13293b2da1SArnd Bergmann #include <linux/platform_data/usb-pxa3xx-ulpi.h> 14293b2da1SArnd Bergmann #include <linux/platform_data/video-pxafb.h> 15293b2da1SArnd Bergmann #include <linux/platform_data/mmc-pxamci.h> 16293b2da1SArnd Bergmann #include <linux/platform_data/irda-pxaficp.h> 174e611091SRob Herring #include <mach/irqs.h> 18293b2da1SArnd Bergmann #include <linux/platform_data/usb-ohci-pxa27x.h> 19293b2da1SArnd Bergmann #include <linux/platform_data/keypad-pxa27x.h> 20a71daaa1SMauro Carvalho Chehab #include <linux/platform_data/media/camera-pxa.h> 21a09e64fbSRussell King #include <mach/audio.h> 2275e874c6SEric Miao #include <mach/hardware.h> 234be0856fSRobert Jarzmik #include <linux/platform_data/mmp_dma.h> 24293b2da1SArnd Bergmann #include <linux/platform_data/mtd-nand-pxa3xx.h> 258f58de7cSeric miao 268f58de7cSeric miao #include "devices.h" 27bc3a5959SPhilipp Zabel #include "generic.h" 288f58de7cSeric miao 298f58de7cSeric miao void __init pxa_register_device(struct platform_device *dev, void *data) 308f58de7cSeric miao { 318f58de7cSeric miao int ret; 328f58de7cSeric miao 338f58de7cSeric miao dev->dev.platform_data = data; 348f58de7cSeric miao 358f58de7cSeric miao ret = platform_device_register(dev); 368f58de7cSeric miao if (ret) 378f58de7cSeric miao dev_err(&dev->dev, "unable to register device: %d\n", ret); 388f58de7cSeric miao } 398f58de7cSeric miao 4009a5358dSEric Miao static struct resource pxa_resource_pmu = { 4109a5358dSEric Miao .start = IRQ_PMU, 4209a5358dSEric Miao .end = IRQ_PMU, 4309a5358dSEric Miao .flags = IORESOURCE_IRQ, 4409a5358dSEric Miao }; 4509a5358dSEric Miao 4609a5358dSEric Miao struct platform_device pxa_device_pmu = { 47f9eff219SMark Rutland .name = "xscale-pmu", 48df3d17e0SSudeep KarkadaNagesha .id = -1, 4909a5358dSEric Miao .resource = &pxa_resource_pmu, 5009a5358dSEric Miao .num_resources = 1, 5109a5358dSEric Miao }; 5209a5358dSEric Miao 538f58de7cSeric miao static struct resource pxamci_resources[] = { 548f58de7cSeric miao [0] = { 558f58de7cSeric miao .start = 0x41100000, 568f58de7cSeric miao .end = 0x41100fff, 578f58de7cSeric miao .flags = IORESOURCE_MEM, 588f58de7cSeric miao }, 598f58de7cSeric miao [1] = { 608f58de7cSeric miao .start = IRQ_MMC, 618f58de7cSeric miao .end = IRQ_MMC, 628f58de7cSeric miao .flags = IORESOURCE_IRQ, 638f58de7cSeric miao }, 648f58de7cSeric miao }; 658f58de7cSeric miao 668f58de7cSeric miao static u64 pxamci_dmamask = 0xffffffffUL; 678f58de7cSeric miao 688f58de7cSeric miao struct platform_device pxa_device_mci = { 698f58de7cSeric miao .name = "pxa2xx-mci", 70fafc9d3fSBridge Wu .id = 0, 718f58de7cSeric miao .dev = { 728f58de7cSeric miao .dma_mask = &pxamci_dmamask, 738f58de7cSeric miao .coherent_dma_mask = 0xffffffff, 748f58de7cSeric miao }, 758f58de7cSeric miao .num_resources = ARRAY_SIZE(pxamci_resources), 768f58de7cSeric miao .resource = pxamci_resources, 778f58de7cSeric miao }; 788f58de7cSeric miao 798f58de7cSeric miao void __init pxa_set_mci_info(struct pxamci_platform_data *info) 808f58de7cSeric miao { 818f58de7cSeric miao pxa_register_device(&pxa_device_mci, info); 828f58de7cSeric miao } 838f58de7cSeric miao 848f58de7cSeric miao 851257629bSPhilipp Zabel static struct pxa2xx_udc_mach_info pxa_udc_info = { 861257629bSPhilipp Zabel .gpio_pullup = -1, 871257629bSPhilipp Zabel }; 888f58de7cSeric miao 898f58de7cSeric miao void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 908f58de7cSeric miao { 918f58de7cSeric miao memcpy(&pxa_udc_info, info, sizeof *info); 928f58de7cSeric miao } 938f58de7cSeric miao 948f58de7cSeric miao static struct resource pxa2xx_udc_resources[] = { 958f58de7cSeric miao [0] = { 968f58de7cSeric miao .start = 0x40600000, 978f58de7cSeric miao .end = 0x4060ffff, 988f58de7cSeric miao .flags = IORESOURCE_MEM, 998f58de7cSeric miao }, 1008f58de7cSeric miao [1] = { 1018f58de7cSeric miao .start = IRQ_USB, 1028f58de7cSeric miao .end = IRQ_USB, 1038f58de7cSeric miao .flags = IORESOURCE_IRQ, 1048f58de7cSeric miao }, 1058f58de7cSeric miao }; 1068f58de7cSeric miao 1078f58de7cSeric miao static u64 udc_dma_mask = ~(u32)0; 1088f58de7cSeric miao 1097a857620SPhilipp Zabel struct platform_device pxa25x_device_udc = { 1107a857620SPhilipp Zabel .name = "pxa25x-udc", 1117a857620SPhilipp Zabel .id = -1, 1127a857620SPhilipp Zabel .resource = pxa2xx_udc_resources, 1137a857620SPhilipp Zabel .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), 1147a857620SPhilipp Zabel .dev = { 1157a857620SPhilipp Zabel .platform_data = &pxa_udc_info, 1167a857620SPhilipp Zabel .dma_mask = &udc_dma_mask, 1177a857620SPhilipp Zabel } 1187a857620SPhilipp Zabel }; 1197a857620SPhilipp Zabel 1207a857620SPhilipp Zabel struct platform_device pxa27x_device_udc = { 1217a857620SPhilipp Zabel .name = "pxa27x-udc", 1228f58de7cSeric miao .id = -1, 1238f58de7cSeric miao .resource = pxa2xx_udc_resources, 1248f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), 1258f58de7cSeric miao .dev = { 1268f58de7cSeric miao .platform_data = &pxa_udc_info, 1278f58de7cSeric miao .dma_mask = &udc_dma_mask, 1288f58de7cSeric miao } 1298f58de7cSeric miao }; 1308f58de7cSeric miao 13169f22be7SIgor Grinberg #ifdef CONFIG_PXA3xx 13269f22be7SIgor Grinberg static struct resource pxa3xx_u2d_resources[] = { 13369f22be7SIgor Grinberg [0] = { 13469f22be7SIgor Grinberg .start = 0x54100000, 13569f22be7SIgor Grinberg .end = 0x54100fff, 13669f22be7SIgor Grinberg .flags = IORESOURCE_MEM, 13769f22be7SIgor Grinberg }, 13869f22be7SIgor Grinberg [1] = { 13969f22be7SIgor Grinberg .start = IRQ_USB2, 14069f22be7SIgor Grinberg .end = IRQ_USB2, 14169f22be7SIgor Grinberg .flags = IORESOURCE_IRQ, 14269f22be7SIgor Grinberg }, 14369f22be7SIgor Grinberg }; 14469f22be7SIgor Grinberg 14569f22be7SIgor Grinberg struct platform_device pxa3xx_device_u2d = { 14669f22be7SIgor Grinberg .name = "pxa3xx-u2d", 14769f22be7SIgor Grinberg .id = -1, 14869f22be7SIgor Grinberg .resource = pxa3xx_u2d_resources, 14969f22be7SIgor Grinberg .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources), 15069f22be7SIgor Grinberg }; 15169f22be7SIgor Grinberg 15269f22be7SIgor Grinberg void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info) 15369f22be7SIgor Grinberg { 15469f22be7SIgor Grinberg pxa_register_device(&pxa3xx_device_u2d, info); 15569f22be7SIgor Grinberg } 15669f22be7SIgor Grinberg #endif /* CONFIG_PXA3xx */ 15769f22be7SIgor Grinberg 1588f58de7cSeric miao static struct resource pxafb_resources[] = { 1598f58de7cSeric miao [0] = { 1608f58de7cSeric miao .start = 0x44000000, 1618f58de7cSeric miao .end = 0x4400ffff, 1628f58de7cSeric miao .flags = IORESOURCE_MEM, 1638f58de7cSeric miao }, 1648f58de7cSeric miao [1] = { 1658f58de7cSeric miao .start = IRQ_LCD, 1668f58de7cSeric miao .end = IRQ_LCD, 1678f58de7cSeric miao .flags = IORESOURCE_IRQ, 1688f58de7cSeric miao }, 1698f58de7cSeric miao }; 1708f58de7cSeric miao 1718f58de7cSeric miao static u64 fb_dma_mask = ~(u64)0; 1728f58de7cSeric miao 1738f58de7cSeric miao struct platform_device pxa_device_fb = { 1748f58de7cSeric miao .name = "pxa2xx-fb", 1758f58de7cSeric miao .id = -1, 1768f58de7cSeric miao .dev = { 1778f58de7cSeric miao .dma_mask = &fb_dma_mask, 1788f58de7cSeric miao .coherent_dma_mask = 0xffffffff, 1798f58de7cSeric miao }, 1808f58de7cSeric miao .num_resources = ARRAY_SIZE(pxafb_resources), 1818f58de7cSeric miao .resource = pxafb_resources, 1828f58de7cSeric miao }; 1838f58de7cSeric miao 1844321e1a1SRussell King - ARM Linux void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info) 1858f58de7cSeric miao { 1864321e1a1SRussell King - ARM Linux pxa_device_fb.dev.parent = parent; 1878f58de7cSeric miao pxa_register_device(&pxa_device_fb, info); 1888f58de7cSeric miao } 1898f58de7cSeric miao 1908f58de7cSeric miao static struct resource pxa_resource_ffuart[] = { 1918f58de7cSeric miao { 19202f65262SEric Miao .start = 0x40100000, 19302f65262SEric Miao .end = 0x40100023, 1948f58de7cSeric miao .flags = IORESOURCE_MEM, 1958f58de7cSeric miao }, { 1968f58de7cSeric miao .start = IRQ_FFUART, 1978f58de7cSeric miao .end = IRQ_FFUART, 1988f58de7cSeric miao .flags = IORESOURCE_IRQ, 1998f58de7cSeric miao } 2008f58de7cSeric miao }; 2018f58de7cSeric miao 2028f58de7cSeric miao struct platform_device pxa_device_ffuart = { 2038f58de7cSeric miao .name = "pxa2xx-uart", 2048f58de7cSeric miao .id = 0, 2058f58de7cSeric miao .resource = pxa_resource_ffuart, 2068f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa_resource_ffuart), 2078f58de7cSeric miao }; 2088f58de7cSeric miao 209cc155c6fSRussell King void __init pxa_set_ffuart_info(void *info) 210cc155c6fSRussell King { 211cc155c6fSRussell King pxa_register_device(&pxa_device_ffuart, info); 212cc155c6fSRussell King } 213cc155c6fSRussell King 2148f58de7cSeric miao static struct resource pxa_resource_btuart[] = { 2158f58de7cSeric miao { 21602f65262SEric Miao .start = 0x40200000, 21702f65262SEric Miao .end = 0x40200023, 2188f58de7cSeric miao .flags = IORESOURCE_MEM, 2198f58de7cSeric miao }, { 2208f58de7cSeric miao .start = IRQ_BTUART, 2218f58de7cSeric miao .end = IRQ_BTUART, 2228f58de7cSeric miao .flags = IORESOURCE_IRQ, 2238f58de7cSeric miao } 2248f58de7cSeric miao }; 2258f58de7cSeric miao 2268f58de7cSeric miao struct platform_device pxa_device_btuart = { 2278f58de7cSeric miao .name = "pxa2xx-uart", 2288f58de7cSeric miao .id = 1, 2298f58de7cSeric miao .resource = pxa_resource_btuart, 2308f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa_resource_btuart), 2318f58de7cSeric miao }; 2328f58de7cSeric miao 233cc155c6fSRussell King void __init pxa_set_btuart_info(void *info) 234cc155c6fSRussell King { 235cc155c6fSRussell King pxa_register_device(&pxa_device_btuart, info); 236cc155c6fSRussell King } 237cc155c6fSRussell King 2388f58de7cSeric miao static struct resource pxa_resource_stuart[] = { 2398f58de7cSeric miao { 24002f65262SEric Miao .start = 0x40700000, 24102f65262SEric Miao .end = 0x40700023, 2428f58de7cSeric miao .flags = IORESOURCE_MEM, 2438f58de7cSeric miao }, { 2448f58de7cSeric miao .start = IRQ_STUART, 2458f58de7cSeric miao .end = IRQ_STUART, 2468f58de7cSeric miao .flags = IORESOURCE_IRQ, 2478f58de7cSeric miao } 2488f58de7cSeric miao }; 2498f58de7cSeric miao 2508f58de7cSeric miao struct platform_device pxa_device_stuart = { 2518f58de7cSeric miao .name = "pxa2xx-uart", 2528f58de7cSeric miao .id = 2, 2538f58de7cSeric miao .resource = pxa_resource_stuart, 2548f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa_resource_stuart), 2558f58de7cSeric miao }; 2568f58de7cSeric miao 257cc155c6fSRussell King void __init pxa_set_stuart_info(void *info) 258cc155c6fSRussell King { 259cc155c6fSRussell King pxa_register_device(&pxa_device_stuart, info); 260cc155c6fSRussell King } 261cc155c6fSRussell King 2628f58de7cSeric miao static struct resource pxa_resource_hwuart[] = { 2638f58de7cSeric miao { 26402f65262SEric Miao .start = 0x41600000, 26502f65262SEric Miao .end = 0x4160002F, 2668f58de7cSeric miao .flags = IORESOURCE_MEM, 2678f58de7cSeric miao }, { 2688f58de7cSeric miao .start = IRQ_HWUART, 2698f58de7cSeric miao .end = IRQ_HWUART, 2708f58de7cSeric miao .flags = IORESOURCE_IRQ, 2718f58de7cSeric miao } 2728f58de7cSeric miao }; 2738f58de7cSeric miao 2748f58de7cSeric miao struct platform_device pxa_device_hwuart = { 2758f58de7cSeric miao .name = "pxa2xx-uart", 2768f58de7cSeric miao .id = 3, 2778f58de7cSeric miao .resource = pxa_resource_hwuart, 2788f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa_resource_hwuart), 2798f58de7cSeric miao }; 2808f58de7cSeric miao 281cc155c6fSRussell King void __init pxa_set_hwuart_info(void *info) 282cc155c6fSRussell King { 283cc155c6fSRussell King if (cpu_is_pxa255()) 284cc155c6fSRussell King pxa_register_device(&pxa_device_hwuart, info); 285cc155c6fSRussell King else 286cc155c6fSRussell King pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware"); 287cc155c6fSRussell King } 288cc155c6fSRussell King 2898f58de7cSeric miao static struct resource pxai2c_resources[] = { 2908f58de7cSeric miao { 2918f58de7cSeric miao .start = 0x40301680, 2928f58de7cSeric miao .end = 0x403016a3, 2938f58de7cSeric miao .flags = IORESOURCE_MEM, 2948f58de7cSeric miao }, { 2958f58de7cSeric miao .start = IRQ_I2C, 2968f58de7cSeric miao .end = IRQ_I2C, 2978f58de7cSeric miao .flags = IORESOURCE_IRQ, 2988f58de7cSeric miao }, 2998f58de7cSeric miao }; 3008f58de7cSeric miao 3018f58de7cSeric miao struct platform_device pxa_device_i2c = { 3028f58de7cSeric miao .name = "pxa2xx-i2c", 3038f58de7cSeric miao .id = 0, 3048f58de7cSeric miao .resource = pxai2c_resources, 3058f58de7cSeric miao .num_resources = ARRAY_SIZE(pxai2c_resources), 3068f58de7cSeric miao }; 3078f58de7cSeric miao 3088f58de7cSeric miao void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) 3098f58de7cSeric miao { 3108f58de7cSeric miao pxa_register_device(&pxa_device_i2c, info); 3118f58de7cSeric miao } 3128f58de7cSeric miao 31399464293SEric Miao #ifdef CONFIG_PXA27x 31499464293SEric Miao static struct resource pxa27x_resources_i2c_power[] = { 31599464293SEric Miao { 31699464293SEric Miao .start = 0x40f00180, 31799464293SEric Miao .end = 0x40f001a3, 31899464293SEric Miao .flags = IORESOURCE_MEM, 31999464293SEric Miao }, { 32099464293SEric Miao .start = IRQ_PWRI2C, 32199464293SEric Miao .end = IRQ_PWRI2C, 32299464293SEric Miao .flags = IORESOURCE_IRQ, 32399464293SEric Miao }, 32499464293SEric Miao }; 32599464293SEric Miao 32699464293SEric Miao struct platform_device pxa27x_device_i2c_power = { 32799464293SEric Miao .name = "pxa2xx-i2c", 32899464293SEric Miao .id = 1, 32999464293SEric Miao .resource = pxa27x_resources_i2c_power, 33099464293SEric Miao .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power), 33199464293SEric Miao }; 33299464293SEric Miao #endif 33399464293SEric Miao 3348f58de7cSeric miao static struct resource pxai2s_resources[] = { 3358f58de7cSeric miao { 3368f58de7cSeric miao .start = 0x40400000, 3378f58de7cSeric miao .end = 0x40400083, 3388f58de7cSeric miao .flags = IORESOURCE_MEM, 3398f58de7cSeric miao }, { 3408f58de7cSeric miao .start = IRQ_I2S, 3418f58de7cSeric miao .end = IRQ_I2S, 3428f58de7cSeric miao .flags = IORESOURCE_IRQ, 3438f58de7cSeric miao }, 3448f58de7cSeric miao }; 3458f58de7cSeric miao 3468f58de7cSeric miao struct platform_device pxa_device_i2s = { 3478f58de7cSeric miao .name = "pxa2xx-i2s", 3488f58de7cSeric miao .id = -1, 3498f58de7cSeric miao .resource = pxai2s_resources, 3508f58de7cSeric miao .num_resources = ARRAY_SIZE(pxai2s_resources), 3518f58de7cSeric miao }; 3528f58de7cSeric miao 353f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp1 = { 354f0fba2adSLiam Girdwood .name = "pxa-ssp-dai", 355f0fba2adSLiam Girdwood .id = 0, 356f0fba2adSLiam Girdwood }; 357f0fba2adSLiam Girdwood 358f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp2= { 359f0fba2adSLiam Girdwood .name = "pxa-ssp-dai", 360f0fba2adSLiam Girdwood .id = 1, 361f0fba2adSLiam Girdwood }; 362f0fba2adSLiam Girdwood 363f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp3 = { 364f0fba2adSLiam Girdwood .name = "pxa-ssp-dai", 365f0fba2adSLiam Girdwood .id = 2, 366f0fba2adSLiam Girdwood }; 367f0fba2adSLiam Girdwood 368f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_ssp4 = { 369f0fba2adSLiam Girdwood .name = "pxa-ssp-dai", 370f0fba2adSLiam Girdwood .id = 3, 371f0fba2adSLiam Girdwood }; 372f0fba2adSLiam Girdwood 373f0fba2adSLiam Girdwood struct platform_device pxa_device_asoc_platform = { 374f0fba2adSLiam Girdwood .name = "pxa-pcm-audio", 375f0fba2adSLiam Girdwood .id = -1, 376f0fba2adSLiam Girdwood }; 377f0fba2adSLiam Girdwood 3788f58de7cSeric miao static u64 pxaficp_dmamask = ~(u32)0; 3798f58de7cSeric miao 380121f3f9bSRob Herring static struct resource pxa_ir_resources[] = { 381121f3f9bSRob Herring [0] = { 382121f3f9bSRob Herring .start = IRQ_STUART, 383121f3f9bSRob Herring .end = IRQ_STUART, 384121f3f9bSRob Herring .flags = IORESOURCE_IRQ, 385121f3f9bSRob Herring }, 386121f3f9bSRob Herring [1] = { 387121f3f9bSRob Herring .start = IRQ_ICP, 388121f3f9bSRob Herring .end = IRQ_ICP, 389121f3f9bSRob Herring .flags = IORESOURCE_IRQ, 390121f3f9bSRob Herring }, 39148a629daSRobert Jarzmik [3] = { 39248a629daSRobert Jarzmik .start = 0x40800000, 39348a629daSRobert Jarzmik .end = 0x4080001b, 39448a629daSRobert Jarzmik .flags = IORESOURCE_MEM, 39548a629daSRobert Jarzmik }, 39648a629daSRobert Jarzmik [4] = { 39748a629daSRobert Jarzmik .start = 0x40700000, 39848a629daSRobert Jarzmik .end = 0x40700023, 39948a629daSRobert Jarzmik .flags = IORESOURCE_MEM, 40048a629daSRobert Jarzmik }, 401121f3f9bSRob Herring }; 402121f3f9bSRob Herring 4038f58de7cSeric miao struct platform_device pxa_device_ficp = { 4048f58de7cSeric miao .name = "pxa2xx-ir", 4058f58de7cSeric miao .id = -1, 406121f3f9bSRob Herring .num_resources = ARRAY_SIZE(pxa_ir_resources), 407121f3f9bSRob Herring .resource = pxa_ir_resources, 4088f58de7cSeric miao .dev = { 4098f58de7cSeric miao .dma_mask = &pxaficp_dmamask, 4108f58de7cSeric miao .coherent_dma_mask = 0xffffffff, 4118f58de7cSeric miao }, 4128f58de7cSeric miao }; 4138f58de7cSeric miao 4148f58de7cSeric miao void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) 4158f58de7cSeric miao { 4168f58de7cSeric miao pxa_register_device(&pxa_device_ficp, info); 4178f58de7cSeric miao } 4188f58de7cSeric miao 41972493146SRobert Jarzmik static struct resource pxa_rtc_resources[] = { 42072493146SRobert Jarzmik [0] = { 42172493146SRobert Jarzmik .start = 0x40900000, 42272493146SRobert Jarzmik .end = 0x40900000 + 0x3b, 42372493146SRobert Jarzmik .flags = IORESOURCE_MEM, 42472493146SRobert Jarzmik }, 42572493146SRobert Jarzmik [1] = { 42672493146SRobert Jarzmik .start = IRQ_RTC1Hz, 42772493146SRobert Jarzmik .end = IRQ_RTC1Hz, 4283888c090SHaojian Zhuang .name = "rtc 1Hz", 42972493146SRobert Jarzmik .flags = IORESOURCE_IRQ, 43072493146SRobert Jarzmik }, 43172493146SRobert Jarzmik [2] = { 43272493146SRobert Jarzmik .start = IRQ_RTCAlrm, 43372493146SRobert Jarzmik .end = IRQ_RTCAlrm, 4343888c090SHaojian Zhuang .name = "rtc alarm", 43572493146SRobert Jarzmik .flags = IORESOURCE_IRQ, 43672493146SRobert Jarzmik }, 43772493146SRobert Jarzmik }; 43872493146SRobert Jarzmik 43972493146SRobert Jarzmik struct platform_device pxa_device_rtc = { 44072493146SRobert Jarzmik .name = "pxa-rtc", 44172493146SRobert Jarzmik .id = -1, 44272493146SRobert Jarzmik .num_resources = ARRAY_SIZE(pxa_rtc_resources), 44372493146SRobert Jarzmik .resource = pxa_rtc_resources, 44472493146SRobert Jarzmik }; 44572493146SRobert Jarzmik 4463888c090SHaojian Zhuang struct platform_device sa1100_device_rtc = { 4473888c090SHaojian Zhuang .name = "sa1100-rtc", 4483888c090SHaojian Zhuang .id = -1, 4492c4fabecSRob Herring .num_resources = ARRAY_SIZE(pxa_rtc_resources), 4502c4fabecSRob Herring .resource = pxa_rtc_resources, 4513888c090SHaojian Zhuang }; 4523888c090SHaojian Zhuang 4539f19d638SMark Brown static struct resource pxa_ac97_resources[] = { 4549f19d638SMark Brown [0] = { 4559f19d638SMark Brown .start = 0x40500000, 4569f19d638SMark Brown .end = 0x40500000 + 0xfff, 4579f19d638SMark Brown .flags = IORESOURCE_MEM, 4589f19d638SMark Brown }, 4599f19d638SMark Brown [1] = { 4609f19d638SMark Brown .start = IRQ_AC97, 4619f19d638SMark Brown .end = IRQ_AC97, 4629f19d638SMark Brown .flags = IORESOURCE_IRQ, 4639f19d638SMark Brown }, 4649f19d638SMark Brown }; 4659f19d638SMark Brown 4669f19d638SMark Brown static u64 pxa_ac97_dmamask = 0xffffffffUL; 4679f19d638SMark Brown 4689f19d638SMark Brown struct platform_device pxa_device_ac97 = { 4699f19d638SMark Brown .name = "pxa2xx-ac97", 4709f19d638SMark Brown .id = -1, 4719f19d638SMark Brown .dev = { 4729f19d638SMark Brown .dma_mask = &pxa_ac97_dmamask, 4739f19d638SMark Brown .coherent_dma_mask = 0xffffffff, 4749f19d638SMark Brown }, 4759f19d638SMark Brown .num_resources = ARRAY_SIZE(pxa_ac97_resources), 4769f19d638SMark Brown .resource = pxa_ac97_resources, 4779f19d638SMark Brown }; 4789f19d638SMark Brown 4799f19d638SMark Brown void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops) 4809f19d638SMark Brown { 481*22abc0d2SRobert Jarzmik int ret; 482*22abc0d2SRobert Jarzmik 483*22abc0d2SRobert Jarzmik ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK", 484*22abc0d2SRobert Jarzmik &pxa_device_ac97.dev); 485*22abc0d2SRobert Jarzmik if (ret) 486*22abc0d2SRobert Jarzmik pr_err("PXA AC97 clock1 alias error: %d\n", ret); 487*22abc0d2SRobert Jarzmik 488*22abc0d2SRobert Jarzmik ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK", 489*22abc0d2SRobert Jarzmik &pxa_device_ac97.dev); 490*22abc0d2SRobert Jarzmik if (ret) 491*22abc0d2SRobert Jarzmik pr_err("PXA AC97 clock2 alias error: %d\n", ret); 492*22abc0d2SRobert Jarzmik 4939f19d638SMark Brown pxa_register_device(&pxa_device_ac97, ops); 4949f19d638SMark Brown } 4959f19d638SMark Brown 4968f58de7cSeric miao #ifdef CONFIG_PXA25x 4978f58de7cSeric miao 49875540c1aSeric miao static struct resource pxa25x_resource_pwm0[] = { 49975540c1aSeric miao [0] = { 50075540c1aSeric miao .start = 0x40b00000, 50175540c1aSeric miao .end = 0x40b0000f, 50275540c1aSeric miao .flags = IORESOURCE_MEM, 50375540c1aSeric miao }, 50475540c1aSeric miao }; 50575540c1aSeric miao 50675540c1aSeric miao struct platform_device pxa25x_device_pwm0 = { 50775540c1aSeric miao .name = "pxa25x-pwm", 50875540c1aSeric miao .id = 0, 50975540c1aSeric miao .resource = pxa25x_resource_pwm0, 51075540c1aSeric miao .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0), 51175540c1aSeric miao }; 51275540c1aSeric miao 51375540c1aSeric miao static struct resource pxa25x_resource_pwm1[] = { 51475540c1aSeric miao [0] = { 51575540c1aSeric miao .start = 0x40c00000, 51675540c1aSeric miao .end = 0x40c0000f, 51775540c1aSeric miao .flags = IORESOURCE_MEM, 51875540c1aSeric miao }, 51975540c1aSeric miao }; 52075540c1aSeric miao 52175540c1aSeric miao struct platform_device pxa25x_device_pwm1 = { 52275540c1aSeric miao .name = "pxa25x-pwm", 52375540c1aSeric miao .id = 1, 52475540c1aSeric miao .resource = pxa25x_resource_pwm1, 52575540c1aSeric miao .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1), 52675540c1aSeric miao }; 52775540c1aSeric miao 5288f58de7cSeric miao static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); 5298f58de7cSeric miao 5308f58de7cSeric miao static struct resource pxa25x_resource_ssp[] = { 5318f58de7cSeric miao [0] = { 5328f58de7cSeric miao .start = 0x41000000, 5338f58de7cSeric miao .end = 0x4100001f, 5348f58de7cSeric miao .flags = IORESOURCE_MEM, 5358f58de7cSeric miao }, 5368f58de7cSeric miao [1] = { 5378f58de7cSeric miao .start = IRQ_SSP, 5388f58de7cSeric miao .end = IRQ_SSP, 5398f58de7cSeric miao .flags = IORESOURCE_IRQ, 5408f58de7cSeric miao }, 5418f58de7cSeric miao }; 5428f58de7cSeric miao 5438f58de7cSeric miao struct platform_device pxa25x_device_ssp = { 5448f58de7cSeric miao .name = "pxa25x-ssp", 5458f58de7cSeric miao .id = 0, 5468f58de7cSeric miao .dev = { 5478f58de7cSeric miao .dma_mask = &pxa25x_ssp_dma_mask, 5488f58de7cSeric miao .coherent_dma_mask = DMA_BIT_MASK(32), 5498f58de7cSeric miao }, 5508f58de7cSeric miao .resource = pxa25x_resource_ssp, 5518f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa25x_resource_ssp), 5528f58de7cSeric miao }; 5538f58de7cSeric miao 5548f58de7cSeric miao static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32); 5558f58de7cSeric miao 5568f58de7cSeric miao static struct resource pxa25x_resource_nssp[] = { 5578f58de7cSeric miao [0] = { 5588f58de7cSeric miao .start = 0x41400000, 5598f58de7cSeric miao .end = 0x4140002f, 5608f58de7cSeric miao .flags = IORESOURCE_MEM, 5618f58de7cSeric miao }, 5628f58de7cSeric miao [1] = { 5638f58de7cSeric miao .start = IRQ_NSSP, 5648f58de7cSeric miao .end = IRQ_NSSP, 5658f58de7cSeric miao .flags = IORESOURCE_IRQ, 5668f58de7cSeric miao }, 5678f58de7cSeric miao }; 5688f58de7cSeric miao 5698f58de7cSeric miao struct platform_device pxa25x_device_nssp = { 5708f58de7cSeric miao .name = "pxa25x-nssp", 5718f58de7cSeric miao .id = 1, 5728f58de7cSeric miao .dev = { 5738f58de7cSeric miao .dma_mask = &pxa25x_nssp_dma_mask, 5748f58de7cSeric miao .coherent_dma_mask = DMA_BIT_MASK(32), 5758f58de7cSeric miao }, 5768f58de7cSeric miao .resource = pxa25x_resource_nssp, 5778f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa25x_resource_nssp), 5788f58de7cSeric miao }; 5798f58de7cSeric miao 5808f58de7cSeric miao static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32); 5818f58de7cSeric miao 5828f58de7cSeric miao static struct resource pxa25x_resource_assp[] = { 5838f58de7cSeric miao [0] = { 5848f58de7cSeric miao .start = 0x41500000, 5858f58de7cSeric miao .end = 0x4150002f, 5868f58de7cSeric miao .flags = IORESOURCE_MEM, 5878f58de7cSeric miao }, 5888f58de7cSeric miao [1] = { 5898f58de7cSeric miao .start = IRQ_ASSP, 5908f58de7cSeric miao .end = IRQ_ASSP, 5918f58de7cSeric miao .flags = IORESOURCE_IRQ, 5928f58de7cSeric miao }, 5938f58de7cSeric miao }; 5948f58de7cSeric miao 5958f58de7cSeric miao struct platform_device pxa25x_device_assp = { 5968f58de7cSeric miao /* ASSP is basically equivalent to NSSP */ 5978f58de7cSeric miao .name = "pxa25x-nssp", 5988f58de7cSeric miao .id = 2, 5998f58de7cSeric miao .dev = { 6008f58de7cSeric miao .dma_mask = &pxa25x_assp_dma_mask, 6018f58de7cSeric miao .coherent_dma_mask = DMA_BIT_MASK(32), 6028f58de7cSeric miao }, 6038f58de7cSeric miao .resource = pxa25x_resource_assp, 6048f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa25x_resource_assp), 6058f58de7cSeric miao }; 6068f58de7cSeric miao #endif /* CONFIG_PXA25x */ 6078f58de7cSeric miao 6088f58de7cSeric miao #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 609a4553358SHaojian Zhuang static struct resource pxa27x_resource_camera[] = { 61037320980Seric miao [0] = { 611a4553358SHaojian Zhuang .start = 0x50000000, 612a4553358SHaojian Zhuang .end = 0x50000fff, 61337320980Seric miao .flags = IORESOURCE_MEM, 61437320980Seric miao }, 61537320980Seric miao [1] = { 616a4553358SHaojian Zhuang .start = IRQ_CAMERA, 617a4553358SHaojian Zhuang .end = IRQ_CAMERA, 61837320980Seric miao .flags = IORESOURCE_IRQ, 61937320980Seric miao }, 62037320980Seric miao }; 62137320980Seric miao 622a4553358SHaojian Zhuang static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32); 623a4553358SHaojian Zhuang 624a4553358SHaojian Zhuang static struct platform_device pxa27x_device_camera = { 625a4553358SHaojian Zhuang .name = "pxa27x-camera", 626a4553358SHaojian Zhuang .id = 0, /* This is used to put cameras on this interface */ 627a4553358SHaojian Zhuang .dev = { 628a4553358SHaojian Zhuang .dma_mask = &pxa27x_dma_mask_camera, 629a4553358SHaojian Zhuang .coherent_dma_mask = 0xffffffff, 630a4553358SHaojian Zhuang }, 631a4553358SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa27x_resource_camera), 632a4553358SHaojian Zhuang .resource = pxa27x_resource_camera, 63337320980Seric miao }; 63437320980Seric miao 635a4553358SHaojian Zhuang void __init pxa_set_camera_info(struct pxacamera_platform_data *info) 63637320980Seric miao { 637a4553358SHaojian Zhuang pxa_register_device(&pxa27x_device_camera, info); 63837320980Seric miao } 63937320980Seric miao 640ec68e45bSeric miao static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); 641ec68e45bSeric miao 642ec68e45bSeric miao static struct resource pxa27x_resource_ohci[] = { 643ec68e45bSeric miao [0] = { 644ec68e45bSeric miao .start = 0x4C000000, 645ec68e45bSeric miao .end = 0x4C00ff6f, 646ec68e45bSeric miao .flags = IORESOURCE_MEM, 647ec68e45bSeric miao }, 648ec68e45bSeric miao [1] = { 649ec68e45bSeric miao .start = IRQ_USBH1, 650ec68e45bSeric miao .end = IRQ_USBH1, 651ec68e45bSeric miao .flags = IORESOURCE_IRQ, 652ec68e45bSeric miao }, 653ec68e45bSeric miao }; 654ec68e45bSeric miao 655ec68e45bSeric miao struct platform_device pxa27x_device_ohci = { 656ec68e45bSeric miao .name = "pxa27x-ohci", 657ec68e45bSeric miao .id = -1, 658ec68e45bSeric miao .dev = { 659ec68e45bSeric miao .dma_mask = &pxa27x_ohci_dma_mask, 660ec68e45bSeric miao .coherent_dma_mask = DMA_BIT_MASK(32), 661ec68e45bSeric miao }, 662ec68e45bSeric miao .num_resources = ARRAY_SIZE(pxa27x_resource_ohci), 663ec68e45bSeric miao .resource = pxa27x_resource_ohci, 664ec68e45bSeric miao }; 665ec68e45bSeric miao 666ec68e45bSeric miao void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) 667ec68e45bSeric miao { 668ec68e45bSeric miao pxa_register_device(&pxa27x_device_ohci, info); 669ec68e45bSeric miao } 670a4553358SHaojian Zhuang #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ 671a4553358SHaojian Zhuang 67249ea7fc0SHaojian Zhuang #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 673a4553358SHaojian Zhuang static struct resource pxa27x_resource_keypad[] = { 674a4553358SHaojian Zhuang [0] = { 675a4553358SHaojian Zhuang .start = 0x41500000, 676a4553358SHaojian Zhuang .end = 0x4150004c, 677a4553358SHaojian Zhuang .flags = IORESOURCE_MEM, 678a4553358SHaojian Zhuang }, 679a4553358SHaojian Zhuang [1] = { 680a4553358SHaojian Zhuang .start = IRQ_KEYPAD, 681a4553358SHaojian Zhuang .end = IRQ_KEYPAD, 682a4553358SHaojian Zhuang .flags = IORESOURCE_IRQ, 683a4553358SHaojian Zhuang }, 684a4553358SHaojian Zhuang }; 685a4553358SHaojian Zhuang 686a4553358SHaojian Zhuang struct platform_device pxa27x_device_keypad = { 687a4553358SHaojian Zhuang .name = "pxa27x-keypad", 688a4553358SHaojian Zhuang .id = -1, 689a4553358SHaojian Zhuang .resource = pxa27x_resource_keypad, 690a4553358SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa27x_resource_keypad), 691a4553358SHaojian Zhuang }; 692a4553358SHaojian Zhuang 693a4553358SHaojian Zhuang void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info) 694a4553358SHaojian Zhuang { 695a4553358SHaojian Zhuang pxa_register_device(&pxa27x_device_keypad, info); 696a4553358SHaojian Zhuang } 697ec68e45bSeric miao 6988f58de7cSeric miao static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); 6998f58de7cSeric miao 7008f58de7cSeric miao static struct resource pxa27x_resource_ssp1[] = { 7018f58de7cSeric miao [0] = { 7028f58de7cSeric miao .start = 0x41000000, 7038f58de7cSeric miao .end = 0x4100003f, 7048f58de7cSeric miao .flags = IORESOURCE_MEM, 7058f58de7cSeric miao }, 7068f58de7cSeric miao [1] = { 7078f58de7cSeric miao .start = IRQ_SSP, 7088f58de7cSeric miao .end = IRQ_SSP, 7098f58de7cSeric miao .flags = IORESOURCE_IRQ, 7108f58de7cSeric miao }, 7118f58de7cSeric miao }; 7128f58de7cSeric miao 7138f58de7cSeric miao struct platform_device pxa27x_device_ssp1 = { 7148f58de7cSeric miao .name = "pxa27x-ssp", 7158f58de7cSeric miao .id = 0, 7168f58de7cSeric miao .dev = { 7178f58de7cSeric miao .dma_mask = &pxa27x_ssp1_dma_mask, 7188f58de7cSeric miao .coherent_dma_mask = DMA_BIT_MASK(32), 7198f58de7cSeric miao }, 7208f58de7cSeric miao .resource = pxa27x_resource_ssp1, 7218f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), 7228f58de7cSeric miao }; 7238f58de7cSeric miao 7248f58de7cSeric miao static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32); 7258f58de7cSeric miao 7268f58de7cSeric miao static struct resource pxa27x_resource_ssp2[] = { 7278f58de7cSeric miao [0] = { 7288f58de7cSeric miao .start = 0x41700000, 7298f58de7cSeric miao .end = 0x4170003f, 7308f58de7cSeric miao .flags = IORESOURCE_MEM, 7318f58de7cSeric miao }, 7328f58de7cSeric miao [1] = { 7338f58de7cSeric miao .start = IRQ_SSP2, 7348f58de7cSeric miao .end = IRQ_SSP2, 7358f58de7cSeric miao .flags = IORESOURCE_IRQ, 7368f58de7cSeric miao }, 7378f58de7cSeric miao }; 7388f58de7cSeric miao 7398f58de7cSeric miao struct platform_device pxa27x_device_ssp2 = { 7408f58de7cSeric miao .name = "pxa27x-ssp", 7418f58de7cSeric miao .id = 1, 7428f58de7cSeric miao .dev = { 7438f58de7cSeric miao .dma_mask = &pxa27x_ssp2_dma_mask, 7448f58de7cSeric miao .coherent_dma_mask = DMA_BIT_MASK(32), 7458f58de7cSeric miao }, 7468f58de7cSeric miao .resource = pxa27x_resource_ssp2, 7478f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), 7488f58de7cSeric miao }; 7498f58de7cSeric miao 7508f58de7cSeric miao static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32); 7518f58de7cSeric miao 7528f58de7cSeric miao static struct resource pxa27x_resource_ssp3[] = { 7538f58de7cSeric miao [0] = { 7548f58de7cSeric miao .start = 0x41900000, 7558f58de7cSeric miao .end = 0x4190003f, 7568f58de7cSeric miao .flags = IORESOURCE_MEM, 7578f58de7cSeric miao }, 7588f58de7cSeric miao [1] = { 7598f58de7cSeric miao .start = IRQ_SSP3, 7608f58de7cSeric miao .end = IRQ_SSP3, 7618f58de7cSeric miao .flags = IORESOURCE_IRQ, 7628f58de7cSeric miao }, 7638f58de7cSeric miao }; 7648f58de7cSeric miao 7658f58de7cSeric miao struct platform_device pxa27x_device_ssp3 = { 7668f58de7cSeric miao .name = "pxa27x-ssp", 7678f58de7cSeric miao .id = 2, 7688f58de7cSeric miao .dev = { 7698f58de7cSeric miao .dma_mask = &pxa27x_ssp3_dma_mask, 7708f58de7cSeric miao .coherent_dma_mask = DMA_BIT_MASK(32), 7718f58de7cSeric miao }, 7728f58de7cSeric miao .resource = pxa27x_resource_ssp3, 7738f58de7cSeric miao .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), 7748f58de7cSeric miao }; 7753f3acefbSGuennadi Liakhovetski 77675540c1aSeric miao static struct resource pxa27x_resource_pwm0[] = { 77775540c1aSeric miao [0] = { 77875540c1aSeric miao .start = 0x40b00000, 77975540c1aSeric miao .end = 0x40b0001f, 78075540c1aSeric miao .flags = IORESOURCE_MEM, 78175540c1aSeric miao }, 78275540c1aSeric miao }; 78375540c1aSeric miao 78475540c1aSeric miao struct platform_device pxa27x_device_pwm0 = { 78575540c1aSeric miao .name = "pxa27x-pwm", 78675540c1aSeric miao .id = 0, 78775540c1aSeric miao .resource = pxa27x_resource_pwm0, 78875540c1aSeric miao .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0), 78975540c1aSeric miao }; 79075540c1aSeric miao 79175540c1aSeric miao static struct resource pxa27x_resource_pwm1[] = { 79275540c1aSeric miao [0] = { 79375540c1aSeric miao .start = 0x40c00000, 79475540c1aSeric miao .end = 0x40c0001f, 79575540c1aSeric miao .flags = IORESOURCE_MEM, 79675540c1aSeric miao }, 79775540c1aSeric miao }; 79875540c1aSeric miao 79975540c1aSeric miao struct platform_device pxa27x_device_pwm1 = { 80075540c1aSeric miao .name = "pxa27x-pwm", 80175540c1aSeric miao .id = 1, 80275540c1aSeric miao .resource = pxa27x_resource_pwm1, 80375540c1aSeric miao .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1), 80475540c1aSeric miao }; 80549ea7fc0SHaojian Zhuang #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ 8068f58de7cSeric miao 8078f58de7cSeric miao #ifdef CONFIG_PXA3xx 8088d33b055SBridge Wu static struct resource pxa3xx_resources_mci2[] = { 8098d33b055SBridge Wu [0] = { 8108d33b055SBridge Wu .start = 0x42000000, 8118d33b055SBridge Wu .end = 0x42000fff, 8128d33b055SBridge Wu .flags = IORESOURCE_MEM, 8138d33b055SBridge Wu }, 8148d33b055SBridge Wu [1] = { 8158d33b055SBridge Wu .start = IRQ_MMC2, 8168d33b055SBridge Wu .end = IRQ_MMC2, 8178d33b055SBridge Wu .flags = IORESOURCE_IRQ, 8188d33b055SBridge Wu }, 8198d33b055SBridge Wu }; 8208d33b055SBridge Wu 8218d33b055SBridge Wu struct platform_device pxa3xx_device_mci2 = { 8228d33b055SBridge Wu .name = "pxa2xx-mci", 8238d33b055SBridge Wu .id = 1, 8248d33b055SBridge Wu .dev = { 8258d33b055SBridge Wu .dma_mask = &pxamci_dmamask, 8268d33b055SBridge Wu .coherent_dma_mask = 0xffffffff, 8278d33b055SBridge Wu }, 8288d33b055SBridge Wu .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2), 8298d33b055SBridge Wu .resource = pxa3xx_resources_mci2, 8308d33b055SBridge Wu }; 8318d33b055SBridge Wu 8328d33b055SBridge Wu void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info) 8338d33b055SBridge Wu { 8348d33b055SBridge Wu pxa_register_device(&pxa3xx_device_mci2, info); 8358d33b055SBridge Wu } 8368d33b055SBridge Wu 8375a1f21b1SBridge Wu static struct resource pxa3xx_resources_mci3[] = { 8385a1f21b1SBridge Wu [0] = { 8395a1f21b1SBridge Wu .start = 0x42500000, 8405a1f21b1SBridge Wu .end = 0x42500fff, 8415a1f21b1SBridge Wu .flags = IORESOURCE_MEM, 8425a1f21b1SBridge Wu }, 8435a1f21b1SBridge Wu [1] = { 8445a1f21b1SBridge Wu .start = IRQ_MMC3, 8455a1f21b1SBridge Wu .end = IRQ_MMC3, 8465a1f21b1SBridge Wu .flags = IORESOURCE_IRQ, 8475a1f21b1SBridge Wu }, 8485a1f21b1SBridge Wu }; 8495a1f21b1SBridge Wu 8505a1f21b1SBridge Wu struct platform_device pxa3xx_device_mci3 = { 8515a1f21b1SBridge Wu .name = "pxa2xx-mci", 8525a1f21b1SBridge Wu .id = 2, 8535a1f21b1SBridge Wu .dev = { 8545a1f21b1SBridge Wu .dma_mask = &pxamci_dmamask, 8555a1f21b1SBridge Wu .coherent_dma_mask = 0xffffffff, 8565a1f21b1SBridge Wu }, 8575a1f21b1SBridge Wu .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3), 8585a1f21b1SBridge Wu .resource = pxa3xx_resources_mci3, 8595a1f21b1SBridge Wu }; 8605a1f21b1SBridge Wu 8615a1f21b1SBridge Wu void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) 8625a1f21b1SBridge Wu { 8635a1f21b1SBridge Wu pxa_register_device(&pxa3xx_device_mci3, info); 8645a1f21b1SBridge Wu } 8655a1f21b1SBridge Wu 866a4553358SHaojian Zhuang static struct resource pxa3xx_resources_gcu[] = { 867a4553358SHaojian Zhuang { 868a4553358SHaojian Zhuang .start = 0x54000000, 869a4553358SHaojian Zhuang .end = 0x54000fff, 870a4553358SHaojian Zhuang .flags = IORESOURCE_MEM, 871a4553358SHaojian Zhuang }, 872a4553358SHaojian Zhuang { 873a4553358SHaojian Zhuang .start = IRQ_GCU, 874a4553358SHaojian Zhuang .end = IRQ_GCU, 875a4553358SHaojian Zhuang .flags = IORESOURCE_IRQ, 876a4553358SHaojian Zhuang }, 877a4553358SHaojian Zhuang }; 878a4553358SHaojian Zhuang 879a4553358SHaojian Zhuang static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32); 880a4553358SHaojian Zhuang 881a4553358SHaojian Zhuang struct platform_device pxa3xx_device_gcu = { 882a4553358SHaojian Zhuang .name = "pxa3xx-gcu", 883a4553358SHaojian Zhuang .id = -1, 884a4553358SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu), 885a4553358SHaojian Zhuang .resource = pxa3xx_resources_gcu, 886a4553358SHaojian Zhuang .dev = { 887a4553358SHaojian Zhuang .dma_mask = &pxa3xx_gcu_dmamask, 888a4553358SHaojian Zhuang .coherent_dma_mask = 0xffffffff, 889a4553358SHaojian Zhuang }, 890a4553358SHaojian Zhuang }; 891a4553358SHaojian Zhuang 892a4553358SHaojian Zhuang #endif /* CONFIG_PXA3xx */ 893a4553358SHaojian Zhuang 89449ea7fc0SHaojian Zhuang #if defined(CONFIG_PXA3xx) 895a4553358SHaojian Zhuang static struct resource pxa3xx_resources_i2c_power[] = { 896a4553358SHaojian Zhuang { 897a4553358SHaojian Zhuang .start = 0x40f500c0, 898a4553358SHaojian Zhuang .end = 0x40f500d3, 899a4553358SHaojian Zhuang .flags = IORESOURCE_MEM, 900a4553358SHaojian Zhuang }, { 901a4553358SHaojian Zhuang .start = IRQ_PWRI2C, 902a4553358SHaojian Zhuang .end = IRQ_PWRI2C, 903a4553358SHaojian Zhuang .flags = IORESOURCE_IRQ, 904a4553358SHaojian Zhuang }, 905a4553358SHaojian Zhuang }; 906a4553358SHaojian Zhuang 907a4553358SHaojian Zhuang struct platform_device pxa3xx_device_i2c_power = { 908a4553358SHaojian Zhuang .name = "pxa3xx-pwri2c", 909a4553358SHaojian Zhuang .id = 1, 910a4553358SHaojian Zhuang .resource = pxa3xx_resources_i2c_power, 911a4553358SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power), 912a4553358SHaojian Zhuang }; 913a4553358SHaojian Zhuang 9149ae819a8SEric Miao static struct resource pxa3xx_resources_nand[] = { 9159ae819a8SEric Miao [0] = { 9169ae819a8SEric Miao .start = 0x43100000, 9179ae819a8SEric Miao .end = 0x43100053, 9189ae819a8SEric Miao .flags = IORESOURCE_MEM, 9199ae819a8SEric Miao }, 9209ae819a8SEric Miao [1] = { 9219ae819a8SEric Miao .start = IRQ_NAND, 9229ae819a8SEric Miao .end = IRQ_NAND, 9239ae819a8SEric Miao .flags = IORESOURCE_IRQ, 9249ae819a8SEric Miao }, 9259ae819a8SEric Miao }; 9269ae819a8SEric Miao 9279ae819a8SEric Miao static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32); 9289ae819a8SEric Miao 9299ae819a8SEric Miao struct platform_device pxa3xx_device_nand = { 9309ae819a8SEric Miao .name = "pxa3xx-nand", 9319ae819a8SEric Miao .id = -1, 9329ae819a8SEric Miao .dev = { 9339ae819a8SEric Miao .dma_mask = &pxa3xx_nand_dma_mask, 9349ae819a8SEric Miao .coherent_dma_mask = DMA_BIT_MASK(32), 9359ae819a8SEric Miao }, 9369ae819a8SEric Miao .num_resources = ARRAY_SIZE(pxa3xx_resources_nand), 9379ae819a8SEric Miao .resource = pxa3xx_resources_nand, 9389ae819a8SEric Miao }; 9399ae819a8SEric Miao 9409ae819a8SEric Miao void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info) 9419ae819a8SEric Miao { 9429ae819a8SEric Miao pxa_register_device(&pxa3xx_device_nand, info); 9439ae819a8SEric Miao } 9441ff2c33eSDaniel Mack 945a4553358SHaojian Zhuang static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32); 946a4553358SHaojian Zhuang 947a4553358SHaojian Zhuang static struct resource pxa3xx_resource_ssp4[] = { 948a4553358SHaojian Zhuang [0] = { 949a4553358SHaojian Zhuang .start = 0x41a00000, 950a4553358SHaojian Zhuang .end = 0x41a0003f, 9511ff2c33eSDaniel Mack .flags = IORESOURCE_MEM, 9521ff2c33eSDaniel Mack }, 953a4553358SHaojian Zhuang [1] = { 954a4553358SHaojian Zhuang .start = IRQ_SSP4, 955a4553358SHaojian Zhuang .end = IRQ_SSP4, 9561ff2c33eSDaniel Mack .flags = IORESOURCE_IRQ, 9571ff2c33eSDaniel Mack }, 9581ff2c33eSDaniel Mack }; 9591ff2c33eSDaniel Mack 9600da0e227SDaniel Mack /* 9610da0e227SDaniel Mack * PXA3xx SSP is basically equivalent to PXA27x. 9620da0e227SDaniel Mack * However, we need to register the device by the correct name in order to 9630da0e227SDaniel Mack * make the driver set the correct internal type, hence we provide specific 9640da0e227SDaniel Mack * platform_devices for each of them. 9650da0e227SDaniel Mack */ 9660da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp1 = { 9670da0e227SDaniel Mack .name = "pxa3xx-ssp", 9680da0e227SDaniel Mack .id = 0, 9690da0e227SDaniel Mack .dev = { 9700da0e227SDaniel Mack .dma_mask = &pxa27x_ssp1_dma_mask, 9710da0e227SDaniel Mack .coherent_dma_mask = DMA_BIT_MASK(32), 9720da0e227SDaniel Mack }, 9730da0e227SDaniel Mack .resource = pxa27x_resource_ssp1, 9740da0e227SDaniel Mack .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), 9750da0e227SDaniel Mack }; 9760da0e227SDaniel Mack 9770da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp2 = { 9780da0e227SDaniel Mack .name = "pxa3xx-ssp", 9790da0e227SDaniel Mack .id = 1, 9800da0e227SDaniel Mack .dev = { 9810da0e227SDaniel Mack .dma_mask = &pxa27x_ssp2_dma_mask, 9820da0e227SDaniel Mack .coherent_dma_mask = DMA_BIT_MASK(32), 9830da0e227SDaniel Mack }, 9840da0e227SDaniel Mack .resource = pxa27x_resource_ssp2, 9850da0e227SDaniel Mack .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), 9860da0e227SDaniel Mack }; 9870da0e227SDaniel Mack 9880da0e227SDaniel Mack struct platform_device pxa3xx_device_ssp3 = { 9890da0e227SDaniel Mack .name = "pxa3xx-ssp", 9900da0e227SDaniel Mack .id = 2, 9910da0e227SDaniel Mack .dev = { 9920da0e227SDaniel Mack .dma_mask = &pxa27x_ssp3_dma_mask, 9930da0e227SDaniel Mack .coherent_dma_mask = DMA_BIT_MASK(32), 9940da0e227SDaniel Mack }, 9950da0e227SDaniel Mack .resource = pxa27x_resource_ssp3, 9960da0e227SDaniel Mack .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), 9970da0e227SDaniel Mack }; 9980da0e227SDaniel Mack 999a4553358SHaojian Zhuang struct platform_device pxa3xx_device_ssp4 = { 10000da0e227SDaniel Mack .name = "pxa3xx-ssp", 1001a4553358SHaojian Zhuang .id = 3, 1002a4553358SHaojian Zhuang .dev = { 1003a4553358SHaojian Zhuang .dma_mask = &pxa3xx_ssp4_dma_mask, 1004a4553358SHaojian Zhuang .coherent_dma_mask = DMA_BIT_MASK(32), 1005a4553358SHaojian Zhuang }, 1006a4553358SHaojian Zhuang .resource = pxa3xx_resource_ssp4, 1007a4553358SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), 1008a4553358SHaojian Zhuang }; 100949ea7fc0SHaojian Zhuang #endif /* CONFIG_PXA3xx */ 1010e172274cSGuennadi Liakhovetski 1011157d2644SHaojian Zhuang struct resource pxa_resource_gpio[] = { 1012157d2644SHaojian Zhuang { 1013157d2644SHaojian Zhuang .start = 0x40e00000, 1014157d2644SHaojian Zhuang .end = 0x40e0ffff, 1015157d2644SHaojian Zhuang .flags = IORESOURCE_MEM, 1016157d2644SHaojian Zhuang }, { 1017157d2644SHaojian Zhuang .start = IRQ_GPIO0, 1018157d2644SHaojian Zhuang .end = IRQ_GPIO0, 1019157d2644SHaojian Zhuang .name = "gpio0", 1020157d2644SHaojian Zhuang .flags = IORESOURCE_IRQ, 1021157d2644SHaojian Zhuang }, { 1022157d2644SHaojian Zhuang .start = IRQ_GPIO1, 1023157d2644SHaojian Zhuang .end = IRQ_GPIO1, 1024157d2644SHaojian Zhuang .name = "gpio1", 1025157d2644SHaojian Zhuang .flags = IORESOURCE_IRQ, 1026157d2644SHaojian Zhuang }, { 1027157d2644SHaojian Zhuang .start = IRQ_GPIO_2_x, 1028157d2644SHaojian Zhuang .end = IRQ_GPIO_2_x, 1029157d2644SHaojian Zhuang .name = "gpio_mux", 1030157d2644SHaojian Zhuang .flags = IORESOURCE_IRQ, 1031157d2644SHaojian Zhuang }, 1032157d2644SHaojian Zhuang }; 1033157d2644SHaojian Zhuang 10342cab0292SHaojian Zhuang struct platform_device pxa25x_device_gpio = { 10352cab0292SHaojian Zhuang #ifdef CONFIG_CPU_PXA26x 10362cab0292SHaojian Zhuang .name = "pxa26x-gpio", 10372cab0292SHaojian Zhuang #else 10382cab0292SHaojian Zhuang .name = "pxa25x-gpio", 10392cab0292SHaojian Zhuang #endif 10402cab0292SHaojian Zhuang .id = -1, 10412cab0292SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa_resource_gpio), 10422cab0292SHaojian Zhuang .resource = pxa_resource_gpio, 10432cab0292SHaojian Zhuang }; 10442cab0292SHaojian Zhuang 10452cab0292SHaojian Zhuang struct platform_device pxa27x_device_gpio = { 10462cab0292SHaojian Zhuang .name = "pxa27x-gpio", 10472cab0292SHaojian Zhuang .id = -1, 10482cab0292SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa_resource_gpio), 10492cab0292SHaojian Zhuang .resource = pxa_resource_gpio, 10502cab0292SHaojian Zhuang }; 10512cab0292SHaojian Zhuang 10522cab0292SHaojian Zhuang struct platform_device pxa3xx_device_gpio = { 10532cab0292SHaojian Zhuang .name = "pxa3xx-gpio", 10542cab0292SHaojian Zhuang .id = -1, 10552cab0292SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa_resource_gpio), 10562cab0292SHaojian Zhuang .resource = pxa_resource_gpio, 10572cab0292SHaojian Zhuang }; 10582cab0292SHaojian Zhuang 10592cab0292SHaojian Zhuang struct platform_device pxa93x_device_gpio = { 10602cab0292SHaojian Zhuang .name = "pxa93x-gpio", 1061157d2644SHaojian Zhuang .id = -1, 1062157d2644SHaojian Zhuang .num_resources = ARRAY_SIZE(pxa_resource_gpio), 1063157d2644SHaojian Zhuang .resource = pxa_resource_gpio, 1064157d2644SHaojian Zhuang }; 1065157d2644SHaojian Zhuang 1066e172274cSGuennadi Liakhovetski /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1067e172274cSGuennadi Liakhovetski * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1068e172274cSGuennadi Liakhovetski void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) 1069e172274cSGuennadi Liakhovetski { 1070e172274cSGuennadi Liakhovetski struct platform_device *pd; 1071e172274cSGuennadi Liakhovetski 1072e172274cSGuennadi Liakhovetski pd = platform_device_alloc("pxa2xx-spi", id); 1073e172274cSGuennadi Liakhovetski if (pd == NULL) { 1074e172274cSGuennadi Liakhovetski printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n", 1075e172274cSGuennadi Liakhovetski id); 1076e172274cSGuennadi Liakhovetski return; 1077e172274cSGuennadi Liakhovetski } 1078e172274cSGuennadi Liakhovetski 1079e172274cSGuennadi Liakhovetski pd->dev.platform_data = info; 1080e172274cSGuennadi Liakhovetski platform_device_add(pd); 1081e172274cSGuennadi Liakhovetski } 10824be0856fSRobert Jarzmik 10834be0856fSRobert Jarzmik static struct resource pxa_dma_resource[] = { 10844be0856fSRobert Jarzmik [0] = { 10854be0856fSRobert Jarzmik .start = 0x40000000, 10864be0856fSRobert Jarzmik .end = 0x4000ffff, 10874be0856fSRobert Jarzmik .flags = IORESOURCE_MEM, 10884be0856fSRobert Jarzmik }, 10894be0856fSRobert Jarzmik [1] = { 10904be0856fSRobert Jarzmik .start = IRQ_DMA, 10914be0856fSRobert Jarzmik .end = IRQ_DMA, 10924be0856fSRobert Jarzmik .flags = IORESOURCE_IRQ, 10934be0856fSRobert Jarzmik }, 10944be0856fSRobert Jarzmik }; 10954be0856fSRobert Jarzmik 10964be0856fSRobert Jarzmik static u64 pxadma_dmamask = 0xffffffffUL; 10974be0856fSRobert Jarzmik 10984be0856fSRobert Jarzmik static struct platform_device pxa2xx_pxa_dma = { 10994be0856fSRobert Jarzmik .name = "pxa-dma", 11004be0856fSRobert Jarzmik .id = 0, 11014be0856fSRobert Jarzmik .dev = { 11024be0856fSRobert Jarzmik .dma_mask = &pxadma_dmamask, 11034be0856fSRobert Jarzmik .coherent_dma_mask = 0xffffffff, 11044be0856fSRobert Jarzmik }, 11054be0856fSRobert Jarzmik .num_resources = ARRAY_SIZE(pxa_dma_resource), 11064be0856fSRobert Jarzmik .resource = pxa_dma_resource, 11074be0856fSRobert Jarzmik }; 11084be0856fSRobert Jarzmik 11091da10c17SRobert Jarzmik void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata) 11104be0856fSRobert Jarzmik { 11111da10c17SRobert Jarzmik pxa_register_device(&pxa2xx_pxa_dma, dma_pdata); 11124be0856fSRobert Jarzmik } 1113