1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * OMAP44xx PRM instance offset macros 4 * 5 * Copyright (C) 2009-2011 Texas Instruments, Inc. 6 * Copyright (C) 2009-2010 Nokia Corporation 7 * 8 * Paul Walmsley (paul@pwsan.com) 9 * Rajendra Nayak (rnayak@ti.com) 10 * Benoit Cousson (b-cousson@ti.com) 11 * 12 * This file is automatically generated from the OMAP hardware databases. 13 * We respectfully ask that any modifications to this file be coordinated 14 * with the public linux-omap@vger.kernel.org mailing list and the 15 * authors above to ensure that the autogeneration scripts are kept 16 * up-to-date with the file contents. 17 * 18 * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX", 19 * or "OMAP4430". 20 */ 21 22 #ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H 23 #define __ARCH_ARM_MACH_OMAP2_PRM44XX_H 24 25 #include "prm44xx_54xx.h" 26 #include "prm.h" 27 28 #define OMAP4430_PRM_BASE 0x4a306000 29 30 #define OMAP44XX_PRM_REGADDR(inst, reg) \ 31 OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) 32 33 34 /* PRM instances */ 35 #define OMAP4430_PRM_OCP_SOCKET_INST 0x0000 36 #define OMAP4430_PRM_CKGEN_INST 0x0100 37 #define OMAP4430_PRM_MPU_INST 0x0300 38 #define OMAP4430_PRM_TESLA_INST 0x0400 39 #define OMAP4430_PRM_ABE_INST 0x0500 40 #define OMAP4430_PRM_ALWAYS_ON_INST 0x0600 41 #define OMAP4430_PRM_CORE_INST 0x0700 42 #define OMAP4430_PRM_IVAHD_INST 0x0f00 43 #define OMAP4430_PRM_CAM_INST 0x1000 44 #define OMAP4430_PRM_DSS_INST 0x1100 45 #define OMAP4430_PRM_GFX_INST 0x1200 46 #define OMAP4430_PRM_L3INIT_INST 0x1300 47 #define OMAP4430_PRM_L4PER_INST 0x1400 48 #define OMAP4430_PRM_CEFUSE_INST 0x1600 49 #define OMAP4430_PRM_WKUP_INST 0x1700 50 #define OMAP4430_PRM_WKUP_CM_INST 0x1800 51 #define OMAP4430_PRM_EMU_INST 0x1900 52 #define OMAP4430_PRM_EMU_CM_INST 0x1a00 53 #define OMAP4430_PRM_DEVICE_INST 0x1b00 54 #define OMAP4430_PRM_INSTR_INST 0x1f00 55 56 /* PRM clockdomain register offsets (from instance start) */ 57 #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 58 #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 59 60 /* OMAP4 specific register offsets */ 61 #define OMAP4_RM_RSTCTRL 0x0000 62 #define OMAP4_RM_RSTST 0x0004 63 #define OMAP4_RM_RSTTIME 0x0008 64 #define OMAP4_PM_PWSTCTRL 0x0000 65 #define OMAP4_PM_PWSTST 0x0004 66 67 68 /* PRM */ 69 70 /* PRM.OCP_SOCKET_PRM register offsets */ 71 #define OMAP4_REVISION_PRM_OFFSET 0x0000 72 #define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0000) 73 #define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010 74 #define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0010) 75 #define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014 76 #define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0014) 77 #define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018 78 #define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0018) 79 #define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c 80 #define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x001c) 81 #define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020 82 #define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0020) 83 #define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028 84 #define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0028) 85 #define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030 86 #define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0030) 87 #define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038 88 #define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0038) 89 #define OMAP4_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040 90 #define OMAP4430_CM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0040) 91 92 /* PRM.CKGEN_PRM register offsets */ 93 #define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000 94 #define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0000) 95 #define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008 96 #define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0008) 97 #define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c 98 #define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x000c) 99 #define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010 100 #define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0010) 101 102 /* PRM.MPU_PRM register offsets */ 103 #define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000 104 #define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0000) 105 #define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004 106 #define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0004) 107 #define OMAP4_RM_MPU_RSTST_OFFSET 0x0014 108 #define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0014) 109 #define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024 110 #define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0024) 111 112 /* PRM.TESLA_PRM register offsets */ 113 #define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000 114 #define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0000) 115 #define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004 116 #define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0004) 117 #define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010 118 #define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0010) 119 #define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014 120 #define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0014) 121 #define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024 122 #define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0024) 123 124 /* PRM.ABE_PRM register offsets */ 125 #define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000 126 #define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0000) 127 #define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004 128 #define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0004) 129 #define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c 130 #define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x002c) 131 #define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030 132 #define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0030) 133 #define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034 134 #define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0034) 135 #define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038 136 #define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0038) 137 #define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c 138 #define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x003c) 139 #define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040 140 #define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0040) 141 #define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044 142 #define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0044) 143 #define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048 144 #define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0048) 145 #define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c 146 #define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x004c) 147 #define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050 148 #define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0050) 149 #define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054 150 #define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0054) 151 #define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058 152 #define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0058) 153 #define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c 154 #define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x005c) 155 #define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060 156 #define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0060) 157 #define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064 158 #define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0064) 159 #define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068 160 #define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0068) 161 #define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c 162 #define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x006c) 163 #define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070 164 #define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0070) 165 #define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074 166 #define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0074) 167 #define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078 168 #define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0078) 169 #define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c 170 #define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x007c) 171 #define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080 172 #define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0080) 173 #define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084 174 #define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0084) 175 #define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088 176 #define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0088) 177 #define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c 178 #define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x008c) 179 180 /* PRM.ALWAYS_ON_PRM register offsets */ 181 #define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024 182 #define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0024) 183 #define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028 184 #define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0028) 185 #define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c 186 #define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x002c) 187 #define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030 188 #define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0030) 189 #define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034 190 #define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0034) 191 #define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038 192 #define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0038) 193 #define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c 194 #define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x003c) 195 196 /* PRM.CORE_PRM register offsets */ 197 #define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000 198 #define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0000) 199 #define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004 200 #define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0004) 201 #define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024 202 #define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0024) 203 #define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124 204 #define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0124) 205 #define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c 206 #define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x012c) 207 #define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134 208 #define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0134) 209 #define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210 210 #define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0210) 211 #define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214 212 #define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0214) 213 #define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224 214 #define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0224) 215 #define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324 216 #define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0324) 217 #define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424 218 #define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0424) 219 #define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c 220 #define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x042c) 221 #define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434 222 #define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0434) 223 #define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c 224 #define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x043c) 225 #define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444 226 #define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0444) 227 #define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454 228 #define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0454) 229 #define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c 230 #define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x045c) 231 #define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464 232 #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) 233 #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 234 #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) 235 #define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c 236 #define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) 237 #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 238 #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) 239 #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 240 #define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0624) 241 #define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c 242 #define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x062c) 243 #define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634 244 #define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0634) 245 #define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c 246 #define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x063c) 247 #define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724 248 #define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0724) 249 #define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c 250 #define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x072c) 251 #define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744 252 #define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0744) 253 254 /* PRM.IVAHD_PRM register offsets */ 255 #define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000 256 #define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0000) 257 #define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004 258 #define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0004) 259 #define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010 260 #define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0010) 261 #define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014 262 #define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0014) 263 #define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024 264 #define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0024) 265 #define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c 266 #define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x002c) 267 268 /* PRM.CAM_PRM register offsets */ 269 #define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000 270 #define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0000) 271 #define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004 272 #define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0004) 273 #define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024 274 #define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0024) 275 #define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c 276 #define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x002c) 277 278 /* PRM.DSS_PRM register offsets */ 279 #define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000 280 #define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0000) 281 #define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004 282 #define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0004) 283 #define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020 284 #define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0020) 285 #define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024 286 #define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0024) 287 #define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c 288 #define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x002c) 289 290 /* PRM.GFX_PRM register offsets */ 291 #define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000 292 #define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0000) 293 #define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004 294 #define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0004) 295 #define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024 296 #define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0024) 297 298 /* PRM.L3INIT_PRM register offsets */ 299 #define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000 300 #define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0000) 301 #define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004 302 #define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0004) 303 #define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028 304 #define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0028) 305 #define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c 306 #define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x002c) 307 #define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030 308 #define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0030) 309 #define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034 310 #define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0034) 311 #define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038 312 #define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0038) 313 #define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c 314 #define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x003c) 315 #define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040 316 #define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0040) 317 #define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044 318 #define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0044) 319 #define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058 320 #define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0058) 321 #define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c 322 #define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x005c) 323 #define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060 324 #define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0060) 325 #define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064 326 #define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0064) 327 #define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068 328 #define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0068) 329 #define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c 330 #define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x006c) 331 #define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c 332 #define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x007c) 333 #define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084 334 #define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0084) 335 #define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088 336 #define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0088) 337 #define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c 338 #define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x008c) 339 #define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094 340 #define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0094) 341 #define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098 342 #define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0098) 343 #define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c 344 #define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x009c) 345 #define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac 346 #define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00ac) 347 #define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0 348 #define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c0) 349 #define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4 350 #define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c4) 351 #define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8 352 #define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c8) 353 #define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc 354 #define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00cc) 355 #define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0 356 #define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d0) 357 #define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4 358 #define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d4) 359 #define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4 360 #define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00e4) 361 362 /* PRM.L4PER_PRM register offsets */ 363 #define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000 364 #define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0000) 365 #define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004 366 #define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0004) 367 #define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024 368 #define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0024) 369 #define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028 370 #define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0028) 371 #define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c 372 #define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x002c) 373 #define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030 374 #define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0030) 375 #define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034 376 #define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0034) 377 #define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038 378 #define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0038) 379 #define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c 380 #define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x003c) 381 #define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040 382 #define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0040) 383 #define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044 384 #define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0044) 385 #define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048 386 #define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0048) 387 #define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c 388 #define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x004c) 389 #define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050 390 #define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0050) 391 #define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054 392 #define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0054) 393 #define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c 394 #define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x005c) 395 #define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060 396 #define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0060) 397 #define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064 398 #define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0064) 399 #define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068 400 #define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0068) 401 #define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c 402 #define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x006c) 403 #define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070 404 #define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0070) 405 #define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074 406 #define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0074) 407 #define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078 408 #define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0078) 409 #define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c 410 #define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x007c) 411 #define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080 412 #define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0080) 413 #define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084 414 #define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0084) 415 #define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c 416 #define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x008c) 417 #define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090 418 #define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0090) 419 #define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094 420 #define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0094) 421 #define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098 422 #define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0098) 423 #define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c 424 #define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x009c) 425 #define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0 426 #define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a0) 427 #define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4 428 #define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a4) 429 #define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8 430 #define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a8) 431 #define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac 432 #define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ac) 433 #define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0 434 #define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b0) 435 #define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4 436 #define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b4) 437 #define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8 438 #define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b8) 439 #define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc 440 #define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00bc) 441 #define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0 442 #define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00c0) 443 #define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0 444 #define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d0) 445 #define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4 446 #define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d4) 447 #define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8 448 #define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d8) 449 #define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc 450 #define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00dc) 451 #define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0 452 #define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e0) 453 #define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4 454 #define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e4) 455 #define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec 456 #define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ec) 457 #define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0 458 #define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f0) 459 #define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4 460 #define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f4) 461 #define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8 462 #define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f8) 463 #define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc 464 #define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00fc) 465 #define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100 466 #define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0100) 467 #define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104 468 #define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0104) 469 #define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108 470 #define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0108) 471 #define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c 472 #define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x010c) 473 #define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120 474 #define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0120) 475 #define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124 476 #define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0124) 477 #define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128 478 #define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0128) 479 #define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c 480 #define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x012c) 481 #define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134 482 #define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0134) 483 #define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138 484 #define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0138) 485 #define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c 486 #define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x013c) 487 #define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140 488 #define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0140) 489 #define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144 490 #define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0144) 491 #define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148 492 #define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0148) 493 #define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c 494 #define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x014c) 495 #define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150 496 #define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0150) 497 #define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154 498 #define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0154) 499 #define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158 500 #define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0158) 501 #define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c 502 #define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x015c) 503 #define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160 504 #define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0160) 505 #define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164 506 #define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0164) 507 #define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168 508 #define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0168) 509 #define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c 510 #define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x016c) 511 #define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4 512 #define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01a4) 513 #define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac 514 #define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01ac) 515 #define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4 516 #define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01b4) 517 #define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc 518 #define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01bc) 519 #define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4 520 #define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01c4) 521 #define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc 522 #define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01cc) 523 #define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc 524 #define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01dc) 525 526 /* PRM.CEFUSE_PRM register offsets */ 527 #define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000 528 #define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0000) 529 #define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004 530 #define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0004) 531 #define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024 532 #define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0024) 533 534 /* PRM.WKUP_PRM register offsets */ 535 #define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024 536 #define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0024) 537 #define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c 538 #define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x002c) 539 #define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030 540 #define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0030) 541 #define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034 542 #define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0034) 543 #define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038 544 #define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0038) 545 #define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c 546 #define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x003c) 547 #define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040 548 #define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0040) 549 #define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044 550 #define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0044) 551 #define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048 552 #define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0048) 553 #define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c 554 #define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x004c) 555 #define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054 556 #define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0054) 557 #define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058 558 #define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0058) 559 #define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c 560 #define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x005c) 561 #define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064 562 #define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0064) 563 #define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078 564 #define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0078) 565 #define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c 566 #define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x007c) 567 #define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080 568 #define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0080) 569 #define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084 570 #define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0084) 571 572 /* PRM.WKUP_CM register offsets */ 573 #define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000 574 #define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0000) 575 #define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020 576 #define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0020) 577 #define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028 578 #define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0028) 579 #define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030 580 #define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0030) 581 #define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038 582 #define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0038) 583 #define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040 584 #define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0040) 585 #define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048 586 #define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0048) 587 #define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050 588 #define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0050) 589 #define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058 590 #define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0058) 591 #define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060 592 #define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0060) 593 #define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078 594 #define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0078) 595 #define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080 596 #define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0080) 597 #define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088 598 #define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0088) 599 600 /* PRM.EMU_PRM register offsets */ 601 #define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000 602 #define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0000) 603 #define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004 604 #define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0004) 605 #define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024 606 #define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0024) 607 608 /* PRM.EMU_CM register offsets */ 609 #define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000 610 #define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0000) 611 #define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008 612 #define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0008) 613 #define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020 614 #define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0020) 615 616 /* PRM.DEVICE_PRM register offsets */ 617 #define OMAP4_PRM_RSTCTRL_OFFSET 0x0000 618 #define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0000) 619 #define OMAP4_PRM_RSTST_OFFSET 0x0004 620 #define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0004) 621 #define OMAP4_PRM_RSTTIME_OFFSET 0x0008 622 #define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0008) 623 #define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c 624 #define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x000c) 625 #define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010 626 #define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0010) 627 #define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014 628 #define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0014) 629 #define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018 630 #define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0018) 631 #define OMAP4_PRM_IO_COUNT_OFFSET 0x001c 632 #define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x001c) 633 #define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020 634 #define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0020) 635 #define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024 636 #define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0024) 637 #define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028 638 #define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0028) 639 #define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c 640 #define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x002c) 641 #define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030 642 #define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0030) 643 #define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034 644 #define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0034) 645 #define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038 646 #define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0038) 647 #define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c 648 #define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x003c) 649 #define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040 650 #define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0040) 651 #define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044 652 #define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0044) 653 #define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048 654 #define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0048) 655 #define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c 656 #define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x004c) 657 #define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050 658 #define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0050) 659 #define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054 660 #define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0054) 661 #define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058 662 #define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0058) 663 #define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c 664 #define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x005c) 665 #define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060 666 #define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0060) 667 #define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064 668 #define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0064) 669 #define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068 670 #define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0068) 671 #define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c 672 #define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x006c) 673 #define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070 674 #define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0070) 675 #define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074 676 #define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0074) 677 #define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078 678 #define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0078) 679 #define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c 680 #define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x007c) 681 #define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080 682 #define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0080) 683 #define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084 684 #define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0084) 685 #define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088 686 #define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0088) 687 #define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c 688 #define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x008c) 689 #define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090 690 #define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0090) 691 #define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094 692 #define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0094) 693 #define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098 694 #define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0098) 695 #define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c 696 #define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x009c) 697 #define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0 698 #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) 699 #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 700 #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) 701 #define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 702 #define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) 703 #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac 704 #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) 705 #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 706 #define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b0) 707 #define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4 708 #define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b4) 709 #define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8 710 #define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b8) 711 #define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc 712 #define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00bc) 713 #define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0 714 #define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c0) 715 #define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4 716 #define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c4) 717 #define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8 718 #define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c8) 719 #define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc 720 #define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00cc) 721 #define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0 722 #define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d0) 723 #define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4 724 #define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d4) 725 #define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8 726 #define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d8) 727 #define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc 728 #define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00dc) 729 #define OMAP4_PRM_LDO_BANDGAP_SETUP_OFFSET 0x00e0 730 #define OMAP4430_PRM_LDO_BANDGAP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e0) 731 #define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4 732 #define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e4) 733 #define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8 734 #define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e8) 735 #define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec 736 #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) 737 #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 738 #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) 739 #define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 740 #define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) 741 #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 742 #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) 743 744 #endif 745