xref: /linux/arch/arm/mach-omap2/prm33xx.h (revision fd7d598270724cc787982ea48bbe17ad383a8b7f)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * AM33XX PRM instance offset macros
4  *
5  * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
6  */
7 
8 #ifndef __ARCH_ARM_MACH_OMAP2_PRM33XX_H
9 #define __ARCH_ARM_MACH_OMAP2_PRM33XX_H
10 
11 #include "prcm-common.h"
12 #include "prm.h"
13 
14 #define AM33XX_PRM_BASE               0x44E00000
15 
16 #define AM33XX_PRM_REGADDR(inst, reg)                         \
17 	AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRM_BASE + (inst) + (reg))
18 
19 
20 /* PRM instances */
21 #define AM33XX_PRM_OCP_SOCKET_MOD	0x0B00
22 #define AM33XX_PRM_PER_MOD		0x0C00
23 #define AM33XX_PRM_WKUP_MOD		0x0D00
24 #define AM33XX_PRM_MPU_MOD		0x0E00
25 #define AM33XX_PRM_DEVICE_MOD		0x0F00
26 #define AM33XX_PRM_RTC_MOD		0x1000
27 #define AM33XX_PRM_GFX_MOD		0x1100
28 #define AM33XX_PRM_CEFUSE_MOD		0x1200
29 
30 /* PRM.PER_PRM register offsets */
31 #define AM33XX_PM_PER_PWRSTST_OFFSET		0x0008
32 #define AM33XX_PM_PER_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008)
33 #define AM33XX_PM_PER_PWRSTCTRL_OFFSET		0x000c
34 #define AM33XX_PM_PER_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x000c)
35 
36 /* PRM.WKUP_PRM register offsets */
37 #define AM33XX_PM_WKUP_PWRSTCTRL_OFFSET		0x0004
38 #define AM33XX_PM_WKUP_PWRSTCTRL		AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0004)
39 #define AM33XX_PM_WKUP_PWRSTST_OFFSET		0x0008
40 #define AM33XX_PM_WKUP_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_WKUP_MOD, 0x0008)
41 
42 /* PRM.MPU_PRM register offsets */
43 #define AM33XX_PM_MPU_PWRSTCTRL_OFFSET		0x0000
44 #define AM33XX_PM_MPU_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0000)
45 #define AM33XX_PM_MPU_PWRSTST_OFFSET		0x0004
46 #define AM33XX_PM_MPU_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_MPU_MOD, 0x0004)
47 
48 /* PRM.DEVICE_PRM register offsets */
49 #define AM33XX_PRM_RSTCTRL_OFFSET		0x0000
50 #define AM33XX_PRM_RSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_DEVICE_MOD, 0x0000)
51 
52 /* PRM.RTC_PRM register offsets */
53 #define AM33XX_PM_RTC_PWRSTCTRL_OFFSET		0x0000
54 #define AM33XX_PM_RTC_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0000)
55 #define AM33XX_PM_RTC_PWRSTST_OFFSET		0x0004
56 #define AM33XX_PM_RTC_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_RTC_MOD, 0x0004)
57 
58 /* PRM.GFX_PRM register offsets */
59 #define AM33XX_PM_GFX_PWRSTCTRL_OFFSET		0x0000
60 #define AM33XX_PM_GFX_PWRSTCTRL			AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0000)
61 #define AM33XX_PM_GFX_PWRSTST_OFFSET		0x0010
62 #define AM33XX_PM_GFX_PWRSTST			AM33XX_PRM_REGADDR(AM33XX_PRM_GFX_MOD, 0x0010)
63 
64 /* PRM.CEFUSE_PRM register offsets */
65 #define AM33XX_PM_CEFUSE_PWRSTCTRL_OFFSET	0x0000
66 #define AM33XX_PM_CEFUSE_PWRSTCTRL		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0000)
67 #define AM33XX_PM_CEFUSE_PWRSTST_OFFSET		0x0004
68 #define AM33XX_PM_CEFUSE_PWRSTST		AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
69 
70 #ifndef __ASSEMBLER__
71 int am33xx_prm_init(const struct omap_prcm_init_data *data);
72 
73 #endif /* ASSEMBLER */
74 #endif
75