1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 269d88a00SPaul Walmsley #ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_24XX_H 369d88a00SPaul Walmsley #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_24XX_H 469d88a00SPaul Walmsley 569d88a00SPaul Walmsley /* 669d88a00SPaul Walmsley * OMAP24XX Power/Reset Management register bits 769d88a00SPaul Walmsley * 869d88a00SPaul Walmsley * Copyright (C) 2007 Texas Instruments, Inc. 969d88a00SPaul Walmsley * Copyright (C) 2007 Nokia Corporation 1069d88a00SPaul Walmsley * 1169d88a00SPaul Walmsley * Written by Paul Walmsley 1269d88a00SPaul Walmsley */ 1369d88a00SPaul Walmsley 14139563adSPaul Walmsley #include "prm2xxx.h" 1569d88a00SPaul Walmsley 16fe6a58f8SPaul Walmsley #define OMAP24XX_EN_CORE_SHIFT 0 17f38ca10aSPaul Walmsley #define OMAP24XX_FORCESTATE_MASK (1 << 18) 18f38ca10aSPaul Walmsley #define OMAP24XX_AUTOIDLE_MASK (1 << 0) 19f38ca10aSPaul Walmsley #define OMAP24XX_AUTO_EXTVOLT_MASK (1 << 15) 2069d88a00SPaul Walmsley #define OMAP24XX_SETOFF_LEVEL_SHIFT 12 21f38ca10aSPaul Walmsley #define OMAP24XX_MEMRETCTRL_MASK (1 << 8) 2269d88a00SPaul Walmsley #define OMAP24XX_SETRET_LEVEL_SHIFT 6 2369d88a00SPaul Walmsley #define OMAP24XX_VOLT_LEVEL_SHIFT 0 2469d88a00SPaul Walmsley #define OMAP2420_CLKOUT2_EN_SHIFT 15 2569d88a00SPaul Walmsley #define OMAP2420_CLKOUT2_DIV_SHIFT 11 266ab9f69eSRajendra Nayak #define OMAP2420_CLKOUT2_DIV_WIDTH 3 2769d88a00SPaul Walmsley #define OMAP2420_CLKOUT2_SOURCE_MASK (0x3 << 8) 2869d88a00SPaul Walmsley #define OMAP24XX_CLKOUT_EN_SHIFT 7 2969d88a00SPaul Walmsley #define OMAP24XX_CLKOUT_DIV_SHIFT 3 306ab9f69eSRajendra Nayak #define OMAP24XX_CLKOUT_DIV_WIDTH 3 3169d88a00SPaul Walmsley #define OMAP24XX_CLKOUT_SOURCE_MASK (0x3 << 0) 3269d88a00SPaul Walmsley #define OMAP24XX_EMULATION_EN_SHIFT 0 33fe6a58f8SPaul Walmsley #define OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT 5 34fe6a58f8SPaul Walmsley #define OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT 2 352bb2a5d3SPaul Walmsley #define OMAP24XX_EXTWMPU_RST_SHIFT 6 362bb2a5d3SPaul Walmsley #define OMAP24XX_SECU_WD_RST_SHIFT 5 372bb2a5d3SPaul Walmsley #define OMAP24XX_MPU_WD_RST_SHIFT 4 382bb2a5d3SPaul Walmsley #define OMAP24XX_SECU_VIOL_RST_SHIFT 3 3969d88a00SPaul Walmsley #endif 40