1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Legacy platform_data quirks 4 * 5 * Copyright (C) 2013 Texas Instruments 6 */ 7 #include <linux/clk.h> 8 #include <linux/davinci_emac.h> 9 #include <linux/gpio/machine.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/of_platform.h> 14 #include <linux/mmc/card.h> 15 #include <linux/mmc/host.h> 16 #include <linux/power/smartreflex.h> 17 #include <linux/regulator/machine.h> 18 #include <linux/regulator/fixed.h> 19 20 #include <linux/platform_data/pinctrl-single.h> 21 #include <linux/platform_data/hsmmc-omap.h> 22 #include <linux/platform_data/iommu-omap.h> 23 #include <linux/platform_data/ti-sysc.h> 24 #include <linux/platform_data/wkup_m3.h> 25 #include <linux/platform_data/asoc-ti-mcbsp.h> 26 #include <linux/platform_data/ti-prm.h> 27 28 #include "clockdomain.h" 29 #include "common.h" 30 #include "common-board-devices.h" 31 #include "control.h" 32 #include "omap_device.h" 33 #include "omap-secure.h" 34 #include "soc.h" 35 36 static struct omap_hsmmc_platform_data __maybe_unused mmc_pdata[2]; 37 38 struct pdata_init { 39 const char *compatible; 40 void (*fn)(void); 41 }; 42 43 static struct of_dev_auxdata omap_auxdata_lookup[]; 44 45 #ifdef CONFIG_MACH_NOKIA_N8X0 46 static void __init omap2420_n8x0_legacy_init(void) 47 { 48 omap_auxdata_lookup[0].platform_data = n8x0_legacy_init(); 49 } 50 #else 51 #define omap2420_n8x0_legacy_init NULL 52 #endif 53 54 #ifdef CONFIG_ARCH_OMAP3 55 /* 56 * Configures GPIOs 126, 127 and 129 to 1.8V mode instead of 3.0V 57 * mode for MMC1 in case bootloader did not configure things. 58 * Note that if the pins are used for MMC1, pbias-regulator 59 * manages the IO voltage. 60 */ 61 static void __init omap3_gpio126_127_129(void) 62 { 63 u32 reg; 64 65 reg = omap_ctrl_readl(OMAP343X_CONTROL_PBIAS_LITE); 66 reg &= ~OMAP343X_PBIASLITEVMODE1; 67 reg |= OMAP343X_PBIASLITEPWRDNZ1; 68 omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE); 69 if (cpu_is_omap3630()) { 70 reg = omap_ctrl_readl(OMAP34XX_CONTROL_WKUP_CTRL); 71 reg |= OMAP36XX_GPIO_IO_PWRDNZ; 72 omap_ctrl_writel(reg, OMAP34XX_CONTROL_WKUP_CTRL); 73 } 74 } 75 76 static void __init hsmmc2_internal_input_clk(void) 77 { 78 u32 reg; 79 80 reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1); 81 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 82 omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); 83 } 84 85 #ifdef CONFIG_OMAP_HWMOD 86 static struct iommu_platform_data omap3_iommu_pdata = { 87 .reset_name = "mmu", 88 .assert_reset = omap_device_assert_hardreset, 89 .deassert_reset = omap_device_deassert_hardreset, 90 .device_enable = omap_device_enable, 91 .device_idle = omap_device_idle, 92 }; 93 94 static struct iommu_platform_data omap3_iommu_isp_pdata = { 95 .device_enable = omap_device_enable, 96 .device_idle = omap_device_idle, 97 }; 98 #endif 99 100 static void __init omap3_sbc_t3x_usb_hub_init(char *hub_name, int idx) 101 { 102 struct gpio_desc *d; 103 104 /* This asserts the RESET line (reverse polarity) */ 105 d = gpiod_get_index(NULL, "reset", idx, GPIOD_OUT_HIGH); 106 if (IS_ERR(d)) { 107 pr_err("Unable to get T3x USB reset GPIO descriptor\n"); 108 return; 109 } 110 gpiod_set_consumer_name(d, hub_name); 111 gpiod_export(d, 0); 112 udelay(10); 113 /* De-assert RESET */ 114 gpiod_set_value(d, 0); 115 msleep(1); 116 } 117 118 static struct gpiod_lookup_table omap3_sbc_t3x_usb_gpio_table = { 119 .dev_id = NULL, 120 .table = { 121 GPIO_LOOKUP_IDX("gpio-160-175", 7, "reset", 0, 122 GPIO_ACTIVE_LOW), 123 { } 124 }, 125 }; 126 127 static void __init omap3_sbc_t3730_legacy_init(void) 128 { 129 gpiod_add_lookup_table(&omap3_sbc_t3x_usb_gpio_table); 130 omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 0); 131 } 132 133 static void __init omap3_sbc_t3530_legacy_init(void) 134 { 135 gpiod_add_lookup_table(&omap3_sbc_t3x_usb_gpio_table); 136 omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 0); 137 } 138 139 static void __init omap3_evm_legacy_init(void) 140 { 141 hsmmc2_internal_input_clk(); 142 } 143 144 static void am35xx_enable_emac_int(void) 145 { 146 u32 v; 147 148 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); 149 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR | 150 AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR); 151 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); 152 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ 153 } 154 155 static void am35xx_disable_emac_int(void) 156 { 157 u32 v; 158 159 v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); 160 v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR); 161 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); 162 omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ 163 } 164 165 static struct emac_platform_data am35xx_emac_pdata = { 166 .interrupt_enable = am35xx_enable_emac_int, 167 .interrupt_disable = am35xx_disable_emac_int, 168 }; 169 170 static void __init am35xx_emac_reset(void) 171 { 172 u32 v; 173 174 v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); 175 v &= ~AM35XX_CPGMACSS_SW_RST; 176 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET); 177 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ 178 } 179 180 static struct gpiod_lookup_table cm_t3517_wlan_gpio_table = { 181 .dev_id = NULL, 182 .table = { 183 GPIO_LOOKUP("gpio-48-53", 8, "power", 184 GPIO_ACTIVE_HIGH), 185 GPIO_LOOKUP("gpio-0-15", 4, "noe", 186 GPIO_ACTIVE_HIGH), 187 { } 188 }, 189 }; 190 191 static void __init omap3_sbc_t3517_wifi_init(void) 192 { 193 struct gpio_desc *d; 194 195 gpiod_add_lookup_table(&cm_t3517_wlan_gpio_table); 196 197 /* This asserts the RESET line (reverse polarity) */ 198 d = gpiod_get(NULL, "power", GPIOD_OUT_HIGH); 199 if (IS_ERR(d)) { 200 pr_err("Unable to get CM T3517 WLAN power GPIO descriptor\n"); 201 } else { 202 gpiod_set_consumer_name(d, "wlan pwr"); 203 gpiod_export(d, 0); 204 } 205 206 d = gpiod_get(NULL, "noe", GPIOD_OUT_HIGH); 207 if (IS_ERR(d)) { 208 pr_err("Unable to get CM T3517 WLAN XCVR NOE GPIO descriptor\n"); 209 } else { 210 gpiod_set_consumer_name(d, "xcvr noe"); 211 gpiod_export(d, 0); 212 } 213 msleep(100); 214 gpiod_set_value(d, 0); 215 } 216 217 static struct gpiod_lookup_table omap3_sbc_t3517_usb_gpio_table = { 218 .dev_id = NULL, 219 .table = { 220 GPIO_LOOKUP_IDX("gpio-144-159", 8, "reset", 0, 221 GPIO_ACTIVE_LOW), 222 GPIO_LOOKUP_IDX("gpio-96-111", 2, "reset", 1, 223 GPIO_ACTIVE_LOW), 224 { } 225 }, 226 }; 227 228 static void __init omap3_sbc_t3517_legacy_init(void) 229 { 230 gpiod_add_lookup_table(&omap3_sbc_t3517_usb_gpio_table); 231 omap3_sbc_t3x_usb_hub_init("cm-t3517 usb hub", 0); 232 omap3_sbc_t3x_usb_hub_init("sb-t35 usb hub", 1); 233 am35xx_emac_reset(); 234 hsmmc2_internal_input_clk(); 235 omap3_sbc_t3517_wifi_init(); 236 } 237 238 static void __init am3517_evm_legacy_init(void) 239 { 240 am35xx_emac_reset(); 241 } 242 243 static void __init nokia_n900_legacy_init(void) 244 { 245 hsmmc2_internal_input_clk(); 246 mmc_pdata[0].name = "external"; 247 mmc_pdata[1].name = "internal"; 248 249 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 250 if (IS_ENABLED(CONFIG_ARM_ERRATA_430973)) { 251 pr_info("RX-51: Enabling ARM errata 430973 workaround\n"); 252 /* set IBE to 1 */ 253 rx51_secure_update_aux_cr(BIT(6), 0); 254 } else { 255 pr_warn("RX-51: Not enabling ARM errata 430973 workaround\n"); 256 pr_warn("Thumb binaries may crash randomly without this workaround\n"); 257 } 258 } 259 } 260 261 static void __init omap3_tao3530_legacy_init(void) 262 { 263 hsmmc2_internal_input_clk(); 264 } 265 266 static void __init omap3_logicpd_torpedo_init(void) 267 { 268 omap3_gpio126_127_129(); 269 } 270 271 /* omap3pandora legacy devices */ 272 273 static struct platform_device pandora_backlight = { 274 .name = "pandora-backlight", 275 .id = -1, 276 }; 277 278 static void __init omap3_pandora_legacy_init(void) 279 { 280 platform_device_register(&pandora_backlight); 281 } 282 #endif /* CONFIG_ARCH_OMAP3 */ 283 284 #ifdef CONFIG_SOC_DRA7XX 285 static struct iommu_platform_data dra7_ipu1_dsp_iommu_pdata = { 286 .set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint, 287 }; 288 #endif 289 290 static struct clockdomain *ti_sysc_find_one_clockdomain(struct clk *clk) 291 { 292 struct clk_hw *hw = __clk_get_hw(clk); 293 struct clockdomain *clkdm = NULL; 294 struct clk_hw_omap *hwclk; 295 296 hwclk = to_clk_hw_omap(hw); 297 if (!omap2_clk_is_hw_omap(hw)) 298 return NULL; 299 300 if (hwclk && hwclk->clkdm_name) 301 clkdm = clkdm_lookup(hwclk->clkdm_name); 302 303 return clkdm; 304 } 305 306 /** 307 * ti_sysc_clkdm_init - find clockdomain based on clock 308 * @fck: device functional clock 309 * @ick: device interface clock 310 * @dev: struct device 311 * 312 * Populate clockdomain based on clock. It is needed for 313 * clkdm_deny_idle() and clkdm_allow_idle() for blocking clockdomain 314 * clockdomain idle during reset, enable and idle. 315 * 316 * Note that we assume interconnect driver manages the clocks 317 * and do not need to populate oh->_clk for dynamically 318 * allocated modules. 319 */ 320 static int ti_sysc_clkdm_init(struct device *dev, 321 struct clk *fck, struct clk *ick, 322 struct ti_sysc_cookie *cookie) 323 { 324 if (!IS_ERR(fck)) 325 cookie->clkdm = ti_sysc_find_one_clockdomain(fck); 326 if (cookie->clkdm) 327 return 0; 328 if (!IS_ERR(ick)) 329 cookie->clkdm = ti_sysc_find_one_clockdomain(ick); 330 if (cookie->clkdm) 331 return 0; 332 333 return -ENODEV; 334 } 335 336 static void ti_sysc_clkdm_deny_idle(struct device *dev, 337 const struct ti_sysc_cookie *cookie) 338 { 339 if (cookie->clkdm) 340 clkdm_deny_idle(cookie->clkdm); 341 } 342 343 static void ti_sysc_clkdm_allow_idle(struct device *dev, 344 const struct ti_sysc_cookie *cookie) 345 { 346 if (cookie->clkdm) 347 clkdm_allow_idle(cookie->clkdm); 348 } 349 350 #ifdef CONFIG_OMAP_HWMOD 351 static int ti_sysc_enable_module(struct device *dev, 352 const struct ti_sysc_cookie *cookie) 353 { 354 if (!cookie->data) 355 return -EINVAL; 356 357 return omap_hwmod_enable(cookie->data); 358 } 359 360 static int ti_sysc_idle_module(struct device *dev, 361 const struct ti_sysc_cookie *cookie) 362 { 363 if (!cookie->data) 364 return -EINVAL; 365 366 return omap_hwmod_idle(cookie->data); 367 } 368 369 static int ti_sysc_shutdown_module(struct device *dev, 370 const struct ti_sysc_cookie *cookie) 371 { 372 if (!cookie->data) 373 return -EINVAL; 374 375 return omap_hwmod_shutdown(cookie->data); 376 } 377 #endif /* CONFIG_OMAP_HWMOD */ 378 379 static bool ti_sysc_soc_type_gp(void) 380 { 381 return omap_type() == OMAP2_DEVICE_TYPE_GP; 382 } 383 384 static struct of_dev_auxdata omap_auxdata_lookup[]; 385 386 static struct ti_sysc_platform_data ti_sysc_pdata = { 387 .auxdata = omap_auxdata_lookup, 388 .soc_type_gp = ti_sysc_soc_type_gp, 389 .init_clockdomain = ti_sysc_clkdm_init, 390 .clkdm_deny_idle = ti_sysc_clkdm_deny_idle, 391 .clkdm_allow_idle = ti_sysc_clkdm_allow_idle, 392 #ifdef CONFIG_OMAP_HWMOD 393 .init_module = omap_hwmod_init_module, 394 .enable_module = ti_sysc_enable_module, 395 .idle_module = ti_sysc_idle_module, 396 .shutdown_module = ti_sysc_shutdown_module, 397 #endif 398 }; 399 400 static struct pcs_pdata pcs_pdata; 401 402 void omap_pcs_legacy_init(int irq, void (*rearm)(void)) 403 { 404 pcs_pdata.irq = irq; 405 pcs_pdata.rearm = rearm; 406 } 407 408 static struct ti_prm_platform_data ti_prm_pdata = { 409 .clkdm_deny_idle = clkdm_deny_idle, 410 .clkdm_allow_idle = clkdm_allow_idle, 411 .clkdm_lookup = clkdm_lookup, 412 }; 413 414 #if defined(CONFIG_ARCH_OMAP3) && IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP) 415 static struct omap_mcbsp_platform_data mcbsp_pdata; 416 static void __init omap3_mcbsp_init(void) 417 { 418 omap3_mcbsp_init_pdata_callback(&mcbsp_pdata); 419 } 420 #else 421 static void __init omap3_mcbsp_init(void) {} 422 #endif 423 424 /* 425 * Few boards still need auxdata populated before we populate 426 * the dev entries in of_platform_populate(). 427 */ 428 static struct pdata_init auxdata_quirks[] __initdata = { 429 #ifdef CONFIG_SOC_OMAP2420 430 { "nokia,n800", omap2420_n8x0_legacy_init, }, 431 { "nokia,n810", omap2420_n8x0_legacy_init, }, 432 { "nokia,n810-wimax", omap2420_n8x0_legacy_init, }, 433 #endif 434 { /* sentinel */ }, 435 }; 436 437 struct omap_sr_data __maybe_unused omap_sr_pdata[OMAP_SR_NR]; 438 439 static struct of_dev_auxdata omap_auxdata_lookup[] = { 440 #ifdef CONFIG_MACH_NOKIA_N8X0 441 OF_DEV_AUXDATA("ti,omap2420-mmc", 0x4809c000, "mmci-omap.0", NULL), 442 OF_DEV_AUXDATA("menelaus", 0x72, "1-0072", &n8x0_menelaus_platform_data), 443 #endif 444 #ifdef CONFIG_ARCH_OMAP3 445 OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu", 446 &omap3_iommu_pdata), 447 OF_DEV_AUXDATA("ti,omap2-iommu", 0x480bd400, "480bd400.mmu", 448 &omap3_iommu_isp_pdata), 449 OF_DEV_AUXDATA("ti,omap3-smartreflex-core", 0x480cb000, 450 "480cb000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]), 451 OF_DEV_AUXDATA("ti,omap3-smartreflex-mpu-iva", 0x480c9000, 452 "480c9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]), 453 OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]), 454 OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]), 455 /* Only on am3517 */ 456 OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), 457 OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", 458 &am35xx_emac_pdata), 459 OF_DEV_AUXDATA("nokia,n900-rom-rng", 0, NULL, rx51_secure_rng_call), 460 /* McBSP modules with sidetone core */ 461 #if IS_ENABLED(CONFIG_SND_SOC_OMAP_MCBSP) 462 OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49022000, "49022000.mcbsp", &mcbsp_pdata), 463 OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49024000, "49024000.mcbsp", &mcbsp_pdata), 464 #endif 465 #endif 466 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 467 OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000, 468 "4a0db000.smartreflex", &omap_sr_pdata[OMAP_SR_IVA]), 469 OF_DEV_AUXDATA("ti,omap4-smartreflex-core", 0x4a0dd000, 470 "4a0dd000.smartreflex", &omap_sr_pdata[OMAP_SR_CORE]), 471 OF_DEV_AUXDATA("ti,omap4-smartreflex-mpu", 0x4a0d9000, 472 "4a0d9000.smartreflex", &omap_sr_pdata[OMAP_SR_MPU]), 473 #endif 474 #ifdef CONFIG_SOC_DRA7XX 475 OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d01000, "40d01000.mmu", 476 &dra7_ipu1_dsp_iommu_pdata), 477 OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu", 478 &dra7_ipu1_dsp_iommu_pdata), 479 OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu", 480 &dra7_ipu1_dsp_iommu_pdata), 481 #endif 482 /* Common auxdata */ 483 OF_DEV_AUXDATA("simple-pm-bus", 0, NULL, omap_auxdata_lookup), 484 OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata), 485 OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata), 486 OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata), 487 OF_DEV_AUXDATA("ti,omap-sdma", 0, NULL, &dma_plat_info), 488 { /* sentinel */ }, 489 }; 490 491 /* 492 * Few boards still need to initialize some legacy devices with 493 * platform data until the drivers support device tree. 494 */ 495 static struct pdata_init pdata_quirks[] __initdata = { 496 #ifdef CONFIG_ARCH_OMAP3 497 { "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, }, 498 { "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, }, 499 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, }, 500 { "nokia,omap3-n900", nokia_n900_legacy_init, }, 501 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, 502 { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, 503 { "logicpd,dm3730-torpedo-devkit", omap3_logicpd_torpedo_init, }, 504 { "ti,omap3-evm-37xx", omap3_evm_legacy_init, }, 505 { "ti,am3517-evm", am3517_evm_legacy_init, }, 506 { "technexion,omap3-tao3530", omap3_tao3530_legacy_init, }, 507 { "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, }, 508 { "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, }, 509 #endif 510 { /* sentinel */ }, 511 }; 512 513 static void pdata_quirks_check(struct pdata_init *quirks) 514 { 515 while (quirks->compatible) { 516 if (of_machine_is_compatible(quirks->compatible)) { 517 if (quirks->fn) 518 quirks->fn(); 519 } 520 quirks++; 521 } 522 } 523 524 static const char * const pdata_quirks_init_nodes[] = { 525 "prcm", 526 "prm", 527 }; 528 529 static void __init 530 pdata_quirks_init_clocks(const struct of_device_id *omap_dt_match_table) 531 { 532 struct device_node *np; 533 int i; 534 535 for (i = 0; i < ARRAY_SIZE(pdata_quirks_init_nodes); i++) { 536 np = of_find_node_by_name(NULL, pdata_quirks_init_nodes[i]); 537 if (!np) 538 continue; 539 540 of_platform_populate(np, omap_dt_match_table, 541 omap_auxdata_lookup, NULL); 542 543 of_node_put(np); 544 } 545 } 546 547 void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table) 548 { 549 /* 550 * We still need this for omap2420 and omap3 PM to work, others are 551 * using drivers/misc/sram.c already. 552 */ 553 if (of_machine_is_compatible("ti,omap2420") || 554 of_machine_is_compatible("ti,omap3")) 555 omap_sdrc_init(NULL, NULL); 556 557 if (of_machine_is_compatible("ti,omap3")) 558 omap3_mcbsp_init(); 559 pdata_quirks_check(auxdata_quirks); 560 561 pdata_quirks_init_clocks(omap_dt_match_table); 562 563 of_platform_populate(NULL, omap_dt_match_table, 564 omap_auxdata_lookup, NULL); 565 pdata_quirks_check(pdata_quirks); 566 } 567