xref: /linux/arch/arm/mach-omap2/opp3xxx_data.c (revision ec8a42e7343234802b9054874fe01810880289ce)
1 /*
2  * OMAP3 OPP table definitions.
3  *
4  * Copyright (C) 2009-2010 Texas Instruments Incorporated - https://www.ti.com/
5  *	Nishanth Menon
6  *	Kevin Hilman
7  * Copyright (C) 2010-2011 Nokia Corporation.
8  *      Eduardo Valentin
9  *      Paul Walmsley
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  *
15  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
16  * kind, whether express or implied; without even the implied warranty
17  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  */
20 #include <linux/module.h>
21 
22 #include "soc.h"
23 #include "control.h"
24 #include "omap_opp_data.h"
25 #include "pm.h"
26 
27 /* 34xx */
28 
29 /* VDD1 */
30 
31 #define OMAP3430_VDD_MPU_OPP1_UV		975000
32 #define OMAP3430_VDD_MPU_OPP2_UV		1075000
33 #define OMAP3430_VDD_MPU_OPP3_UV		1200000
34 #define OMAP3430_VDD_MPU_OPP4_UV		1270000
35 #define OMAP3430_VDD_MPU_OPP5_UV		1350000
36 
37 struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
38 	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
39 	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
40 	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
41 	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
42 	VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
43 	VOLT_DATA_DEFINE(0, 0, 0, 0),
44 };
45 
46 /* VDD2 */
47 
48 #define OMAP3430_VDD_CORE_OPP1_UV		975000
49 #define OMAP3430_VDD_CORE_OPP2_UV		1050000
50 #define OMAP3430_VDD_CORE_OPP3_UV		1150000
51 
52 struct omap_volt_data omap34xx_vddcore_volt_data[] = {
53 	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
54 	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
55 	VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
56 	VOLT_DATA_DEFINE(0, 0, 0, 0),
57 };
58 
59 /* 36xx */
60 
61 /* VDD1 */
62 
63 #define OMAP3630_VDD_MPU_OPP50_UV		1012500
64 #define OMAP3630_VDD_MPU_OPP100_UV		1200000
65 #define OMAP3630_VDD_MPU_OPP120_UV		1325000
66 #define OMAP3630_VDD_MPU_OPP1G_UV		1375000
67 
68 struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
69 	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
70 	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
71 	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
72 	VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
73 	VOLT_DATA_DEFINE(0, 0, 0, 0),
74 };
75 
76 /* VDD2 */
77 
78 #define OMAP3630_VDD_CORE_OPP50_UV		1000000
79 #define OMAP3630_VDD_CORE_OPP100_UV		1200000
80 
81 struct omap_volt_data omap36xx_vddcore_volt_data[] = {
82 	VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
83 	VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
84 	VOLT_DATA_DEFINE(0, 0, 0, 0),
85 };
86