xref: /linux/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c (revision 9a379e77033f02c4a071891afdf0f0a01eff8ccb)
1 /*
2  * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3
3  *
4  * Copyright (C) 2011 Nokia Corporation
5  * Copyright (C) 2012 Texas Instruments, Inc.
6  * Paul Walmsley
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/dmaengine.h>
14 #include <linux/omap-dma.h>
15 
16 #include "omap_hwmod.h"
17 #include "hdq1w.h"
18 
19 #include "omap_hwmod_common_data.h"
20 
21 /* UART */
22 
23 static struct omap_hwmod_class_sysconfig omap2_uart_sysc = {
24 	.rev_offs	= 0x50,
25 	.sysc_offs	= 0x54,
26 	.syss_offs	= 0x58,
27 	.sysc_flags	= (SYSC_HAS_SIDLEMODE |
28 			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
29 			   SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
30 	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
31 	.sysc_fields	= &omap_hwmod_sysc_type1,
32 };
33 
34 struct omap_hwmod_class omap2_uart_class = {
35 	.name	= "uart",
36 	.sysc	= &omap2_uart_sysc,
37 };
38 
39 /*
40  * 'venc' class
41  * video encoder
42  */
43 
44 struct omap_hwmod_class omap2_venc_hwmod_class = {
45 	.name = "venc",
46 };
47 
48 /*
49  * omap_hwmod class data
50  */
51 
52 struct omap_hwmod_class l3_hwmod_class = {
53 	.name = "l3",
54 };
55 
56 struct omap_hwmod_class l4_hwmod_class = {
57 	.name = "l4",
58 };
59 
60 struct omap_hwmod_class mpu_hwmod_class = {
61 	.name = "mpu",
62 };
63 
64 struct omap_hwmod_class iva_hwmod_class = {
65 	.name = "iva",
66 };
67 
68 struct omap_hwmod_class_sysconfig omap2_hdq1w_sysc = {
69 	.rev_offs	= 0x0,
70 	.sysc_offs	= 0x14,
71 	.syss_offs	= 0x18,
72 	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
73 			   SYSS_HAS_RESET_STATUS),
74 	.sysc_fields    = &omap_hwmod_sysc_type1,
75 };
76 
77 struct omap_hwmod_class omap2_hdq1w_class = {
78 	.name	= "hdq1w",
79 	.sysc	= &omap2_hdq1w_sysc,
80 	.reset	= &omap_hdq1w_reset,
81 };
82