1 /* 2 * omap_hwmod implementation for OMAP2/3/4 3 * 4 * Copyright (C) 2009-2011 Nokia Corporation 5 * Copyright (C) 2011-2012 Texas Instruments, Inc. 6 * 7 * Paul Walmsley, Benoît Cousson, Kevin Hilman 8 * 9 * Created in collaboration with (alphabetical order): Thara Gopinath, 10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand 11 * Sawant, Santosh Shilimkar, Richard Woodruff 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * Introduction 18 * ------------ 19 * One way to view an OMAP SoC is as a collection of largely unrelated 20 * IP blocks connected by interconnects. The IP blocks include 21 * devices such as ARM processors, audio serial interfaces, UARTs, 22 * etc. Some of these devices, like the DSP, are created by TI; 23 * others, like the SGX, largely originate from external vendors. In 24 * TI's documentation, on-chip devices are referred to as "OMAP 25 * modules." Some of these IP blocks are identical across several 26 * OMAP versions. Others are revised frequently. 27 * 28 * These OMAP modules are tied together by various interconnects. 29 * Most of the address and data flow between modules is via OCP-based 30 * interconnects such as the L3 and L4 buses; but there are other 31 * interconnects that distribute the hardware clock tree, handle idle 32 * and reset signaling, supply power, and connect the modules to 33 * various pads or balls on the OMAP package. 34 * 35 * OMAP hwmod provides a consistent way to describe the on-chip 36 * hardware blocks and their integration into the rest of the chip. 37 * This description can be automatically generated from the TI 38 * hardware database. OMAP hwmod provides a standard, consistent API 39 * to reset, enable, idle, and disable these hardware blocks. And 40 * hwmod provides a way for other core code, such as the Linux device 41 * code or the OMAP power management and address space mapping code, 42 * to query the hardware database. 43 * 44 * Using hwmod 45 * ----------- 46 * Drivers won't call hwmod functions directly. That is done by the 47 * omap_device code, and in rare occasions, by custom integration code 48 * in arch/arm/ *omap*. The omap_device code includes functions to 49 * build a struct platform_device using omap_hwmod data, and that is 50 * currently how hwmod data is communicated to drivers and to the 51 * Linux driver model. Most drivers will call omap_hwmod functions only 52 * indirectly, via pm_runtime*() functions. 53 * 54 * From a layering perspective, here is where the OMAP hwmod code 55 * fits into the kernel software stack: 56 * 57 * +-------------------------------+ 58 * | Device driver code | 59 * | (e.g., drivers/) | 60 * +-------------------------------+ 61 * | Linux driver model | 62 * | (platform_device / | 63 * | platform_driver data/code) | 64 * +-------------------------------+ 65 * | OMAP core-driver integration | 66 * |(arch/arm/mach-omap2/devices.c)| 67 * +-------------------------------+ 68 * | omap_device code | 69 * | (../plat-omap/omap_device.c) | 70 * +-------------------------------+ 71 * ----> | omap_hwmod code/data | <----- 72 * | (../mach-omap2/omap_hwmod*) | 73 * +-------------------------------+ 74 * | OMAP clock/PRCM/register fns | 75 * | ({read,write}l_relaxed, clk*) | 76 * +-------------------------------+ 77 * 78 * Device drivers should not contain any OMAP-specific code or data in 79 * them. They should only contain code to operate the IP block that 80 * the driver is responsible for. This is because these IP blocks can 81 * also appear in other SoCs, either from TI (such as DaVinci) or from 82 * other manufacturers; and drivers should be reusable across other 83 * platforms. 84 * 85 * The OMAP hwmod code also will attempt to reset and idle all on-chip 86 * devices upon boot. The goal here is for the kernel to be 87 * completely self-reliant and independent from bootloaders. This is 88 * to ensure a repeatable configuration, both to ensure consistent 89 * runtime behavior, and to make it easier for others to reproduce 90 * bugs. 91 * 92 * OMAP module activity states 93 * --------------------------- 94 * The hwmod code considers modules to be in one of several activity 95 * states. IP blocks start out in an UNKNOWN state, then once they 96 * are registered via the hwmod code, proceed to the REGISTERED state. 97 * Once their clock names are resolved to clock pointers, the module 98 * enters the CLKS_INITED state; and finally, once the module has been 99 * reset and the integration registers programmed, the INITIALIZED state 100 * is entered. The hwmod code will then place the module into either 101 * the IDLE state to save power, or in the case of a critical system 102 * module, the ENABLED state. 103 * 104 * OMAP core integration code can then call omap_hwmod*() functions 105 * directly to move the module between the IDLE, ENABLED, and DISABLED 106 * states, as needed. This is done during both the PM idle loop, and 107 * in the OMAP core integration code's implementation of the PM runtime 108 * functions. 109 * 110 * References 111 * ---------- 112 * This is a partial list. 113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) 114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) 115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) 116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) 117 * - Open Core Protocol Specification 2.2 118 * 119 * To do: 120 * - handle IO mapping 121 * - bus throughput & module latency measurement code 122 * 123 * XXX add tests at the beginning of each function to ensure the hwmod is 124 * in the appropriate state 125 * XXX error return values should be checked to ensure that they are 126 * appropriate 127 */ 128 #undef DEBUG 129 130 #include <linux/kernel.h> 131 #include <linux/errno.h> 132 #include <linux/io.h> 133 #include <linux/clk-provider.h> 134 #include <linux/delay.h> 135 #include <linux/err.h> 136 #include <linux/list.h> 137 #include <linux/mutex.h> 138 #include <linux/spinlock.h> 139 #include <linux/slab.h> 140 #include <linux/bootmem.h> 141 #include <linux/cpu.h> 142 #include <linux/of.h> 143 #include <linux/of_address.h> 144 145 #include <asm/system_misc.h> 146 147 #include "clock.h" 148 #include "omap_hwmod.h" 149 150 #include "soc.h" 151 #include "common.h" 152 #include "clockdomain.h" 153 #include "powerdomain.h" 154 #include "cm2xxx.h" 155 #include "cm3xxx.h" 156 #include "cm33xx.h" 157 #include "prm.h" 158 #include "prm3xxx.h" 159 #include "prm44xx.h" 160 #include "prm33xx.h" 161 #include "prminst44xx.h" 162 #include "mux.h" 163 #include "pm.h" 164 165 /* Name of the OMAP hwmod for the MPU */ 166 #define MPU_INITIATOR_NAME "mpu" 167 168 /* 169 * Number of struct omap_hwmod_link records per struct 170 * omap_hwmod_ocp_if record (master->slave and slave->master) 171 */ 172 #define LINKS_PER_OCP_IF 2 173 174 /* 175 * Address offset (in bytes) between the reset control and the reset 176 * status registers: 4 bytes on OMAP4 177 */ 178 #define OMAP4_RST_CTRL_ST_OFFSET 4 179 180 /** 181 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations 182 * @enable_module: function to enable a module (via MODULEMODE) 183 * @disable_module: function to disable a module (via MODULEMODE) 184 * 185 * XXX Eventually this functionality will be hidden inside the PRM/CM 186 * device drivers. Until then, this should avoid huge blocks of cpu_is_*() 187 * conditionals in this code. 188 */ 189 struct omap_hwmod_soc_ops { 190 void (*enable_module)(struct omap_hwmod *oh); 191 int (*disable_module)(struct omap_hwmod *oh); 192 int (*wait_target_ready)(struct omap_hwmod *oh); 193 int (*assert_hardreset)(struct omap_hwmod *oh, 194 struct omap_hwmod_rst_info *ohri); 195 int (*deassert_hardreset)(struct omap_hwmod *oh, 196 struct omap_hwmod_rst_info *ohri); 197 int (*is_hardreset_asserted)(struct omap_hwmod *oh, 198 struct omap_hwmod_rst_info *ohri); 199 int (*init_clkdm)(struct omap_hwmod *oh); 200 void (*update_context_lost)(struct omap_hwmod *oh); 201 int (*get_context_lost)(struct omap_hwmod *oh); 202 }; 203 204 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ 205 static struct omap_hwmod_soc_ops soc_ops; 206 207 /* omap_hwmod_list contains all registered struct omap_hwmods */ 208 static LIST_HEAD(omap_hwmod_list); 209 210 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ 211 static struct omap_hwmod *mpu_oh; 212 213 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */ 214 static DEFINE_SPINLOCK(io_chain_lock); 215 216 /* 217 * linkspace: ptr to a buffer that struct omap_hwmod_link records are 218 * allocated from - used to reduce the number of small memory 219 * allocations, which has a significant impact on performance 220 */ 221 static struct omap_hwmod_link *linkspace; 222 223 /* 224 * free_ls, max_ls: array indexes into linkspace; representing the 225 * next free struct omap_hwmod_link index, and the maximum number of 226 * struct omap_hwmod_link records allocated (respectively) 227 */ 228 static unsigned short free_ls, max_ls, ls_supp; 229 230 /* inited: set to true once the hwmod code is initialized */ 231 static bool inited; 232 233 /* Private functions */ 234 235 /** 236 * _fetch_next_ocp_if - return the next OCP interface in a list 237 * @p: ptr to a ptr to the list_head inside the ocp_if to return 238 * @i: pointer to the index of the element pointed to by @p in the list 239 * 240 * Return a pointer to the struct omap_hwmod_ocp_if record 241 * containing the struct list_head pointed to by @p, and increment 242 * @p such that a future call to this routine will return the next 243 * record. 244 */ 245 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p, 246 int *i) 247 { 248 struct omap_hwmod_ocp_if *oi; 249 250 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if; 251 *p = (*p)->next; 252 253 *i = *i + 1; 254 255 return oi; 256 } 257 258 /** 259 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy 260 * @oh: struct omap_hwmod * 261 * 262 * Load the current value of the hwmod OCP_SYSCONFIG register into the 263 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no 264 * OCP_SYSCONFIG register or 0 upon success. 265 */ 266 static int _update_sysc_cache(struct omap_hwmod *oh) 267 { 268 if (!oh->class->sysc) { 269 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 270 return -EINVAL; 271 } 272 273 /* XXX ensure module interface clock is up */ 274 275 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); 276 277 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) 278 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; 279 280 return 0; 281 } 282 283 /** 284 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register 285 * @v: OCP_SYSCONFIG value to write 286 * @oh: struct omap_hwmod * 287 * 288 * Write @v into the module class' OCP_SYSCONFIG register, if it has 289 * one. No return value. 290 */ 291 static void _write_sysconfig(u32 v, struct omap_hwmod *oh) 292 { 293 if (!oh->class->sysc) { 294 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 295 return; 296 } 297 298 /* XXX ensure module interface clock is up */ 299 300 /* Module might have lost context, always update cache and register */ 301 oh->_sysc_cache = v; 302 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); 303 } 304 305 /** 306 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v 307 * @oh: struct omap_hwmod * 308 * @standbymode: MIDLEMODE field bits 309 * @v: pointer to register contents to modify 310 * 311 * Update the master standby mode bits in @v to be @standbymode for 312 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL 313 * upon error or 0 upon success. 314 */ 315 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, 316 u32 *v) 317 { 318 u32 mstandby_mask; 319 u8 mstandby_shift; 320 321 if (!oh->class->sysc || 322 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) 323 return -EINVAL; 324 325 if (!oh->class->sysc->sysc_fields) { 326 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 327 return -EINVAL; 328 } 329 330 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; 331 mstandby_mask = (0x3 << mstandby_shift); 332 333 *v &= ~mstandby_mask; 334 *v |= __ffs(standbymode) << mstandby_shift; 335 336 return 0; 337 } 338 339 /** 340 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v 341 * @oh: struct omap_hwmod * 342 * @idlemode: SIDLEMODE field bits 343 * @v: pointer to register contents to modify 344 * 345 * Update the slave idle mode bits in @v to be @idlemode for the @oh 346 * hwmod. Does not write to the hardware. Returns -EINVAL upon error 347 * or 0 upon success. 348 */ 349 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) 350 { 351 u32 sidle_mask; 352 u8 sidle_shift; 353 354 if (!oh->class->sysc || 355 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) 356 return -EINVAL; 357 358 if (!oh->class->sysc->sysc_fields) { 359 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 360 return -EINVAL; 361 } 362 363 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; 364 sidle_mask = (0x3 << sidle_shift); 365 366 *v &= ~sidle_mask; 367 *v |= __ffs(idlemode) << sidle_shift; 368 369 return 0; 370 } 371 372 /** 373 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v 374 * @oh: struct omap_hwmod * 375 * @clockact: CLOCKACTIVITY field bits 376 * @v: pointer to register contents to modify 377 * 378 * Update the clockactivity mode bits in @v to be @clockact for the 379 * @oh hwmod. Used for additional powersaving on some modules. Does 380 * not write to the hardware. Returns -EINVAL upon error or 0 upon 381 * success. 382 */ 383 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) 384 { 385 u32 clkact_mask; 386 u8 clkact_shift; 387 388 if (!oh->class->sysc || 389 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) 390 return -EINVAL; 391 392 if (!oh->class->sysc->sysc_fields) { 393 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 394 return -EINVAL; 395 } 396 397 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; 398 clkact_mask = (0x3 << clkact_shift); 399 400 *v &= ~clkact_mask; 401 *v |= clockact << clkact_shift; 402 403 return 0; 404 } 405 406 /** 407 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v 408 * @oh: struct omap_hwmod * 409 * @v: pointer to register contents to modify 410 * 411 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon 412 * error or 0 upon success. 413 */ 414 static int _set_softreset(struct omap_hwmod *oh, u32 *v) 415 { 416 u32 softrst_mask; 417 418 if (!oh->class->sysc || 419 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 420 return -EINVAL; 421 422 if (!oh->class->sysc->sysc_fields) { 423 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 424 return -EINVAL; 425 } 426 427 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 428 429 *v |= softrst_mask; 430 431 return 0; 432 } 433 434 /** 435 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v 436 * @oh: struct omap_hwmod * 437 * @v: pointer to register contents to modify 438 * 439 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon 440 * error or 0 upon success. 441 */ 442 static int _clear_softreset(struct omap_hwmod *oh, u32 *v) 443 { 444 u32 softrst_mask; 445 446 if (!oh->class->sysc || 447 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 448 return -EINVAL; 449 450 if (!oh->class->sysc->sysc_fields) { 451 WARN(1, 452 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n", 453 oh->name); 454 return -EINVAL; 455 } 456 457 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 458 459 *v &= ~softrst_mask; 460 461 return 0; 462 } 463 464 /** 465 * _wait_softreset_complete - wait for an OCP softreset to complete 466 * @oh: struct omap_hwmod * to wait on 467 * 468 * Wait until the IP block represented by @oh reports that its OCP 469 * softreset is complete. This can be triggered by software (see 470 * _ocp_softreset()) or by hardware upon returning from off-mode (one 471 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT 472 * microseconds. Returns the number of microseconds waited. 473 */ 474 static int _wait_softreset_complete(struct omap_hwmod *oh) 475 { 476 struct omap_hwmod_class_sysconfig *sysc; 477 u32 softrst_mask; 478 int c = 0; 479 480 sysc = oh->class->sysc; 481 482 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 483 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) 484 & SYSS_RESETDONE_MASK), 485 MAX_MODULE_SOFTRESET_WAIT, c); 486 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { 487 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); 488 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) 489 & softrst_mask), 490 MAX_MODULE_SOFTRESET_WAIT, c); 491 } 492 493 return c; 494 } 495 496 /** 497 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v 498 * @oh: struct omap_hwmod * 499 * 500 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register 501 * of some modules. When the DMA must perform read/write accesses, the 502 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop 503 * for power management, software must set the DMADISABLE bit back to 1. 504 * 505 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon 506 * error or 0 upon success. 507 */ 508 static int _set_dmadisable(struct omap_hwmod *oh) 509 { 510 u32 v; 511 u32 dmadisable_mask; 512 513 if (!oh->class->sysc || 514 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) 515 return -EINVAL; 516 517 if (!oh->class->sysc->sysc_fields) { 518 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 519 return -EINVAL; 520 } 521 522 /* clocks must be on for this operation */ 523 if (oh->_state != _HWMOD_STATE_ENABLED) { 524 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name); 525 return -EINVAL; 526 } 527 528 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name); 529 530 v = oh->_sysc_cache; 531 dmadisable_mask = 532 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); 533 v |= dmadisable_mask; 534 _write_sysconfig(v, oh); 535 536 return 0; 537 } 538 539 /** 540 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v 541 * @oh: struct omap_hwmod * 542 * @autoidle: desired AUTOIDLE bitfield value (0 or 1) 543 * @v: pointer to register contents to modify 544 * 545 * Update the module autoidle bit in @v to be @autoidle for the @oh 546 * hwmod. The autoidle bit controls whether the module can gate 547 * internal clocks automatically when it isn't doing anything; the 548 * exact function of this bit varies on a per-module basis. This 549 * function does not write to the hardware. Returns -EINVAL upon 550 * error or 0 upon success. 551 */ 552 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, 553 u32 *v) 554 { 555 u32 autoidle_mask; 556 u8 autoidle_shift; 557 558 if (!oh->class->sysc || 559 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) 560 return -EINVAL; 561 562 if (!oh->class->sysc->sysc_fields) { 563 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 564 return -EINVAL; 565 } 566 567 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; 568 autoidle_mask = (0x1 << autoidle_shift); 569 570 *v &= ~autoidle_mask; 571 *v |= autoidle << autoidle_shift; 572 573 return 0; 574 } 575 576 /** 577 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux 578 * @oh: struct omap_hwmod * 579 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable 580 * 581 * Set or clear the I/O pad wakeup flag in the mux entries for the 582 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array 583 * in memory. If the hwmod is currently idled, and the new idle 584 * values don't match the previous ones, this function will also 585 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not 586 * currently idled, this function won't touch the hardware: the new 587 * mux settings are written to the SCM PADCTRL registers when the 588 * hwmod is idled. No return value. 589 */ 590 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake) 591 { 592 struct omap_device_pad *pad; 593 bool change = false; 594 u16 prev_idle; 595 int j; 596 597 if (!oh->mux || !oh->mux->enabled) 598 return; 599 600 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) { 601 pad = oh->mux->pads_dynamic[j]; 602 603 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP)) 604 continue; 605 606 prev_idle = pad->idle; 607 608 if (set_wake) 609 pad->idle |= OMAP_WAKEUP_EN; 610 else 611 pad->idle &= ~OMAP_WAKEUP_EN; 612 613 if (prev_idle != pad->idle) 614 change = true; 615 } 616 617 if (change && oh->_state == _HWMOD_STATE_IDLE) 618 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 619 } 620 621 /** 622 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 623 * @oh: struct omap_hwmod * 624 * 625 * Allow the hardware module @oh to send wakeups. Returns -EINVAL 626 * upon error or 0 upon success. 627 */ 628 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) 629 { 630 if (!oh->class->sysc || 631 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 632 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 633 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 634 return -EINVAL; 635 636 if (!oh->class->sysc->sysc_fields) { 637 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 638 return -EINVAL; 639 } 640 641 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 642 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; 643 644 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 645 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 646 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 647 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 648 649 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 650 651 return 0; 652 } 653 654 /** 655 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 656 * @oh: struct omap_hwmod * 657 * 658 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL 659 * upon error or 0 upon success. 660 */ 661 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) 662 { 663 if (!oh->class->sysc || 664 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 665 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 666 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 667 return -EINVAL; 668 669 if (!oh->class->sysc->sysc_fields) { 670 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 671 return -EINVAL; 672 } 673 674 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 675 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); 676 677 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 678 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); 679 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 680 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); 681 682 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 683 684 return 0; 685 } 686 687 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh) 688 { 689 struct clk_hw_omap *clk; 690 691 if (oh->clkdm) { 692 return oh->clkdm; 693 } else if (oh->_clk) { 694 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC) 695 return NULL; 696 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk)); 697 return clk->clkdm; 698 } 699 return NULL; 700 } 701 702 /** 703 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active 704 * @oh: struct omap_hwmod * 705 * 706 * Prevent the hardware module @oh from entering idle while the 707 * hardare module initiator @init_oh is active. Useful when a module 708 * will be accessed by a particular initiator (e.g., if a module will 709 * be accessed by the IVA, there should be a sleepdep between the IVA 710 * initiator and the module). Only applies to modules in smart-idle 711 * mode. If the clockdomain is marked as not needing autodeps, return 712 * 0 without doing anything. Otherwise, returns -EINVAL upon error or 713 * passes along clkdm_add_sleepdep() value upon success. 714 */ 715 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 716 { 717 struct clockdomain *clkdm, *init_clkdm; 718 719 clkdm = _get_clkdm(oh); 720 init_clkdm = _get_clkdm(init_oh); 721 722 if (!clkdm || !init_clkdm) 723 return -EINVAL; 724 725 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) 726 return 0; 727 728 return clkdm_add_sleepdep(clkdm, init_clkdm); 729 } 730 731 /** 732 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active 733 * @oh: struct omap_hwmod * 734 * 735 * Allow the hardware module @oh to enter idle while the hardare 736 * module initiator @init_oh is active. Useful when a module will not 737 * be accessed by a particular initiator (e.g., if a module will not 738 * be accessed by the IVA, there should be no sleepdep between the IVA 739 * initiator and the module). Only applies to modules in smart-idle 740 * mode. If the clockdomain is marked as not needing autodeps, return 741 * 0 without doing anything. Returns -EINVAL upon error or passes 742 * along clkdm_del_sleepdep() value upon success. 743 */ 744 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 745 { 746 struct clockdomain *clkdm, *init_clkdm; 747 748 clkdm = _get_clkdm(oh); 749 init_clkdm = _get_clkdm(init_oh); 750 751 if (!clkdm || !init_clkdm) 752 return -EINVAL; 753 754 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) 755 return 0; 756 757 return clkdm_del_sleepdep(clkdm, init_clkdm); 758 } 759 760 /** 761 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk 762 * @oh: struct omap_hwmod * 763 * 764 * Called from _init_clocks(). Populates the @oh _clk (main 765 * functional clock pointer) if a main_clk is present. Returns 0 on 766 * success or -EINVAL on error. 767 */ 768 static int _init_main_clk(struct omap_hwmod *oh) 769 { 770 int ret = 0; 771 772 if (!oh->main_clk) 773 return 0; 774 775 oh->_clk = clk_get(NULL, oh->main_clk); 776 if (IS_ERR(oh->_clk)) { 777 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n", 778 oh->name, oh->main_clk); 779 return -EINVAL; 780 } 781 /* 782 * HACK: This needs a re-visit once clk_prepare() is implemented 783 * to do something meaningful. Today its just a no-op. 784 * If clk_prepare() is used at some point to do things like 785 * voltage scaling etc, then this would have to be moved to 786 * some point where subsystems like i2c and pmic become 787 * available. 788 */ 789 clk_prepare(oh->_clk); 790 791 if (!_get_clkdm(oh)) 792 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n", 793 oh->name, oh->main_clk); 794 795 return ret; 796 } 797 798 /** 799 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks 800 * @oh: struct omap_hwmod * 801 * 802 * Called from _init_clocks(). Populates the @oh OCP slave interface 803 * clock pointers. Returns 0 on success or -EINVAL on error. 804 */ 805 static int _init_interface_clks(struct omap_hwmod *oh) 806 { 807 struct omap_hwmod_ocp_if *os; 808 struct list_head *p; 809 struct clk *c; 810 int i = 0; 811 int ret = 0; 812 813 p = oh->slave_ports.next; 814 815 while (i < oh->slaves_cnt) { 816 os = _fetch_next_ocp_if(&p, &i); 817 if (!os->clk) 818 continue; 819 820 c = clk_get(NULL, os->clk); 821 if (IS_ERR(c)) { 822 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n", 823 oh->name, os->clk); 824 ret = -EINVAL; 825 continue; 826 } 827 os->_clk = c; 828 /* 829 * HACK: This needs a re-visit once clk_prepare() is implemented 830 * to do something meaningful. Today its just a no-op. 831 * If clk_prepare() is used at some point to do things like 832 * voltage scaling etc, then this would have to be moved to 833 * some point where subsystems like i2c and pmic become 834 * available. 835 */ 836 clk_prepare(os->_clk); 837 } 838 839 return ret; 840 } 841 842 /** 843 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks 844 * @oh: struct omap_hwmod * 845 * 846 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk 847 * clock pointers. Returns 0 on success or -EINVAL on error. 848 */ 849 static int _init_opt_clks(struct omap_hwmod *oh) 850 { 851 struct omap_hwmod_opt_clk *oc; 852 struct clk *c; 853 int i; 854 int ret = 0; 855 856 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { 857 c = clk_get(NULL, oc->clk); 858 if (IS_ERR(c)) { 859 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n", 860 oh->name, oc->clk); 861 ret = -EINVAL; 862 continue; 863 } 864 oc->_clk = c; 865 /* 866 * HACK: This needs a re-visit once clk_prepare() is implemented 867 * to do something meaningful. Today its just a no-op. 868 * If clk_prepare() is used at some point to do things like 869 * voltage scaling etc, then this would have to be moved to 870 * some point where subsystems like i2c and pmic become 871 * available. 872 */ 873 clk_prepare(oc->_clk); 874 } 875 876 return ret; 877 } 878 879 /** 880 * _enable_clocks - enable hwmod main clock and interface clocks 881 * @oh: struct omap_hwmod * 882 * 883 * Enables all clocks necessary for register reads and writes to succeed 884 * on the hwmod @oh. Returns 0. 885 */ 886 static int _enable_clocks(struct omap_hwmod *oh) 887 { 888 struct omap_hwmod_ocp_if *os; 889 struct list_head *p; 890 int i = 0; 891 892 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); 893 894 if (oh->_clk) 895 clk_enable(oh->_clk); 896 897 p = oh->slave_ports.next; 898 899 while (i < oh->slaves_cnt) { 900 os = _fetch_next_ocp_if(&p, &i); 901 902 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) 903 clk_enable(os->_clk); 904 } 905 906 /* The opt clocks are controlled by the device driver. */ 907 908 return 0; 909 } 910 911 /** 912 * _disable_clocks - disable hwmod main clock and interface clocks 913 * @oh: struct omap_hwmod * 914 * 915 * Disables the hwmod @oh main functional and interface clocks. Returns 0. 916 */ 917 static int _disable_clocks(struct omap_hwmod *oh) 918 { 919 struct omap_hwmod_ocp_if *os; 920 struct list_head *p; 921 int i = 0; 922 923 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); 924 925 if (oh->_clk) 926 clk_disable(oh->_clk); 927 928 p = oh->slave_ports.next; 929 930 while (i < oh->slaves_cnt) { 931 os = _fetch_next_ocp_if(&p, &i); 932 933 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) 934 clk_disable(os->_clk); 935 } 936 937 /* The opt clocks are controlled by the device driver. */ 938 939 return 0; 940 } 941 942 static void _enable_optional_clocks(struct omap_hwmod *oh) 943 { 944 struct omap_hwmod_opt_clk *oc; 945 int i; 946 947 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name); 948 949 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 950 if (oc->_clk) { 951 pr_debug("omap_hwmod: enable %s:%s\n", oc->role, 952 __clk_get_name(oc->_clk)); 953 clk_enable(oc->_clk); 954 } 955 } 956 957 static void _disable_optional_clocks(struct omap_hwmod *oh) 958 { 959 struct omap_hwmod_opt_clk *oc; 960 int i; 961 962 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name); 963 964 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 965 if (oc->_clk) { 966 pr_debug("omap_hwmod: disable %s:%s\n", oc->role, 967 __clk_get_name(oc->_clk)); 968 clk_disable(oc->_clk); 969 } 970 } 971 972 /** 973 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 974 * @oh: struct omap_hwmod * 975 * 976 * Enables the PRCM module mode related to the hwmod @oh. 977 * No return value. 978 */ 979 static void _omap4_enable_module(struct omap_hwmod *oh) 980 { 981 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 982 return; 983 984 pr_debug("omap_hwmod: %s: %s: %d\n", 985 oh->name, __func__, oh->prcm.omap4.modulemode); 986 987 omap_cm_module_enable(oh->prcm.omap4.modulemode, 988 oh->clkdm->prcm_partition, 989 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs); 990 } 991 992 /** 993 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 994 * @oh: struct omap_hwmod * 995 * 996 * Wait for a module @oh to enter slave idle. Returns 0 if the module 997 * does not have an IDLEST bit or if the module successfully enters 998 * slave idle; otherwise, pass along the return value of the 999 * appropriate *_cm*_wait_module_idle() function. 1000 */ 1001 static int _omap4_wait_target_disable(struct omap_hwmod *oh) 1002 { 1003 if (!oh) 1004 return -EINVAL; 1005 1006 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm) 1007 return 0; 1008 1009 if (oh->flags & HWMOD_NO_IDLEST) 1010 return 0; 1011 1012 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition, 1013 oh->clkdm->cm_inst, 1014 oh->prcm.omap4.clkctrl_offs, 0); 1015 } 1016 1017 /** 1018 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh 1019 * @oh: struct omap_hwmod *oh 1020 * 1021 * Count and return the number of MPU IRQs associated with the hwmod 1022 * @oh. Used to allocate struct resource data. Returns 0 if @oh is 1023 * NULL. 1024 */ 1025 static int _count_mpu_irqs(struct omap_hwmod *oh) 1026 { 1027 struct omap_hwmod_irq_info *ohii; 1028 int i = 0; 1029 1030 if (!oh || !oh->mpu_irqs) 1031 return 0; 1032 1033 do { 1034 ohii = &oh->mpu_irqs[i++]; 1035 } while (ohii->irq != -1); 1036 1037 return i-1; 1038 } 1039 1040 /** 1041 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh 1042 * @oh: struct omap_hwmod *oh 1043 * 1044 * Count and return the number of SDMA request lines associated with 1045 * the hwmod @oh. Used to allocate struct resource data. Returns 0 1046 * if @oh is NULL. 1047 */ 1048 static int _count_sdma_reqs(struct omap_hwmod *oh) 1049 { 1050 struct omap_hwmod_dma_info *ohdi; 1051 int i = 0; 1052 1053 if (!oh || !oh->sdma_reqs) 1054 return 0; 1055 1056 do { 1057 ohdi = &oh->sdma_reqs[i++]; 1058 } while (ohdi->dma_req != -1); 1059 1060 return i-1; 1061 } 1062 1063 /** 1064 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh 1065 * @oh: struct omap_hwmod *oh 1066 * 1067 * Count and return the number of address space ranges associated with 1068 * the hwmod @oh. Used to allocate struct resource data. Returns 0 1069 * if @oh is NULL. 1070 */ 1071 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) 1072 { 1073 struct omap_hwmod_addr_space *mem; 1074 int i = 0; 1075 1076 if (!os || !os->addr) 1077 return 0; 1078 1079 do { 1080 mem = &os->addr[i++]; 1081 } while (mem->pa_start != mem->pa_end); 1082 1083 return i-1; 1084 } 1085 1086 /** 1087 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name 1088 * @oh: struct omap_hwmod * to operate on 1089 * @name: pointer to the name of the MPU interrupt number to fetch (optional) 1090 * @irq: pointer to an unsigned int to store the MPU IRQ number to 1091 * 1092 * Retrieve a MPU hardware IRQ line number named by @name associated 1093 * with the IP block pointed to by @oh. The IRQ number will be filled 1094 * into the address pointed to by @dma. When @name is non-null, the 1095 * IRQ line number associated with the named entry will be returned. 1096 * If @name is null, the first matching entry will be returned. Data 1097 * order is not meaningful in hwmod data, so callers are strongly 1098 * encouraged to use a non-null @name whenever possible to avoid 1099 * unpredictable effects if hwmod data is later added that causes data 1100 * ordering to change. Returns 0 upon success or a negative error 1101 * code upon error. 1102 */ 1103 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name, 1104 unsigned int *irq) 1105 { 1106 int i; 1107 bool found = false; 1108 1109 if (!oh->mpu_irqs) 1110 return -ENOENT; 1111 1112 i = 0; 1113 while (oh->mpu_irqs[i].irq != -1) { 1114 if (name == oh->mpu_irqs[i].name || 1115 !strcmp(name, oh->mpu_irqs[i].name)) { 1116 found = true; 1117 break; 1118 } 1119 i++; 1120 } 1121 1122 if (!found) 1123 return -ENOENT; 1124 1125 *irq = oh->mpu_irqs[i].irq; 1126 1127 return 0; 1128 } 1129 1130 /** 1131 * _get_sdma_req_by_name - fetch SDMA request line ID by name 1132 * @oh: struct omap_hwmod * to operate on 1133 * @name: pointer to the name of the SDMA request line to fetch (optional) 1134 * @dma: pointer to an unsigned int to store the request line ID to 1135 * 1136 * Retrieve an SDMA request line ID named by @name on the IP block 1137 * pointed to by @oh. The ID will be filled into the address pointed 1138 * to by @dma. When @name is non-null, the request line ID associated 1139 * with the named entry will be returned. If @name is null, the first 1140 * matching entry will be returned. Data order is not meaningful in 1141 * hwmod data, so callers are strongly encouraged to use a non-null 1142 * @name whenever possible to avoid unpredictable effects if hwmod 1143 * data is later added that causes data ordering to change. Returns 0 1144 * upon success or a negative error code upon error. 1145 */ 1146 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name, 1147 unsigned int *dma) 1148 { 1149 int i; 1150 bool found = false; 1151 1152 if (!oh->sdma_reqs) 1153 return -ENOENT; 1154 1155 i = 0; 1156 while (oh->sdma_reqs[i].dma_req != -1) { 1157 if (name == oh->sdma_reqs[i].name || 1158 !strcmp(name, oh->sdma_reqs[i].name)) { 1159 found = true; 1160 break; 1161 } 1162 i++; 1163 } 1164 1165 if (!found) 1166 return -ENOENT; 1167 1168 *dma = oh->sdma_reqs[i].dma_req; 1169 1170 return 0; 1171 } 1172 1173 /** 1174 * _get_addr_space_by_name - fetch address space start & end by name 1175 * @oh: struct omap_hwmod * to operate on 1176 * @name: pointer to the name of the address space to fetch (optional) 1177 * @pa_start: pointer to a u32 to store the starting address to 1178 * @pa_end: pointer to a u32 to store the ending address to 1179 * 1180 * Retrieve address space start and end addresses for the IP block 1181 * pointed to by @oh. The data will be filled into the addresses 1182 * pointed to by @pa_start and @pa_end. When @name is non-null, the 1183 * address space data associated with the named entry will be 1184 * returned. If @name is null, the first matching entry will be 1185 * returned. Data order is not meaningful in hwmod data, so callers 1186 * are strongly encouraged to use a non-null @name whenever possible 1187 * to avoid unpredictable effects if hwmod data is later added that 1188 * causes data ordering to change. Returns 0 upon success or a 1189 * negative error code upon error. 1190 */ 1191 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name, 1192 u32 *pa_start, u32 *pa_end) 1193 { 1194 int i, j; 1195 struct omap_hwmod_ocp_if *os; 1196 struct list_head *p = NULL; 1197 bool found = false; 1198 1199 p = oh->slave_ports.next; 1200 1201 i = 0; 1202 while (i < oh->slaves_cnt) { 1203 os = _fetch_next_ocp_if(&p, &i); 1204 1205 if (!os->addr) 1206 return -ENOENT; 1207 1208 j = 0; 1209 while (os->addr[j].pa_start != os->addr[j].pa_end) { 1210 if (name == os->addr[j].name || 1211 !strcmp(name, os->addr[j].name)) { 1212 found = true; 1213 break; 1214 } 1215 j++; 1216 } 1217 1218 if (found) 1219 break; 1220 } 1221 1222 if (!found) 1223 return -ENOENT; 1224 1225 *pa_start = os->addr[j].pa_start; 1226 *pa_end = os->addr[j].pa_end; 1227 1228 return 0; 1229 } 1230 1231 /** 1232 * _save_mpu_port_index - find and save the index to @oh's MPU port 1233 * @oh: struct omap_hwmod * 1234 * 1235 * Determines the array index of the OCP slave port that the MPU uses 1236 * to address the device, and saves it into the struct omap_hwmod. 1237 * Intended to be called during hwmod registration only. No return 1238 * value. 1239 */ 1240 static void __init _save_mpu_port_index(struct omap_hwmod *oh) 1241 { 1242 struct omap_hwmod_ocp_if *os = NULL; 1243 struct list_head *p; 1244 int i = 0; 1245 1246 if (!oh) 1247 return; 1248 1249 oh->_int_flags |= _HWMOD_NO_MPU_PORT; 1250 1251 p = oh->slave_ports.next; 1252 1253 while (i < oh->slaves_cnt) { 1254 os = _fetch_next_ocp_if(&p, &i); 1255 if (os->user & OCP_USER_MPU) { 1256 oh->_mpu_port = os; 1257 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT; 1258 break; 1259 } 1260 } 1261 1262 return; 1263 } 1264 1265 /** 1266 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU 1267 * @oh: struct omap_hwmod * 1268 * 1269 * Given a pointer to a struct omap_hwmod record @oh, return a pointer 1270 * to the struct omap_hwmod_ocp_if record that is used by the MPU to 1271 * communicate with the IP block. This interface need not be directly 1272 * connected to the MPU (and almost certainly is not), but is directly 1273 * connected to the IP block represented by @oh. Returns a pointer 1274 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon 1275 * error or if there does not appear to be a path from the MPU to this 1276 * IP block. 1277 */ 1278 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh) 1279 { 1280 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0) 1281 return NULL; 1282 1283 return oh->_mpu_port; 1284 }; 1285 1286 /** 1287 * _find_mpu_rt_addr_space - return MPU register target address space for @oh 1288 * @oh: struct omap_hwmod * 1289 * 1290 * Returns a pointer to the struct omap_hwmod_addr_space record representing 1291 * the register target MPU address space; or returns NULL upon error. 1292 */ 1293 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh) 1294 { 1295 struct omap_hwmod_ocp_if *os; 1296 struct omap_hwmod_addr_space *mem; 1297 int found = 0, i = 0; 1298 1299 os = _find_mpu_rt_port(oh); 1300 if (!os || !os->addr) 1301 return NULL; 1302 1303 do { 1304 mem = &os->addr[i++]; 1305 if (mem->flags & ADDR_TYPE_RT) 1306 found = 1; 1307 } while (!found && mem->pa_start != mem->pa_end); 1308 1309 return (found) ? mem : NULL; 1310 } 1311 1312 /** 1313 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG 1314 * @oh: struct omap_hwmod * 1315 * 1316 * Ensure that the OCP_SYSCONFIG register for the IP block represented 1317 * by @oh is set to indicate to the PRCM that the IP block is active. 1318 * Usually this means placing the module into smart-idle mode and 1319 * smart-standby, but if there is a bug in the automatic idle handling 1320 * for the IP block, it may need to be placed into the force-idle or 1321 * no-idle variants of these modes. No return value. 1322 */ 1323 static void _enable_sysc(struct omap_hwmod *oh) 1324 { 1325 u8 idlemode, sf; 1326 u32 v; 1327 bool clkdm_act; 1328 struct clockdomain *clkdm; 1329 1330 if (!oh->class->sysc) 1331 return; 1332 1333 /* 1334 * Wait until reset has completed, this is needed as the IP 1335 * block is reset automatically by hardware in some cases 1336 * (off-mode for example), and the drivers require the 1337 * IP to be ready when they access it 1338 */ 1339 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1340 _enable_optional_clocks(oh); 1341 _wait_softreset_complete(oh); 1342 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1343 _disable_optional_clocks(oh); 1344 1345 v = oh->_sysc_cache; 1346 sf = oh->class->sysc->sysc_flags; 1347 1348 clkdm = _get_clkdm(oh); 1349 if (sf & SYSC_HAS_SIDLEMODE) { 1350 if (oh->flags & HWMOD_SWSUP_SIDLE || 1351 oh->flags & HWMOD_SWSUP_SIDLE_ACT) { 1352 idlemode = HWMOD_IDLEMODE_NO; 1353 } else { 1354 if (sf & SYSC_HAS_ENAWAKEUP) 1355 _enable_wakeup(oh, &v); 1356 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 1357 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1358 else 1359 idlemode = HWMOD_IDLEMODE_SMART; 1360 } 1361 1362 /* 1363 * This is special handling for some IPs like 1364 * 32k sync timer. Force them to idle! 1365 */ 1366 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU); 1367 if (clkdm_act && !(oh->class->sysc->idlemodes & 1368 (SIDLE_SMART | SIDLE_SMART_WKUP))) 1369 idlemode = HWMOD_IDLEMODE_FORCE; 1370 1371 _set_slave_idlemode(oh, idlemode, &v); 1372 } 1373 1374 if (sf & SYSC_HAS_MIDLEMODE) { 1375 if (oh->flags & HWMOD_FORCE_MSTANDBY) { 1376 idlemode = HWMOD_IDLEMODE_FORCE; 1377 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { 1378 idlemode = HWMOD_IDLEMODE_NO; 1379 } else { 1380 if (sf & SYSC_HAS_ENAWAKEUP) 1381 _enable_wakeup(oh, &v); 1382 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 1383 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1384 else 1385 idlemode = HWMOD_IDLEMODE_SMART; 1386 } 1387 _set_master_standbymode(oh, idlemode, &v); 1388 } 1389 1390 /* 1391 * XXX The clock framework should handle this, by 1392 * calling into this code. But this must wait until the 1393 * clock structures are tagged with omap_hwmod entries 1394 */ 1395 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && 1396 (sf & SYSC_HAS_CLOCKACTIVITY)) 1397 _set_clockactivity(oh, oh->class->sysc->clockact, &v); 1398 1399 /* If the cached value is the same as the new value, skip the write */ 1400 if (oh->_sysc_cache != v) 1401 _write_sysconfig(v, oh); 1402 1403 /* 1404 * Set the autoidle bit only after setting the smartidle bit 1405 * Setting this will not have any impact on the other modules. 1406 */ 1407 if (sf & SYSC_HAS_AUTOIDLE) { 1408 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? 1409 0 : 1; 1410 _set_module_autoidle(oh, idlemode, &v); 1411 _write_sysconfig(v, oh); 1412 } 1413 } 1414 1415 /** 1416 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG 1417 * @oh: struct omap_hwmod * 1418 * 1419 * If module is marked as SWSUP_SIDLE, force the module into slave 1420 * idle; otherwise, configure it for smart-idle. If module is marked 1421 * as SWSUP_MSUSPEND, force the module into master standby; otherwise, 1422 * configure it for smart-standby. No return value. 1423 */ 1424 static void _idle_sysc(struct omap_hwmod *oh) 1425 { 1426 u8 idlemode, sf; 1427 u32 v; 1428 1429 if (!oh->class->sysc) 1430 return; 1431 1432 v = oh->_sysc_cache; 1433 sf = oh->class->sysc->sysc_flags; 1434 1435 if (sf & SYSC_HAS_SIDLEMODE) { 1436 if (oh->flags & HWMOD_SWSUP_SIDLE) { 1437 idlemode = HWMOD_IDLEMODE_FORCE; 1438 } else { 1439 if (sf & SYSC_HAS_ENAWAKEUP) 1440 _enable_wakeup(oh, &v); 1441 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 1442 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1443 else 1444 idlemode = HWMOD_IDLEMODE_SMART; 1445 } 1446 _set_slave_idlemode(oh, idlemode, &v); 1447 } 1448 1449 if (sf & SYSC_HAS_MIDLEMODE) { 1450 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || 1451 (oh->flags & HWMOD_FORCE_MSTANDBY)) { 1452 idlemode = HWMOD_IDLEMODE_FORCE; 1453 } else { 1454 if (sf & SYSC_HAS_ENAWAKEUP) 1455 _enable_wakeup(oh, &v); 1456 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 1457 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1458 else 1459 idlemode = HWMOD_IDLEMODE_SMART; 1460 } 1461 _set_master_standbymode(oh, idlemode, &v); 1462 } 1463 1464 _write_sysconfig(v, oh); 1465 } 1466 1467 /** 1468 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG 1469 * @oh: struct omap_hwmod * 1470 * 1471 * Force the module into slave idle and master suspend. No return 1472 * value. 1473 */ 1474 static void _shutdown_sysc(struct omap_hwmod *oh) 1475 { 1476 u32 v; 1477 u8 sf; 1478 1479 if (!oh->class->sysc) 1480 return; 1481 1482 v = oh->_sysc_cache; 1483 sf = oh->class->sysc->sysc_flags; 1484 1485 if (sf & SYSC_HAS_SIDLEMODE) 1486 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); 1487 1488 if (sf & SYSC_HAS_MIDLEMODE) 1489 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); 1490 1491 if (sf & SYSC_HAS_AUTOIDLE) 1492 _set_module_autoidle(oh, 1, &v); 1493 1494 _write_sysconfig(v, oh); 1495 } 1496 1497 /** 1498 * _lookup - find an omap_hwmod by name 1499 * @name: find an omap_hwmod by name 1500 * 1501 * Return a pointer to an omap_hwmod by name, or NULL if not found. 1502 */ 1503 static struct omap_hwmod *_lookup(const char *name) 1504 { 1505 struct omap_hwmod *oh, *temp_oh; 1506 1507 oh = NULL; 1508 1509 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 1510 if (!strcmp(name, temp_oh->name)) { 1511 oh = temp_oh; 1512 break; 1513 } 1514 } 1515 1516 return oh; 1517 } 1518 1519 /** 1520 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod 1521 * @oh: struct omap_hwmod * 1522 * 1523 * Convert a clockdomain name stored in a struct omap_hwmod into a 1524 * clockdomain pointer, and save it into the struct omap_hwmod. 1525 * Return -EINVAL if the clkdm_name lookup failed. 1526 */ 1527 static int _init_clkdm(struct omap_hwmod *oh) 1528 { 1529 if (!oh->clkdm_name) { 1530 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name); 1531 return 0; 1532 } 1533 1534 oh->clkdm = clkdm_lookup(oh->clkdm_name); 1535 if (!oh->clkdm) { 1536 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n", 1537 oh->name, oh->clkdm_name); 1538 return 0; 1539 } 1540 1541 pr_debug("omap_hwmod: %s: associated to clkdm %s\n", 1542 oh->name, oh->clkdm_name); 1543 1544 return 0; 1545 } 1546 1547 /** 1548 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as 1549 * well the clockdomain. 1550 * @oh: struct omap_hwmod * 1551 * @data: not used; pass NULL 1552 * 1553 * Called by omap_hwmod_setup_*() (after omap2_clk_init()). 1554 * Resolves all clock names embedded in the hwmod. Returns 0 on 1555 * success, or a negative error code on failure. 1556 */ 1557 static int _init_clocks(struct omap_hwmod *oh, void *data) 1558 { 1559 int ret = 0; 1560 1561 if (oh->_state != _HWMOD_STATE_REGISTERED) 1562 return 0; 1563 1564 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); 1565 1566 if (soc_ops.init_clkdm) 1567 ret |= soc_ops.init_clkdm(oh); 1568 1569 ret |= _init_main_clk(oh); 1570 ret |= _init_interface_clks(oh); 1571 ret |= _init_opt_clks(oh); 1572 1573 if (!ret) 1574 oh->_state = _HWMOD_STATE_CLKS_INITED; 1575 else 1576 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name); 1577 1578 return ret; 1579 } 1580 1581 /** 1582 * _lookup_hardreset - fill register bit info for this hwmod/reset line 1583 * @oh: struct omap_hwmod * 1584 * @name: name of the reset line in the context of this hwmod 1585 * @ohri: struct omap_hwmod_rst_info * that this function will fill in 1586 * 1587 * Return the bit position of the reset line that match the 1588 * input name. Return -ENOENT if not found. 1589 */ 1590 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, 1591 struct omap_hwmod_rst_info *ohri) 1592 { 1593 int i; 1594 1595 for (i = 0; i < oh->rst_lines_cnt; i++) { 1596 const char *rst_line = oh->rst_lines[i].name; 1597 if (!strcmp(rst_line, name)) { 1598 ohri->rst_shift = oh->rst_lines[i].rst_shift; 1599 ohri->st_shift = oh->rst_lines[i].st_shift; 1600 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", 1601 oh->name, __func__, rst_line, ohri->rst_shift, 1602 ohri->st_shift); 1603 1604 return 0; 1605 } 1606 } 1607 1608 return -ENOENT; 1609 } 1610 1611 /** 1612 * _assert_hardreset - assert the HW reset line of submodules 1613 * contained in the hwmod module. 1614 * @oh: struct omap_hwmod * 1615 * @name: name of the reset line to lookup and assert 1616 * 1617 * Some IP like dsp, ipu or iva contain processor that require an HW 1618 * reset line to be assert / deassert in order to enable fully the IP. 1619 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of 1620 * asserting the hardreset line on the currently-booted SoC, or passes 1621 * along the return value from _lookup_hardreset() or the SoC's 1622 * assert_hardreset code. 1623 */ 1624 static int _assert_hardreset(struct omap_hwmod *oh, const char *name) 1625 { 1626 struct omap_hwmod_rst_info ohri; 1627 int ret = -EINVAL; 1628 1629 if (!oh) 1630 return -EINVAL; 1631 1632 if (!soc_ops.assert_hardreset) 1633 return -ENOSYS; 1634 1635 ret = _lookup_hardreset(oh, name, &ohri); 1636 if (ret < 0) 1637 return ret; 1638 1639 ret = soc_ops.assert_hardreset(oh, &ohri); 1640 1641 return ret; 1642 } 1643 1644 /** 1645 * _deassert_hardreset - deassert the HW reset line of submodules contained 1646 * in the hwmod module. 1647 * @oh: struct omap_hwmod * 1648 * @name: name of the reset line to look up and deassert 1649 * 1650 * Some IP like dsp, ipu or iva contain processor that require an HW 1651 * reset line to be assert / deassert in order to enable fully the IP. 1652 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of 1653 * deasserting the hardreset line on the currently-booted SoC, or passes 1654 * along the return value from _lookup_hardreset() or the SoC's 1655 * deassert_hardreset code. 1656 */ 1657 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) 1658 { 1659 struct omap_hwmod_rst_info ohri; 1660 int ret = -EINVAL; 1661 int hwsup = 0; 1662 1663 if (!oh) 1664 return -EINVAL; 1665 1666 if (!soc_ops.deassert_hardreset) 1667 return -ENOSYS; 1668 1669 ret = _lookup_hardreset(oh, name, &ohri); 1670 if (ret < 0) 1671 return ret; 1672 1673 if (oh->clkdm) { 1674 /* 1675 * A clockdomain must be in SW_SUP otherwise reset 1676 * might not be completed. The clockdomain can be set 1677 * in HW_AUTO only when the module become ready. 1678 */ 1679 hwsup = clkdm_in_hwsup(oh->clkdm); 1680 ret = clkdm_hwmod_enable(oh->clkdm, oh); 1681 if (ret) { 1682 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", 1683 oh->name, oh->clkdm->name, ret); 1684 return ret; 1685 } 1686 } 1687 1688 _enable_clocks(oh); 1689 if (soc_ops.enable_module) 1690 soc_ops.enable_module(oh); 1691 1692 ret = soc_ops.deassert_hardreset(oh, &ohri); 1693 1694 if (soc_ops.disable_module) 1695 soc_ops.disable_module(oh); 1696 _disable_clocks(oh); 1697 1698 if (ret == -EBUSY) 1699 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); 1700 1701 if (oh->clkdm) { 1702 /* 1703 * Set the clockdomain to HW_AUTO, assuming that the 1704 * previous state was HW_AUTO. 1705 */ 1706 if (hwsup) 1707 clkdm_allow_idle(oh->clkdm); 1708 1709 clkdm_hwmod_disable(oh->clkdm, oh); 1710 } 1711 1712 return ret; 1713 } 1714 1715 /** 1716 * _read_hardreset - read the HW reset line state of submodules 1717 * contained in the hwmod module 1718 * @oh: struct omap_hwmod * 1719 * @name: name of the reset line to look up and read 1720 * 1721 * Return the state of the reset line. Returns -EINVAL if @oh is 1722 * null, -ENOSYS if we have no way of reading the hardreset line 1723 * status on the currently-booted SoC, or passes along the return 1724 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted 1725 * code. 1726 */ 1727 static int _read_hardreset(struct omap_hwmod *oh, const char *name) 1728 { 1729 struct omap_hwmod_rst_info ohri; 1730 int ret = -EINVAL; 1731 1732 if (!oh) 1733 return -EINVAL; 1734 1735 if (!soc_ops.is_hardreset_asserted) 1736 return -ENOSYS; 1737 1738 ret = _lookup_hardreset(oh, name, &ohri); 1739 if (ret < 0) 1740 return ret; 1741 1742 return soc_ops.is_hardreset_asserted(oh, &ohri); 1743 } 1744 1745 /** 1746 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset 1747 * @oh: struct omap_hwmod * 1748 * 1749 * If all hardreset lines associated with @oh are asserted, then return true. 1750 * Otherwise, if part of @oh is out hardreset or if no hardreset lines 1751 * associated with @oh are asserted, then return false. 1752 * This function is used to avoid executing some parts of the IP block 1753 * enable/disable sequence if its hardreset line is set. 1754 */ 1755 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) 1756 { 1757 int i, rst_cnt = 0; 1758 1759 if (oh->rst_lines_cnt == 0) 1760 return false; 1761 1762 for (i = 0; i < oh->rst_lines_cnt; i++) 1763 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) 1764 rst_cnt++; 1765 1766 if (oh->rst_lines_cnt == rst_cnt) 1767 return true; 1768 1769 return false; 1770 } 1771 1772 /** 1773 * _are_any_hardreset_lines_asserted - return true if any part of @oh is 1774 * hard-reset 1775 * @oh: struct omap_hwmod * 1776 * 1777 * If any hardreset lines associated with @oh are asserted, then 1778 * return true. Otherwise, if no hardreset lines associated with @oh 1779 * are asserted, or if @oh has no hardreset lines, then return false. 1780 * This function is used to avoid executing some parts of the IP block 1781 * enable/disable sequence if any hardreset line is set. 1782 */ 1783 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh) 1784 { 1785 int rst_cnt = 0; 1786 int i; 1787 1788 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++) 1789 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) 1790 rst_cnt++; 1791 1792 return (rst_cnt) ? true : false; 1793 } 1794 1795 /** 1796 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 1797 * @oh: struct omap_hwmod * 1798 * 1799 * Disable the PRCM module mode related to the hwmod @oh. 1800 * Return EINVAL if the modulemode is not supported and 0 in case of success. 1801 */ 1802 static int _omap4_disable_module(struct omap_hwmod *oh) 1803 { 1804 int v; 1805 1806 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 1807 return -EINVAL; 1808 1809 /* 1810 * Since integration code might still be doing something, only 1811 * disable if all lines are under hardreset. 1812 */ 1813 if (_are_any_hardreset_lines_asserted(oh)) 1814 return 0; 1815 1816 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); 1817 1818 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst, 1819 oh->prcm.omap4.clkctrl_offs); 1820 1821 v = _omap4_wait_target_disable(oh); 1822 if (v) 1823 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", 1824 oh->name); 1825 1826 return 0; 1827 } 1828 1829 /** 1830 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit 1831 * @oh: struct omap_hwmod * 1832 * 1833 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be 1834 * enabled for this to work. Returns -ENOENT if the hwmod cannot be 1835 * reset this way, -EINVAL if the hwmod is in the wrong state, 1836 * -ETIMEDOUT if the module did not reset in time, or 0 upon success. 1837 * 1838 * In OMAP3 a specific SYSSTATUS register is used to get the reset status. 1839 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead 1840 * use the SYSCONFIG softreset bit to provide the status. 1841 * 1842 * Note that some IP like McBSP do have reset control but don't have 1843 * reset status. 1844 */ 1845 static int _ocp_softreset(struct omap_hwmod *oh) 1846 { 1847 u32 v; 1848 int c = 0; 1849 int ret = 0; 1850 1851 if (!oh->class->sysc || 1852 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 1853 return -ENOENT; 1854 1855 /* clocks must be on for this operation */ 1856 if (oh->_state != _HWMOD_STATE_ENABLED) { 1857 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", 1858 oh->name); 1859 return -EINVAL; 1860 } 1861 1862 /* For some modules, all optionnal clocks need to be enabled as well */ 1863 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1864 _enable_optional_clocks(oh); 1865 1866 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name); 1867 1868 v = oh->_sysc_cache; 1869 ret = _set_softreset(oh, &v); 1870 if (ret) 1871 goto dis_opt_clks; 1872 1873 _write_sysconfig(v, oh); 1874 1875 if (oh->class->sysc->srst_udelay) 1876 udelay(oh->class->sysc->srst_udelay); 1877 1878 c = _wait_softreset_complete(oh); 1879 if (c == MAX_MODULE_SOFTRESET_WAIT) { 1880 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1881 oh->name, MAX_MODULE_SOFTRESET_WAIT); 1882 ret = -ETIMEDOUT; 1883 goto dis_opt_clks; 1884 } else { 1885 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); 1886 } 1887 1888 ret = _clear_softreset(oh, &v); 1889 if (ret) 1890 goto dis_opt_clks; 1891 1892 _write_sysconfig(v, oh); 1893 1894 /* 1895 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from 1896 * _wait_target_ready() or _reset() 1897 */ 1898 1899 dis_opt_clks: 1900 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1901 _disable_optional_clocks(oh); 1902 1903 return ret; 1904 } 1905 1906 /** 1907 * _reset - reset an omap_hwmod 1908 * @oh: struct omap_hwmod * 1909 * 1910 * Resets an omap_hwmod @oh. If the module has a custom reset 1911 * function pointer defined, then call it to reset the IP block, and 1912 * pass along its return value to the caller. Otherwise, if the IP 1913 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield 1914 * associated with it, call a function to reset the IP block via that 1915 * method, and pass along the return value to the caller. Finally, if 1916 * the IP block has some hardreset lines associated with it, assert 1917 * all of those, but do _not_ deassert them. (This is because driver 1918 * authors have expressed an apparent requirement to control the 1919 * deassertion of the hardreset lines themselves.) 1920 * 1921 * The default software reset mechanism for most OMAP IP blocks is 1922 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some 1923 * hwmods cannot be reset via this method. Some are not targets and 1924 * therefore have no OCP header registers to access. Others (like the 1925 * IVA) have idiosyncratic reset sequences. So for these relatively 1926 * rare cases, custom reset code can be supplied in the struct 1927 * omap_hwmod_class .reset function pointer. 1928 * 1929 * _set_dmadisable() is called to set the DMADISABLE bit so that it 1930 * does not prevent idling of the system. This is necessary for cases 1931 * where ROMCODE/BOOTLOADER uses dma and transfers control to the 1932 * kernel without disabling dma. 1933 * 1934 * Passes along the return value from either _ocp_softreset() or the 1935 * custom reset function - these must return -EINVAL if the hwmod 1936 * cannot be reset this way or if the hwmod is in the wrong state, 1937 * -ETIMEDOUT if the module did not reset in time, or 0 upon success. 1938 */ 1939 static int _reset(struct omap_hwmod *oh) 1940 { 1941 int i, r; 1942 1943 pr_debug("omap_hwmod: %s: resetting\n", oh->name); 1944 1945 if (oh->class->reset) { 1946 r = oh->class->reset(oh); 1947 } else { 1948 if (oh->rst_lines_cnt > 0) { 1949 for (i = 0; i < oh->rst_lines_cnt; i++) 1950 _assert_hardreset(oh, oh->rst_lines[i].name); 1951 return 0; 1952 } else { 1953 r = _ocp_softreset(oh); 1954 if (r == -ENOENT) 1955 r = 0; 1956 } 1957 } 1958 1959 _set_dmadisable(oh); 1960 1961 /* 1962 * OCP_SYSCONFIG bits need to be reprogrammed after a 1963 * softreset. The _enable() function should be split to avoid 1964 * the rewrite of the OCP_SYSCONFIG register. 1965 */ 1966 if (oh->class->sysc) { 1967 _update_sysc_cache(oh); 1968 _enable_sysc(oh); 1969 } 1970 1971 return r; 1972 } 1973 1974 /** 1975 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain 1976 * 1977 * Call the appropriate PRM function to clear any logged I/O chain 1978 * wakeups and to reconfigure the chain. This apparently needs to be 1979 * done upon every mux change. Since hwmods can be concurrently 1980 * enabled and idled, hold a spinlock around the I/O chain 1981 * reconfiguration sequence. No return value. 1982 * 1983 * XXX When the PRM code is moved to drivers, this function can be removed, 1984 * as the PRM infrastructure should abstract this. 1985 */ 1986 static void _reconfigure_io_chain(void) 1987 { 1988 unsigned long flags; 1989 1990 spin_lock_irqsave(&io_chain_lock, flags); 1991 1992 omap_prm_reconfigure_io_chain(); 1993 1994 spin_unlock_irqrestore(&io_chain_lock, flags); 1995 } 1996 1997 /** 1998 * _omap4_update_context_lost - increment hwmod context loss counter if 1999 * hwmod context was lost, and clear hardware context loss reg 2000 * @oh: hwmod to check for context loss 2001 * 2002 * If the PRCM indicates that the hwmod @oh lost context, increment 2003 * our in-memory context loss counter, and clear the RM_*_CONTEXT 2004 * bits. No return value. 2005 */ 2006 static void _omap4_update_context_lost(struct omap_hwmod *oh) 2007 { 2008 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT) 2009 return; 2010 2011 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition, 2012 oh->clkdm->pwrdm.ptr->prcm_offs, 2013 oh->prcm.omap4.context_offs)) 2014 return; 2015 2016 oh->prcm.omap4.context_lost_counter++; 2017 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition, 2018 oh->clkdm->pwrdm.ptr->prcm_offs, 2019 oh->prcm.omap4.context_offs); 2020 } 2021 2022 /** 2023 * _omap4_get_context_lost - get context loss counter for a hwmod 2024 * @oh: hwmod to get context loss counter for 2025 * 2026 * Returns the in-memory context loss counter for a hwmod. 2027 */ 2028 static int _omap4_get_context_lost(struct omap_hwmod *oh) 2029 { 2030 return oh->prcm.omap4.context_lost_counter; 2031 } 2032 2033 /** 2034 * _enable_preprogram - Pre-program an IP block during the _enable() process 2035 * @oh: struct omap_hwmod * 2036 * 2037 * Some IP blocks (such as AESS) require some additional programming 2038 * after enable before they can enter idle. If a function pointer to 2039 * do so is present in the hwmod data, then call it and pass along the 2040 * return value; otherwise, return 0. 2041 */ 2042 static int _enable_preprogram(struct omap_hwmod *oh) 2043 { 2044 if (!oh->class->enable_preprogram) 2045 return 0; 2046 2047 return oh->class->enable_preprogram(oh); 2048 } 2049 2050 /** 2051 * _enable - enable an omap_hwmod 2052 * @oh: struct omap_hwmod * 2053 * 2054 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's 2055 * register target. Returns -EINVAL if the hwmod is in the wrong 2056 * state or passes along the return value of _wait_target_ready(). 2057 */ 2058 static int _enable(struct omap_hwmod *oh) 2059 { 2060 int r; 2061 int hwsup = 0; 2062 2063 pr_debug("omap_hwmod: %s: enabling\n", oh->name); 2064 2065 /* 2066 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled 2067 * state at init. Now that someone is really trying to enable 2068 * them, just ensure that the hwmod mux is set. 2069 */ 2070 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { 2071 /* 2072 * If the caller has mux data populated, do the mux'ing 2073 * which wouldn't have been done as part of the _enable() 2074 * done during setup. 2075 */ 2076 if (oh->mux) 2077 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2078 2079 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; 2080 return 0; 2081 } 2082 2083 if (oh->_state != _HWMOD_STATE_INITIALIZED && 2084 oh->_state != _HWMOD_STATE_IDLE && 2085 oh->_state != _HWMOD_STATE_DISABLED) { 2086 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", 2087 oh->name); 2088 return -EINVAL; 2089 } 2090 2091 /* 2092 * If an IP block contains HW reset lines and all of them are 2093 * asserted, we let integration code associated with that 2094 * block handle the enable. We've received very little 2095 * information on what those driver authors need, and until 2096 * detailed information is provided and the driver code is 2097 * posted to the public lists, this is probably the best we 2098 * can do. 2099 */ 2100 if (_are_all_hardreset_lines_asserted(oh)) 2101 return 0; 2102 2103 /* Mux pins for device runtime if populated */ 2104 if (oh->mux && (!oh->mux->enabled || 2105 ((oh->_state == _HWMOD_STATE_IDLE) && 2106 oh->mux->pads_dynamic))) { 2107 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2108 _reconfigure_io_chain(); 2109 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { 2110 _reconfigure_io_chain(); 2111 } 2112 2113 _add_initiator_dep(oh, mpu_oh); 2114 2115 if (oh->clkdm) { 2116 /* 2117 * A clockdomain must be in SW_SUP before enabling 2118 * completely the module. The clockdomain can be set 2119 * in HW_AUTO only when the module become ready. 2120 */ 2121 hwsup = clkdm_in_hwsup(oh->clkdm) && 2122 !clkdm_missing_idle_reporting(oh->clkdm); 2123 r = clkdm_hwmod_enable(oh->clkdm, oh); 2124 if (r) { 2125 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", 2126 oh->name, oh->clkdm->name, r); 2127 return r; 2128 } 2129 } 2130 2131 _enable_clocks(oh); 2132 if (soc_ops.enable_module) 2133 soc_ops.enable_module(oh); 2134 if (oh->flags & HWMOD_BLOCK_WFI) 2135 cpu_idle_poll_ctrl(true); 2136 2137 if (soc_ops.update_context_lost) 2138 soc_ops.update_context_lost(oh); 2139 2140 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : 2141 -EINVAL; 2142 if (!r) { 2143 /* 2144 * Set the clockdomain to HW_AUTO only if the target is ready, 2145 * assuming that the previous state was HW_AUTO 2146 */ 2147 if (oh->clkdm && hwsup) 2148 clkdm_allow_idle(oh->clkdm); 2149 2150 oh->_state = _HWMOD_STATE_ENABLED; 2151 2152 /* Access the sysconfig only if the target is ready */ 2153 if (oh->class->sysc) { 2154 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) 2155 _update_sysc_cache(oh); 2156 _enable_sysc(oh); 2157 } 2158 r = _enable_preprogram(oh); 2159 } else { 2160 if (soc_ops.disable_module) 2161 soc_ops.disable_module(oh); 2162 _disable_clocks(oh); 2163 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n", 2164 oh->name, r); 2165 2166 if (oh->clkdm) 2167 clkdm_hwmod_disable(oh->clkdm, oh); 2168 } 2169 2170 return r; 2171 } 2172 2173 /** 2174 * _idle - idle an omap_hwmod 2175 * @oh: struct omap_hwmod * 2176 * 2177 * Idles an omap_hwmod @oh. This should be called once the hwmod has 2178 * no further work. Returns -EINVAL if the hwmod is in the wrong 2179 * state or returns 0. 2180 */ 2181 static int _idle(struct omap_hwmod *oh) 2182 { 2183 pr_debug("omap_hwmod: %s: idling\n", oh->name); 2184 2185 if (oh->_state != _HWMOD_STATE_ENABLED) { 2186 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", 2187 oh->name); 2188 return -EINVAL; 2189 } 2190 2191 if (_are_all_hardreset_lines_asserted(oh)) 2192 return 0; 2193 2194 if (oh->class->sysc) 2195 _idle_sysc(oh); 2196 _del_initiator_dep(oh, mpu_oh); 2197 2198 if (oh->flags & HWMOD_BLOCK_WFI) 2199 cpu_idle_poll_ctrl(false); 2200 if (soc_ops.disable_module) 2201 soc_ops.disable_module(oh); 2202 2203 /* 2204 * The module must be in idle mode before disabling any parents 2205 * clocks. Otherwise, the parent clock might be disabled before 2206 * the module transition is done, and thus will prevent the 2207 * transition to complete properly. 2208 */ 2209 _disable_clocks(oh); 2210 if (oh->clkdm) 2211 clkdm_hwmod_disable(oh->clkdm, oh); 2212 2213 /* Mux pins for device idle if populated */ 2214 if (oh->mux && oh->mux->pads_dynamic) { 2215 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 2216 _reconfigure_io_chain(); 2217 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { 2218 _reconfigure_io_chain(); 2219 } 2220 2221 oh->_state = _HWMOD_STATE_IDLE; 2222 2223 return 0; 2224 } 2225 2226 /** 2227 * _shutdown - shutdown an omap_hwmod 2228 * @oh: struct omap_hwmod * 2229 * 2230 * Shut down an omap_hwmod @oh. This should be called when the driver 2231 * used for the hwmod is removed or unloaded or if the driver is not 2232 * used by the system. Returns -EINVAL if the hwmod is in the wrong 2233 * state or returns 0. 2234 */ 2235 static int _shutdown(struct omap_hwmod *oh) 2236 { 2237 int ret, i; 2238 u8 prev_state; 2239 2240 if (oh->_state != _HWMOD_STATE_IDLE && 2241 oh->_state != _HWMOD_STATE_ENABLED) { 2242 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", 2243 oh->name); 2244 return -EINVAL; 2245 } 2246 2247 if (_are_all_hardreset_lines_asserted(oh)) 2248 return 0; 2249 2250 pr_debug("omap_hwmod: %s: disabling\n", oh->name); 2251 2252 if (oh->class->pre_shutdown) { 2253 prev_state = oh->_state; 2254 if (oh->_state == _HWMOD_STATE_IDLE) 2255 _enable(oh); 2256 ret = oh->class->pre_shutdown(oh); 2257 if (ret) { 2258 if (prev_state == _HWMOD_STATE_IDLE) 2259 _idle(oh); 2260 return ret; 2261 } 2262 } 2263 2264 if (oh->class->sysc) { 2265 if (oh->_state == _HWMOD_STATE_IDLE) 2266 _enable(oh); 2267 _shutdown_sysc(oh); 2268 } 2269 2270 /* clocks and deps are already disabled in idle */ 2271 if (oh->_state == _HWMOD_STATE_ENABLED) { 2272 _del_initiator_dep(oh, mpu_oh); 2273 /* XXX what about the other system initiators here? dma, dsp */ 2274 if (oh->flags & HWMOD_BLOCK_WFI) 2275 cpu_idle_poll_ctrl(false); 2276 if (soc_ops.disable_module) 2277 soc_ops.disable_module(oh); 2278 _disable_clocks(oh); 2279 if (oh->clkdm) 2280 clkdm_hwmod_disable(oh->clkdm, oh); 2281 } 2282 /* XXX Should this code also force-disable the optional clocks? */ 2283 2284 for (i = 0; i < oh->rst_lines_cnt; i++) 2285 _assert_hardreset(oh, oh->rst_lines[i].name); 2286 2287 /* Mux pins to safe mode or use populated off mode values */ 2288 if (oh->mux) 2289 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); 2290 2291 oh->_state = _HWMOD_STATE_DISABLED; 2292 2293 return 0; 2294 } 2295 2296 static int of_dev_find_hwmod(struct device_node *np, 2297 struct omap_hwmod *oh) 2298 { 2299 int count, i, res; 2300 const char *p; 2301 2302 count = of_property_count_strings(np, "ti,hwmods"); 2303 if (count < 1) 2304 return -ENODEV; 2305 2306 for (i = 0; i < count; i++) { 2307 res = of_property_read_string_index(np, "ti,hwmods", 2308 i, &p); 2309 if (res) 2310 continue; 2311 if (!strcmp(p, oh->name)) { 2312 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n", 2313 np->name, i, oh->name); 2314 return i; 2315 } 2316 } 2317 2318 return -ENODEV; 2319 } 2320 2321 /** 2322 * of_dev_hwmod_lookup - look up needed hwmod from dt blob 2323 * @np: struct device_node * 2324 * @oh: struct omap_hwmod * 2325 * @index: index of the entry found 2326 * @found: struct device_node * found or NULL 2327 * 2328 * Parse the dt blob and find out needed hwmod. Recursive function is 2329 * implemented to take care hierarchical dt blob parsing. 2330 * Return: Returns 0 on success, -ENODEV when not found. 2331 */ 2332 static int of_dev_hwmod_lookup(struct device_node *np, 2333 struct omap_hwmod *oh, 2334 int *index, 2335 struct device_node **found) 2336 { 2337 struct device_node *np0 = NULL; 2338 int res; 2339 2340 res = of_dev_find_hwmod(np, oh); 2341 if (res >= 0) { 2342 *found = np; 2343 *index = res; 2344 return 0; 2345 } 2346 2347 for_each_child_of_node(np, np0) { 2348 struct device_node *fc; 2349 int i; 2350 2351 res = of_dev_hwmod_lookup(np0, oh, &i, &fc); 2352 if (res == 0) { 2353 *found = fc; 2354 *index = i; 2355 return 0; 2356 } 2357 } 2358 2359 *found = NULL; 2360 *index = 0; 2361 2362 return -ENODEV; 2363 } 2364 2365 /** 2366 * _init_mpu_rt_base - populate the virtual address for a hwmod 2367 * @oh: struct omap_hwmod * to locate the virtual address 2368 * @data: (unused, caller should pass NULL) 2369 * @index: index of the reg entry iospace in device tree 2370 * @np: struct device_node * of the IP block's device node in the DT data 2371 * 2372 * Cache the virtual address used by the MPU to access this IP block's 2373 * registers. This address is needed early so the OCP registers that 2374 * are part of the device's address space can be ioremapped properly. 2375 * 2376 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and 2377 * -ENXIO on absent or invalid register target address space. 2378 */ 2379 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, 2380 int index, struct device_node *np) 2381 { 2382 struct omap_hwmod_addr_space *mem; 2383 void __iomem *va_start = NULL; 2384 2385 if (!oh) 2386 return -EINVAL; 2387 2388 _save_mpu_port_index(oh); 2389 2390 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 2391 return -ENXIO; 2392 2393 mem = _find_mpu_rt_addr_space(oh); 2394 if (!mem) { 2395 pr_debug("omap_hwmod: %s: no MPU register target found\n", 2396 oh->name); 2397 2398 /* Extract the IO space from device tree blob */ 2399 if (!np) 2400 return -ENXIO; 2401 2402 va_start = of_iomap(np, index + oh->mpu_rt_idx); 2403 } else { 2404 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); 2405 } 2406 2407 if (!va_start) { 2408 if (mem) 2409 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); 2410 else 2411 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n", 2412 oh->name, index, np->full_name); 2413 return -ENXIO; 2414 } 2415 2416 pr_debug("omap_hwmod: %s: MPU register target at va %p\n", 2417 oh->name, va_start); 2418 2419 oh->_mpu_rt_va = va_start; 2420 return 0; 2421 } 2422 2423 /** 2424 * _init - initialize internal data for the hwmod @oh 2425 * @oh: struct omap_hwmod * 2426 * @n: (unused) 2427 * 2428 * Look up the clocks and the address space used by the MPU to access 2429 * registers belonging to the hwmod @oh. @oh must already be 2430 * registered at this point. This is the first of two phases for 2431 * hwmod initialization. Code called here does not touch any hardware 2432 * registers, it simply prepares internal data structures. Returns 0 2433 * upon success or if the hwmod isn't registered or if the hwmod's 2434 * address space is not defined, or -EINVAL upon failure. 2435 */ 2436 static int __init _init(struct omap_hwmod *oh, void *data) 2437 { 2438 int r, index; 2439 struct device_node *np = NULL; 2440 2441 if (oh->_state != _HWMOD_STATE_REGISTERED) 2442 return 0; 2443 2444 if (of_have_populated_dt()) { 2445 struct device_node *bus; 2446 2447 bus = of_find_node_by_name(NULL, "ocp"); 2448 if (!bus) 2449 return -ENODEV; 2450 2451 r = of_dev_hwmod_lookup(bus, oh, &index, &np); 2452 if (r) 2453 pr_debug("omap_hwmod: %s missing dt data\n", oh->name); 2454 else if (np && index) 2455 pr_warn("omap_hwmod: %s using broken dt data from %s\n", 2456 oh->name, np->name); 2457 } 2458 2459 if (oh->class->sysc) { 2460 r = _init_mpu_rt_base(oh, NULL, index, np); 2461 if (r < 0) { 2462 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", 2463 oh->name); 2464 return 0; 2465 } 2466 } 2467 2468 r = _init_clocks(oh, NULL); 2469 if (r < 0) { 2470 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name); 2471 return -EINVAL; 2472 } 2473 2474 if (np) { 2475 if (of_find_property(np, "ti,no-reset-on-init", NULL)) 2476 oh->flags |= HWMOD_INIT_NO_RESET; 2477 if (of_find_property(np, "ti,no-idle-on-init", NULL)) 2478 oh->flags |= HWMOD_INIT_NO_IDLE; 2479 } 2480 2481 oh->_state = _HWMOD_STATE_INITIALIZED; 2482 2483 return 0; 2484 } 2485 2486 /** 2487 * _setup_iclk_autoidle - configure an IP block's interface clocks 2488 * @oh: struct omap_hwmod * 2489 * 2490 * Set up the module's interface clocks. XXX This function is still mostly 2491 * a stub; implementing this properly requires iclk autoidle usecounting in 2492 * the clock code. No return value. 2493 */ 2494 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh) 2495 { 2496 struct omap_hwmod_ocp_if *os; 2497 struct list_head *p; 2498 int i = 0; 2499 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2500 return; 2501 2502 p = oh->slave_ports.next; 2503 2504 while (i < oh->slaves_cnt) { 2505 os = _fetch_next_ocp_if(&p, &i); 2506 if (!os->_clk) 2507 continue; 2508 2509 if (os->flags & OCPIF_SWSUP_IDLE) { 2510 /* XXX omap_iclk_deny_idle(c); */ 2511 } else { 2512 /* XXX omap_iclk_allow_idle(c); */ 2513 clk_enable(os->_clk); 2514 } 2515 } 2516 2517 return; 2518 } 2519 2520 /** 2521 * _setup_reset - reset an IP block during the setup process 2522 * @oh: struct omap_hwmod * 2523 * 2524 * Reset the IP block corresponding to the hwmod @oh during the setup 2525 * process. The IP block is first enabled so it can be successfully 2526 * reset. Returns 0 upon success or a negative error code upon 2527 * failure. 2528 */ 2529 static int __init _setup_reset(struct omap_hwmod *oh) 2530 { 2531 int r; 2532 2533 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2534 return -EINVAL; 2535 2536 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) 2537 return -EPERM; 2538 2539 if (oh->rst_lines_cnt == 0) { 2540 r = _enable(oh); 2541 if (r) { 2542 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n", 2543 oh->name, oh->_state); 2544 return -EINVAL; 2545 } 2546 } 2547 2548 if (!(oh->flags & HWMOD_INIT_NO_RESET)) 2549 r = _reset(oh); 2550 2551 return r; 2552 } 2553 2554 /** 2555 * _setup_postsetup - transition to the appropriate state after _setup 2556 * @oh: struct omap_hwmod * 2557 * 2558 * Place an IP block represented by @oh into a "post-setup" state -- 2559 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that 2560 * this function is called at the end of _setup().) The postsetup 2561 * state for an IP block can be changed by calling 2562 * omap_hwmod_enter_postsetup_state() early in the boot process, 2563 * before one of the omap_hwmod_setup*() functions are called for the 2564 * IP block. 2565 * 2566 * The IP block stays in this state until a PM runtime-based driver is 2567 * loaded for that IP block. A post-setup state of IDLE is 2568 * appropriate for almost all IP blocks with runtime PM-enabled 2569 * drivers, since those drivers are able to enable the IP block. A 2570 * post-setup state of ENABLED is appropriate for kernels with PM 2571 * runtime disabled. The DISABLED state is appropriate for unusual IP 2572 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers 2573 * included, since the WDTIMER starts running on reset and will reset 2574 * the MPU if left active. 2575 * 2576 * This post-setup mechanism is deprecated. Once all of the OMAP 2577 * drivers have been converted to use PM runtime, and all of the IP 2578 * block data and interconnect data is available to the hwmod code, it 2579 * should be possible to replace this mechanism with a "lazy reset" 2580 * arrangement. In a "lazy reset" setup, each IP block is enabled 2581 * when the driver first probes, then all remaining IP blocks without 2582 * drivers are either shut down or enabled after the drivers have 2583 * loaded. However, this cannot take place until the above 2584 * preconditions have been met, since otherwise the late reset code 2585 * has no way of knowing which IP blocks are in use by drivers, and 2586 * which ones are unused. 2587 * 2588 * No return value. 2589 */ 2590 static void __init _setup_postsetup(struct omap_hwmod *oh) 2591 { 2592 u8 postsetup_state; 2593 2594 if (oh->rst_lines_cnt > 0) 2595 return; 2596 2597 postsetup_state = oh->_postsetup_state; 2598 if (postsetup_state == _HWMOD_STATE_UNKNOWN) 2599 postsetup_state = _HWMOD_STATE_ENABLED; 2600 2601 /* 2602 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data - 2603 * it should be set by the core code as a runtime flag during startup 2604 */ 2605 if ((oh->flags & HWMOD_INIT_NO_IDLE) && 2606 (postsetup_state == _HWMOD_STATE_IDLE)) { 2607 oh->_int_flags |= _HWMOD_SKIP_ENABLE; 2608 postsetup_state = _HWMOD_STATE_ENABLED; 2609 } 2610 2611 if (postsetup_state == _HWMOD_STATE_IDLE) 2612 _idle(oh); 2613 else if (postsetup_state == _HWMOD_STATE_DISABLED) 2614 _shutdown(oh); 2615 else if (postsetup_state != _HWMOD_STATE_ENABLED) 2616 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", 2617 oh->name, postsetup_state); 2618 2619 return; 2620 } 2621 2622 /** 2623 * _setup - prepare IP block hardware for use 2624 * @oh: struct omap_hwmod * 2625 * @n: (unused, pass NULL) 2626 * 2627 * Configure the IP block represented by @oh. This may include 2628 * enabling the IP block, resetting it, and placing it into a 2629 * post-setup state, depending on the type of IP block and applicable 2630 * flags. IP blocks are reset to prevent any previous configuration 2631 * by the bootloader or previous operating system from interfering 2632 * with power management or other parts of the system. The reset can 2633 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of 2634 * two phases for hwmod initialization. Code called here generally 2635 * affects the IP block hardware, or system integration hardware 2636 * associated with the IP block. Returns 0. 2637 */ 2638 static int __init _setup(struct omap_hwmod *oh, void *data) 2639 { 2640 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2641 return 0; 2642 2643 if (oh->parent_hwmod) { 2644 int r; 2645 2646 r = _enable(oh->parent_hwmod); 2647 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n", 2648 oh->name, oh->parent_hwmod->name); 2649 } 2650 2651 _setup_iclk_autoidle(oh); 2652 2653 if (!_setup_reset(oh)) 2654 _setup_postsetup(oh); 2655 2656 if (oh->parent_hwmod) { 2657 u8 postsetup_state; 2658 2659 postsetup_state = oh->parent_hwmod->_postsetup_state; 2660 2661 if (postsetup_state == _HWMOD_STATE_IDLE) 2662 _idle(oh->parent_hwmod); 2663 else if (postsetup_state == _HWMOD_STATE_DISABLED) 2664 _shutdown(oh->parent_hwmod); 2665 else if (postsetup_state != _HWMOD_STATE_ENABLED) 2666 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", 2667 oh->parent_hwmod->name, postsetup_state); 2668 } 2669 2670 return 0; 2671 } 2672 2673 /** 2674 * _register - register a struct omap_hwmod 2675 * @oh: struct omap_hwmod * 2676 * 2677 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod 2678 * already has been registered by the same name; -EINVAL if the 2679 * omap_hwmod is in the wrong state, if @oh is NULL, if the 2680 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a 2681 * name, or if the omap_hwmod's class is missing a name; or 0 upon 2682 * success. 2683 * 2684 * XXX The data should be copied into bootmem, so the original data 2685 * should be marked __initdata and freed after init. This would allow 2686 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note 2687 * that the copy process would be relatively complex due to the large number 2688 * of substructures. 2689 */ 2690 static int __init _register(struct omap_hwmod *oh) 2691 { 2692 if (!oh || !oh->name || !oh->class || !oh->class->name || 2693 (oh->_state != _HWMOD_STATE_UNKNOWN)) 2694 return -EINVAL; 2695 2696 pr_debug("omap_hwmod: %s: registering\n", oh->name); 2697 2698 if (_lookup(oh->name)) 2699 return -EEXIST; 2700 2701 list_add_tail(&oh->node, &omap_hwmod_list); 2702 2703 INIT_LIST_HEAD(&oh->master_ports); 2704 INIT_LIST_HEAD(&oh->slave_ports); 2705 spin_lock_init(&oh->_lock); 2706 lockdep_set_class(&oh->_lock, &oh->hwmod_key); 2707 2708 oh->_state = _HWMOD_STATE_REGISTERED; 2709 2710 /* 2711 * XXX Rather than doing a strcmp(), this should test a flag 2712 * set in the hwmod data, inserted by the autogenerator code. 2713 */ 2714 if (!strcmp(oh->name, MPU_INITIATOR_NAME)) 2715 mpu_oh = oh; 2716 2717 return 0; 2718 } 2719 2720 /** 2721 * _alloc_links - return allocated memory for hwmod links 2722 * @ml: pointer to a struct omap_hwmod_link * for the master link 2723 * @sl: pointer to a struct omap_hwmod_link * for the slave link 2724 * 2725 * Return pointers to two struct omap_hwmod_link records, via the 2726 * addresses pointed to by @ml and @sl. Will first attempt to return 2727 * memory allocated as part of a large initial block, but if that has 2728 * been exhausted, will allocate memory itself. Since ideally this 2729 * second allocation path will never occur, the number of these 2730 * 'supplemental' allocations will be logged when debugging is 2731 * enabled. Returns 0. 2732 */ 2733 static int __init _alloc_links(struct omap_hwmod_link **ml, 2734 struct omap_hwmod_link **sl) 2735 { 2736 unsigned int sz; 2737 2738 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) { 2739 *ml = &linkspace[free_ls++]; 2740 *sl = &linkspace[free_ls++]; 2741 return 0; 2742 } 2743 2744 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF; 2745 2746 *sl = NULL; 2747 *ml = memblock_virt_alloc(sz, 0); 2748 2749 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link); 2750 2751 ls_supp++; 2752 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n", 2753 ls_supp * LINKS_PER_OCP_IF); 2754 2755 return 0; 2756 }; 2757 2758 /** 2759 * _add_link - add an interconnect between two IP blocks 2760 * @oi: pointer to a struct omap_hwmod_ocp_if record 2761 * 2762 * Add struct omap_hwmod_link records connecting the master IP block 2763 * specified in @oi->master to @oi, and connecting the slave IP block 2764 * specified in @oi->slave to @oi. This code is assumed to run before 2765 * preemption or SMP has been enabled, thus avoiding the need for 2766 * locking in this code. Changes to this assumption will require 2767 * additional locking. Returns 0. 2768 */ 2769 static int __init _add_link(struct omap_hwmod_ocp_if *oi) 2770 { 2771 struct omap_hwmod_link *ml, *sl; 2772 2773 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name, 2774 oi->slave->name); 2775 2776 _alloc_links(&ml, &sl); 2777 2778 ml->ocp_if = oi; 2779 list_add(&ml->node, &oi->master->master_ports); 2780 oi->master->masters_cnt++; 2781 2782 sl->ocp_if = oi; 2783 list_add(&sl->node, &oi->slave->slave_ports); 2784 oi->slave->slaves_cnt++; 2785 2786 return 0; 2787 } 2788 2789 /** 2790 * _register_link - register a struct omap_hwmod_ocp_if 2791 * @oi: struct omap_hwmod_ocp_if * 2792 * 2793 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it 2794 * has already been registered; -EINVAL if @oi is NULL or if the 2795 * record pointed to by @oi is missing required fields; or 0 upon 2796 * success. 2797 * 2798 * XXX The data should be copied into bootmem, so the original data 2799 * should be marked __initdata and freed after init. This would allow 2800 * unneeded omap_hwmods to be freed on multi-OMAP configurations. 2801 */ 2802 static int __init _register_link(struct omap_hwmod_ocp_if *oi) 2803 { 2804 if (!oi || !oi->master || !oi->slave || !oi->user) 2805 return -EINVAL; 2806 2807 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED) 2808 return -EEXIST; 2809 2810 pr_debug("omap_hwmod: registering link from %s to %s\n", 2811 oi->master->name, oi->slave->name); 2812 2813 /* 2814 * Register the connected hwmods, if they haven't been 2815 * registered already 2816 */ 2817 if (oi->master->_state != _HWMOD_STATE_REGISTERED) 2818 _register(oi->master); 2819 2820 if (oi->slave->_state != _HWMOD_STATE_REGISTERED) 2821 _register(oi->slave); 2822 2823 _add_link(oi); 2824 2825 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED; 2826 2827 return 0; 2828 } 2829 2830 /** 2831 * _alloc_linkspace - allocate large block of hwmod links 2832 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count 2833 * 2834 * Allocate a large block of struct omap_hwmod_link records. This 2835 * improves boot time significantly by avoiding the need to allocate 2836 * individual records one by one. If the number of records to 2837 * allocate in the block hasn't been manually specified, this function 2838 * will count the number of struct omap_hwmod_ocp_if records in @ois 2839 * and use that to determine the allocation size. For SoC families 2840 * that require multiple list registrations, such as OMAP3xxx, this 2841 * estimation process isn't optimal, so manual estimation is advised 2842 * in those cases. Returns -EEXIST if the allocation has already occurred 2843 * or 0 upon success. 2844 */ 2845 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) 2846 { 2847 unsigned int i = 0; 2848 unsigned int sz; 2849 2850 if (linkspace) { 2851 WARN(1, "linkspace already allocated\n"); 2852 return -EEXIST; 2853 } 2854 2855 if (max_ls == 0) 2856 while (ois[i++]) 2857 max_ls += LINKS_PER_OCP_IF; 2858 2859 sz = sizeof(struct omap_hwmod_link) * max_ls; 2860 2861 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n", 2862 __func__, sz, max_ls); 2863 2864 linkspace = memblock_virt_alloc(sz, 0); 2865 2866 return 0; 2867 } 2868 2869 /* Static functions intended only for use in soc_ops field function pointers */ 2870 2871 /** 2872 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle 2873 * @oh: struct omap_hwmod * 2874 * 2875 * Wait for a module @oh to leave slave idle. Returns 0 if the module 2876 * does not have an IDLEST bit or if the module successfully leaves 2877 * slave idle; otherwise, pass along the return value of the 2878 * appropriate *_cm*_wait_module_ready() function. 2879 */ 2880 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh) 2881 { 2882 if (!oh) 2883 return -EINVAL; 2884 2885 if (oh->flags & HWMOD_NO_IDLEST) 2886 return 0; 2887 2888 if (!_find_mpu_rt_port(oh)) 2889 return 0; 2890 2891 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ 2892 2893 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs, 2894 oh->prcm.omap2.idlest_reg_id, 2895 oh->prcm.omap2.idlest_idle_bit); 2896 } 2897 2898 /** 2899 * _omap4_wait_target_ready - wait for a module to leave slave idle 2900 * @oh: struct omap_hwmod * 2901 * 2902 * Wait for a module @oh to leave slave idle. Returns 0 if the module 2903 * does not have an IDLEST bit or if the module successfully leaves 2904 * slave idle; otherwise, pass along the return value of the 2905 * appropriate *_cm*_wait_module_ready() function. 2906 */ 2907 static int _omap4_wait_target_ready(struct omap_hwmod *oh) 2908 { 2909 if (!oh) 2910 return -EINVAL; 2911 2912 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm) 2913 return 0; 2914 2915 if (!_find_mpu_rt_port(oh)) 2916 return 0; 2917 2918 /* XXX check module SIDLEMODE, hardreset status */ 2919 2920 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition, 2921 oh->clkdm->cm_inst, 2922 oh->prcm.omap4.clkctrl_offs, 0); 2923 } 2924 2925 /** 2926 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args 2927 * @oh: struct omap_hwmod * to assert hardreset 2928 * @ohri: hardreset line data 2929 * 2930 * Call omap2_prm_assert_hardreset() with parameters extracted from 2931 * the hwmod @oh and the hardreset line data @ohri. Only intended for 2932 * use as an soc_ops function pointer. Passes along the return value 2933 * from omap2_prm_assert_hardreset(). XXX This function is scheduled 2934 * for removal when the PRM code is moved into drivers/. 2935 */ 2936 static int _omap2_assert_hardreset(struct omap_hwmod *oh, 2937 struct omap_hwmod_rst_info *ohri) 2938 { 2939 return omap_prm_assert_hardreset(ohri->rst_shift, 0, 2940 oh->prcm.omap2.module_offs, 0); 2941 } 2942 2943 /** 2944 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args 2945 * @oh: struct omap_hwmod * to deassert hardreset 2946 * @ohri: hardreset line data 2947 * 2948 * Call omap2_prm_deassert_hardreset() with parameters extracted from 2949 * the hwmod @oh and the hardreset line data @ohri. Only intended for 2950 * use as an soc_ops function pointer. Passes along the return value 2951 * from omap2_prm_deassert_hardreset(). XXX This function is 2952 * scheduled for removal when the PRM code is moved into drivers/. 2953 */ 2954 static int _omap2_deassert_hardreset(struct omap_hwmod *oh, 2955 struct omap_hwmod_rst_info *ohri) 2956 { 2957 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0, 2958 oh->prcm.omap2.module_offs, 0, 0); 2959 } 2960 2961 /** 2962 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args 2963 * @oh: struct omap_hwmod * to test hardreset 2964 * @ohri: hardreset line data 2965 * 2966 * Call omap2_prm_is_hardreset_asserted() with parameters extracted 2967 * from the hwmod @oh and the hardreset line data @ohri. Only 2968 * intended for use as an soc_ops function pointer. Passes along the 2969 * return value from omap2_prm_is_hardreset_asserted(). XXX This 2970 * function is scheduled for removal when the PRM code is moved into 2971 * drivers/. 2972 */ 2973 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, 2974 struct omap_hwmod_rst_info *ohri) 2975 { 2976 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0, 2977 oh->prcm.omap2.module_offs, 0); 2978 } 2979 2980 /** 2981 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args 2982 * @oh: struct omap_hwmod * to assert hardreset 2983 * @ohri: hardreset line data 2984 * 2985 * Call omap4_prminst_assert_hardreset() with parameters extracted 2986 * from the hwmod @oh and the hardreset line data @ohri. Only 2987 * intended for use as an soc_ops function pointer. Passes along the 2988 * return value from omap4_prminst_assert_hardreset(). XXX This 2989 * function is scheduled for removal when the PRM code is moved into 2990 * drivers/. 2991 */ 2992 static int _omap4_assert_hardreset(struct omap_hwmod *oh, 2993 struct omap_hwmod_rst_info *ohri) 2994 { 2995 if (!oh->clkdm) 2996 return -EINVAL; 2997 2998 return omap_prm_assert_hardreset(ohri->rst_shift, 2999 oh->clkdm->pwrdm.ptr->prcm_partition, 3000 oh->clkdm->pwrdm.ptr->prcm_offs, 3001 oh->prcm.omap4.rstctrl_offs); 3002 } 3003 3004 /** 3005 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args 3006 * @oh: struct omap_hwmod * to deassert hardreset 3007 * @ohri: hardreset line data 3008 * 3009 * Call omap4_prminst_deassert_hardreset() with parameters extracted 3010 * from the hwmod @oh and the hardreset line data @ohri. Only 3011 * intended for use as an soc_ops function pointer. Passes along the 3012 * return value from omap4_prminst_deassert_hardreset(). XXX This 3013 * function is scheduled for removal when the PRM code is moved into 3014 * drivers/. 3015 */ 3016 static int _omap4_deassert_hardreset(struct omap_hwmod *oh, 3017 struct omap_hwmod_rst_info *ohri) 3018 { 3019 if (!oh->clkdm) 3020 return -EINVAL; 3021 3022 if (ohri->st_shift) 3023 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", 3024 oh->name, ohri->name); 3025 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift, 3026 oh->clkdm->pwrdm.ptr->prcm_partition, 3027 oh->clkdm->pwrdm.ptr->prcm_offs, 3028 oh->prcm.omap4.rstctrl_offs, 3029 oh->prcm.omap4.rstctrl_offs + 3030 OMAP4_RST_CTRL_ST_OFFSET); 3031 } 3032 3033 /** 3034 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args 3035 * @oh: struct omap_hwmod * to test hardreset 3036 * @ohri: hardreset line data 3037 * 3038 * Call omap4_prminst_is_hardreset_asserted() with parameters 3039 * extracted from the hwmod @oh and the hardreset line data @ohri. 3040 * Only intended for use as an soc_ops function pointer. Passes along 3041 * the return value from omap4_prminst_is_hardreset_asserted(). XXX 3042 * This function is scheduled for removal when the PRM code is moved 3043 * into drivers/. 3044 */ 3045 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, 3046 struct omap_hwmod_rst_info *ohri) 3047 { 3048 if (!oh->clkdm) 3049 return -EINVAL; 3050 3051 return omap_prm_is_hardreset_asserted(ohri->rst_shift, 3052 oh->clkdm->pwrdm.ptr-> 3053 prcm_partition, 3054 oh->clkdm->pwrdm.ptr->prcm_offs, 3055 oh->prcm.omap4.rstctrl_offs); 3056 } 3057 3058 /** 3059 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args 3060 * @oh: struct omap_hwmod * to deassert hardreset 3061 * @ohri: hardreset line data 3062 * 3063 * Call am33xx_prminst_deassert_hardreset() with parameters extracted 3064 * from the hwmod @oh and the hardreset line data @ohri. Only 3065 * intended for use as an soc_ops function pointer. Passes along the 3066 * return value from am33xx_prminst_deassert_hardreset(). XXX This 3067 * function is scheduled for removal when the PRM code is moved into 3068 * drivers/. 3069 */ 3070 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, 3071 struct omap_hwmod_rst_info *ohri) 3072 { 3073 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 3074 oh->clkdm->pwrdm.ptr->prcm_partition, 3075 oh->clkdm->pwrdm.ptr->prcm_offs, 3076 oh->prcm.omap4.rstctrl_offs, 3077 oh->prcm.omap4.rstst_offs); 3078 } 3079 3080 /* Public functions */ 3081 3082 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) 3083 { 3084 if (oh->flags & HWMOD_16BIT_REG) 3085 return readw_relaxed(oh->_mpu_rt_va + reg_offs); 3086 else 3087 return readl_relaxed(oh->_mpu_rt_va + reg_offs); 3088 } 3089 3090 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) 3091 { 3092 if (oh->flags & HWMOD_16BIT_REG) 3093 writew_relaxed(v, oh->_mpu_rt_va + reg_offs); 3094 else 3095 writel_relaxed(v, oh->_mpu_rt_va + reg_offs); 3096 } 3097 3098 /** 3099 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit 3100 * @oh: struct omap_hwmod * 3101 * 3102 * This is a public function exposed to drivers. Some drivers may need to do 3103 * some settings before and after resetting the device. Those drivers after 3104 * doing the necessary settings could use this function to start a reset by 3105 * setting the SYSCONFIG.SOFTRESET bit. 3106 */ 3107 int omap_hwmod_softreset(struct omap_hwmod *oh) 3108 { 3109 u32 v; 3110 int ret; 3111 3112 if (!oh || !(oh->_sysc_cache)) 3113 return -EINVAL; 3114 3115 v = oh->_sysc_cache; 3116 ret = _set_softreset(oh, &v); 3117 if (ret) 3118 goto error; 3119 _write_sysconfig(v, oh); 3120 3121 ret = _clear_softreset(oh, &v); 3122 if (ret) 3123 goto error; 3124 _write_sysconfig(v, oh); 3125 3126 error: 3127 return ret; 3128 } 3129 3130 /** 3131 * omap_hwmod_lookup - look up a registered omap_hwmod by name 3132 * @name: name of the omap_hwmod to look up 3133 * 3134 * Given a @name of an omap_hwmod, return a pointer to the registered 3135 * struct omap_hwmod *, or NULL upon error. 3136 */ 3137 struct omap_hwmod *omap_hwmod_lookup(const char *name) 3138 { 3139 struct omap_hwmod *oh; 3140 3141 if (!name) 3142 return NULL; 3143 3144 oh = _lookup(name); 3145 3146 return oh; 3147 } 3148 3149 /** 3150 * omap_hwmod_for_each - call function for each registered omap_hwmod 3151 * @fn: pointer to a callback function 3152 * @data: void * data to pass to callback function 3153 * 3154 * Call @fn for each registered omap_hwmod, passing @data to each 3155 * function. @fn must return 0 for success or any other value for 3156 * failure. If @fn returns non-zero, the iteration across omap_hwmods 3157 * will stop and the non-zero return value will be passed to the 3158 * caller of omap_hwmod_for_each(). @fn is called with 3159 * omap_hwmod_for_each() held. 3160 */ 3161 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), 3162 void *data) 3163 { 3164 struct omap_hwmod *temp_oh; 3165 int ret = 0; 3166 3167 if (!fn) 3168 return -EINVAL; 3169 3170 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 3171 ret = (*fn)(temp_oh, data); 3172 if (ret) 3173 break; 3174 } 3175 3176 return ret; 3177 } 3178 3179 /** 3180 * omap_hwmod_register_links - register an array of hwmod links 3181 * @ois: pointer to an array of omap_hwmod_ocp_if to register 3182 * 3183 * Intended to be called early in boot before the clock framework is 3184 * initialized. If @ois is not null, will register all omap_hwmods 3185 * listed in @ois that are valid for this chip. Returns -EINVAL if 3186 * omap_hwmod_init() hasn't been called before calling this function, 3187 * -ENOMEM if the link memory area can't be allocated, or 0 upon 3188 * success. 3189 */ 3190 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) 3191 { 3192 int r, i; 3193 3194 if (!inited) 3195 return -EINVAL; 3196 3197 if (!ois) 3198 return 0; 3199 3200 if (ois[0] == NULL) /* Empty list */ 3201 return 0; 3202 3203 if (!linkspace) { 3204 if (_alloc_linkspace(ois)) { 3205 pr_err("omap_hwmod: could not allocate link space\n"); 3206 return -ENOMEM; 3207 } 3208 } 3209 3210 i = 0; 3211 do { 3212 r = _register_link(ois[i]); 3213 WARN(r && r != -EEXIST, 3214 "omap_hwmod: _register_link(%s -> %s) returned %d\n", 3215 ois[i]->master->name, ois[i]->slave->name, r); 3216 } while (ois[++i]); 3217 3218 return 0; 3219 } 3220 3221 /** 3222 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up 3223 * @oh: pointer to the hwmod currently being set up (usually not the MPU) 3224 * 3225 * If the hwmod data corresponding to the MPU subsystem IP block 3226 * hasn't been initialized and set up yet, do so now. This must be 3227 * done first since sleep dependencies may be added from other hwmods 3228 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No 3229 * return value. 3230 */ 3231 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) 3232 { 3233 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN) 3234 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n", 3235 __func__, MPU_INITIATOR_NAME); 3236 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh) 3237 omap_hwmod_setup_one(MPU_INITIATOR_NAME); 3238 } 3239 3240 /** 3241 * omap_hwmod_setup_one - set up a single hwmod 3242 * @oh_name: const char * name of the already-registered hwmod to set up 3243 * 3244 * Initialize and set up a single hwmod. Intended to be used for a 3245 * small number of early devices, such as the timer IP blocks used for 3246 * the scheduler clock. Must be called after omap2_clk_init(). 3247 * Resolves the struct clk names to struct clk pointers for each 3248 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns 3249 * -EINVAL upon error or 0 upon success. 3250 */ 3251 int __init omap_hwmod_setup_one(const char *oh_name) 3252 { 3253 struct omap_hwmod *oh; 3254 3255 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__); 3256 3257 oh = _lookup(oh_name); 3258 if (!oh) { 3259 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name); 3260 return -EINVAL; 3261 } 3262 3263 _ensure_mpu_hwmod_is_setup(oh); 3264 3265 _init(oh, NULL); 3266 _setup(oh, NULL); 3267 3268 return 0; 3269 } 3270 3271 /** 3272 * omap_hwmod_setup_all - set up all registered IP blocks 3273 * 3274 * Initialize and set up all IP blocks registered with the hwmod code. 3275 * Must be called after omap2_clk_init(). Resolves the struct clk 3276 * names to struct clk pointers for each registered omap_hwmod. Also 3277 * calls _setup() on each hwmod. Returns 0 upon success. 3278 */ 3279 static int __init omap_hwmod_setup_all(void) 3280 { 3281 _ensure_mpu_hwmod_is_setup(NULL); 3282 3283 omap_hwmod_for_each(_init, NULL); 3284 omap_hwmod_for_each(_setup, NULL); 3285 3286 return 0; 3287 } 3288 omap_core_initcall(omap_hwmod_setup_all); 3289 3290 /** 3291 * omap_hwmod_enable - enable an omap_hwmod 3292 * @oh: struct omap_hwmod * 3293 * 3294 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable(). 3295 * Returns -EINVAL on error or passes along the return value from _enable(). 3296 */ 3297 int omap_hwmod_enable(struct omap_hwmod *oh) 3298 { 3299 int r; 3300 unsigned long flags; 3301 3302 if (!oh) 3303 return -EINVAL; 3304 3305 spin_lock_irqsave(&oh->_lock, flags); 3306 r = _enable(oh); 3307 spin_unlock_irqrestore(&oh->_lock, flags); 3308 3309 return r; 3310 } 3311 3312 /** 3313 * omap_hwmod_idle - idle an omap_hwmod 3314 * @oh: struct omap_hwmod * 3315 * 3316 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle(). 3317 * Returns -EINVAL on error or passes along the return value from _idle(). 3318 */ 3319 int omap_hwmod_idle(struct omap_hwmod *oh) 3320 { 3321 unsigned long flags; 3322 3323 if (!oh) 3324 return -EINVAL; 3325 3326 spin_lock_irqsave(&oh->_lock, flags); 3327 _idle(oh); 3328 spin_unlock_irqrestore(&oh->_lock, flags); 3329 3330 return 0; 3331 } 3332 3333 /** 3334 * omap_hwmod_shutdown - shutdown an omap_hwmod 3335 * @oh: struct omap_hwmod * 3336 * 3337 * Shutdown an omap_hwmod @oh. Intended to be called by 3338 * omap_device_shutdown(). Returns -EINVAL on error or passes along 3339 * the return value from _shutdown(). 3340 */ 3341 int omap_hwmod_shutdown(struct omap_hwmod *oh) 3342 { 3343 unsigned long flags; 3344 3345 if (!oh) 3346 return -EINVAL; 3347 3348 spin_lock_irqsave(&oh->_lock, flags); 3349 _shutdown(oh); 3350 spin_unlock_irqrestore(&oh->_lock, flags); 3351 3352 return 0; 3353 } 3354 3355 /* 3356 * IP block data retrieval functions 3357 */ 3358 3359 /** 3360 * omap_hwmod_count_resources - count number of struct resources needed by hwmod 3361 * @oh: struct omap_hwmod * 3362 * @flags: Type of resources to include when counting (IRQ/DMA/MEM) 3363 * 3364 * Count the number of struct resource array elements necessary to 3365 * contain omap_hwmod @oh resources. Intended to be called by code 3366 * that registers omap_devices. Intended to be used to determine the 3367 * size of a dynamically-allocated struct resource array, before 3368 * calling omap_hwmod_fill_resources(). Returns the number of struct 3369 * resource array elements needed. 3370 * 3371 * XXX This code is not optimized. It could attempt to merge adjacent 3372 * resource IDs. 3373 * 3374 */ 3375 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags) 3376 { 3377 int ret = 0; 3378 3379 if (flags & IORESOURCE_IRQ) 3380 ret += _count_mpu_irqs(oh); 3381 3382 if (flags & IORESOURCE_DMA) 3383 ret += _count_sdma_reqs(oh); 3384 3385 if (flags & IORESOURCE_MEM) { 3386 int i = 0; 3387 struct omap_hwmod_ocp_if *os; 3388 struct list_head *p = oh->slave_ports.next; 3389 3390 while (i < oh->slaves_cnt) { 3391 os = _fetch_next_ocp_if(&p, &i); 3392 ret += _count_ocp_if_addr_spaces(os); 3393 } 3394 } 3395 3396 return ret; 3397 } 3398 3399 /** 3400 * omap_hwmod_fill_resources - fill struct resource array with hwmod data 3401 * @oh: struct omap_hwmod * 3402 * @res: pointer to the first element of an array of struct resource to fill 3403 * 3404 * Fill the struct resource array @res with resource data from the 3405 * omap_hwmod @oh. Intended to be called by code that registers 3406 * omap_devices. See also omap_hwmod_count_resources(). Returns the 3407 * number of array elements filled. 3408 */ 3409 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) 3410 { 3411 struct omap_hwmod_ocp_if *os; 3412 struct list_head *p; 3413 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt; 3414 int r = 0; 3415 3416 /* For each IRQ, DMA, memory area, fill in array.*/ 3417 3418 mpu_irqs_cnt = _count_mpu_irqs(oh); 3419 for (i = 0; i < mpu_irqs_cnt; i++) { 3420 unsigned int irq; 3421 3422 if (oh->xlate_irq) 3423 irq = oh->xlate_irq((oh->mpu_irqs + i)->irq); 3424 else 3425 irq = (oh->mpu_irqs + i)->irq; 3426 (res + r)->name = (oh->mpu_irqs + i)->name; 3427 (res + r)->start = irq; 3428 (res + r)->end = irq; 3429 (res + r)->flags = IORESOURCE_IRQ; 3430 r++; 3431 } 3432 3433 sdma_reqs_cnt = _count_sdma_reqs(oh); 3434 for (i = 0; i < sdma_reqs_cnt; i++) { 3435 (res + r)->name = (oh->sdma_reqs + i)->name; 3436 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 3437 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 3438 (res + r)->flags = IORESOURCE_DMA; 3439 r++; 3440 } 3441 3442 p = oh->slave_ports.next; 3443 3444 i = 0; 3445 while (i < oh->slaves_cnt) { 3446 os = _fetch_next_ocp_if(&p, &i); 3447 addr_cnt = _count_ocp_if_addr_spaces(os); 3448 3449 for (j = 0; j < addr_cnt; j++) { 3450 (res + r)->name = (os->addr + j)->name; 3451 (res + r)->start = (os->addr + j)->pa_start; 3452 (res + r)->end = (os->addr + j)->pa_end; 3453 (res + r)->flags = IORESOURCE_MEM; 3454 r++; 3455 } 3456 } 3457 3458 return r; 3459 } 3460 3461 /** 3462 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data 3463 * @oh: struct omap_hwmod * 3464 * @res: pointer to the array of struct resource to fill 3465 * 3466 * Fill the struct resource array @res with dma resource data from the 3467 * omap_hwmod @oh. Intended to be called by code that registers 3468 * omap_devices. See also omap_hwmod_count_resources(). Returns the 3469 * number of array elements filled. 3470 */ 3471 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res) 3472 { 3473 int i, sdma_reqs_cnt; 3474 int r = 0; 3475 3476 sdma_reqs_cnt = _count_sdma_reqs(oh); 3477 for (i = 0; i < sdma_reqs_cnt; i++) { 3478 (res + r)->name = (oh->sdma_reqs + i)->name; 3479 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 3480 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 3481 (res + r)->flags = IORESOURCE_DMA; 3482 r++; 3483 } 3484 3485 return r; 3486 } 3487 3488 /** 3489 * omap_hwmod_get_resource_byname - fetch IP block integration data by name 3490 * @oh: struct omap_hwmod * to operate on 3491 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h 3492 * @name: pointer to the name of the data to fetch (optional) 3493 * @rsrc: pointer to a struct resource, allocated by the caller 3494 * 3495 * Retrieve MPU IRQ, SDMA request line, or address space start/end 3496 * data for the IP block pointed to by @oh. The data will be filled 3497 * into a struct resource record pointed to by @rsrc. The struct 3498 * resource must be allocated by the caller. When @name is non-null, 3499 * the data associated with the matching entry in the IRQ/SDMA/address 3500 * space hwmod data arrays will be returned. If @name is null, the 3501 * first array entry will be returned. Data order is not meaningful 3502 * in hwmod data, so callers are strongly encouraged to use a non-null 3503 * @name whenever possible to avoid unpredictable effects if hwmod 3504 * data is later added that causes data ordering to change. This 3505 * function is only intended for use by OMAP core code. Device 3506 * drivers should not call this function - the appropriate bus-related 3507 * data accessor functions should be used instead. Returns 0 upon 3508 * success or a negative error code upon error. 3509 */ 3510 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, 3511 const char *name, struct resource *rsrc) 3512 { 3513 int r; 3514 unsigned int irq, dma; 3515 u32 pa_start, pa_end; 3516 3517 if (!oh || !rsrc) 3518 return -EINVAL; 3519 3520 if (type == IORESOURCE_IRQ) { 3521 r = _get_mpu_irq_by_name(oh, name, &irq); 3522 if (r) 3523 return r; 3524 3525 rsrc->start = irq; 3526 rsrc->end = irq; 3527 } else if (type == IORESOURCE_DMA) { 3528 r = _get_sdma_req_by_name(oh, name, &dma); 3529 if (r) 3530 return r; 3531 3532 rsrc->start = dma; 3533 rsrc->end = dma; 3534 } else if (type == IORESOURCE_MEM) { 3535 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end); 3536 if (r) 3537 return r; 3538 3539 rsrc->start = pa_start; 3540 rsrc->end = pa_end; 3541 } else { 3542 return -EINVAL; 3543 } 3544 3545 rsrc->flags = type; 3546 rsrc->name = name; 3547 3548 return 0; 3549 } 3550 3551 /** 3552 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain 3553 * @oh: struct omap_hwmod * 3554 * 3555 * Return the powerdomain pointer associated with the OMAP module 3556 * @oh's main clock. If @oh does not have a main clk, return the 3557 * powerdomain associated with the interface clock associated with the 3558 * module's MPU port. (XXX Perhaps this should use the SDMA port 3559 * instead?) Returns NULL on error, or a struct powerdomain * on 3560 * success. 3561 */ 3562 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) 3563 { 3564 struct clk *c; 3565 struct omap_hwmod_ocp_if *oi; 3566 struct clockdomain *clkdm; 3567 struct clk_hw_omap *clk; 3568 3569 if (!oh) 3570 return NULL; 3571 3572 if (oh->clkdm) 3573 return oh->clkdm->pwrdm.ptr; 3574 3575 if (oh->_clk) { 3576 c = oh->_clk; 3577 } else { 3578 oi = _find_mpu_rt_port(oh); 3579 if (!oi) 3580 return NULL; 3581 c = oi->_clk; 3582 } 3583 3584 clk = to_clk_hw_omap(__clk_get_hw(c)); 3585 clkdm = clk->clkdm; 3586 if (!clkdm) 3587 return NULL; 3588 3589 return clkdm->pwrdm.ptr; 3590 } 3591 3592 /** 3593 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) 3594 * @oh: struct omap_hwmod * 3595 * 3596 * Returns the virtual address corresponding to the beginning of the 3597 * module's register target, in the address range that is intended to 3598 * be used by the MPU. Returns the virtual address upon success or NULL 3599 * upon error. 3600 */ 3601 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) 3602 { 3603 if (!oh) 3604 return NULL; 3605 3606 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 3607 return NULL; 3608 3609 if (oh->_state == _HWMOD_STATE_UNKNOWN) 3610 return NULL; 3611 3612 return oh->_mpu_rt_va; 3613 } 3614 3615 /* 3616 * XXX what about functions for drivers to save/restore ocp_sysconfig 3617 * for context save/restore operations? 3618 */ 3619 3620 /** 3621 * omap_hwmod_enable_wakeup - allow device to wake up the system 3622 * @oh: struct omap_hwmod * 3623 * 3624 * Sets the module OCP socket ENAWAKEUP bit to allow the module to 3625 * send wakeups to the PRCM, and enable I/O ring wakeup events for 3626 * this IP block if it has dynamic mux entries. Eventually this 3627 * should set PRCM wakeup registers to cause the PRCM to receive 3628 * wakeup events from the module. Does not set any wakeup routing 3629 * registers beyond this point - if the module is to wake up any other 3630 * module or subsystem, that must be set separately. Called by 3631 * omap_device code. Returns -EINVAL on error or 0 upon success. 3632 */ 3633 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) 3634 { 3635 unsigned long flags; 3636 u32 v; 3637 3638 spin_lock_irqsave(&oh->_lock, flags); 3639 3640 if (oh->class->sysc && 3641 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 3642 v = oh->_sysc_cache; 3643 _enable_wakeup(oh, &v); 3644 _write_sysconfig(v, oh); 3645 } 3646 3647 _set_idle_ioring_wakeup(oh, true); 3648 spin_unlock_irqrestore(&oh->_lock, flags); 3649 3650 return 0; 3651 } 3652 3653 /** 3654 * omap_hwmod_disable_wakeup - prevent device from waking the system 3655 * @oh: struct omap_hwmod * 3656 * 3657 * Clears the module OCP socket ENAWAKEUP bit to prevent the module 3658 * from sending wakeups to the PRCM, and disable I/O ring wakeup 3659 * events for this IP block if it has dynamic mux entries. Eventually 3660 * this should clear PRCM wakeup registers to cause the PRCM to ignore 3661 * wakeup events from the module. Does not set any wakeup routing 3662 * registers beyond this point - if the module is to wake up any other 3663 * module or subsystem, that must be set separately. Called by 3664 * omap_device code. Returns -EINVAL on error or 0 upon success. 3665 */ 3666 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) 3667 { 3668 unsigned long flags; 3669 u32 v; 3670 3671 spin_lock_irqsave(&oh->_lock, flags); 3672 3673 if (oh->class->sysc && 3674 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 3675 v = oh->_sysc_cache; 3676 _disable_wakeup(oh, &v); 3677 _write_sysconfig(v, oh); 3678 } 3679 3680 _set_idle_ioring_wakeup(oh, false); 3681 spin_unlock_irqrestore(&oh->_lock, flags); 3682 3683 return 0; 3684 } 3685 3686 /** 3687 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules 3688 * contained in the hwmod module. 3689 * @oh: struct omap_hwmod * 3690 * @name: name of the reset line to lookup and assert 3691 * 3692 * Some IP like dsp, ipu or iva contain processor that require 3693 * an HW reset line to be assert / deassert in order to enable fully 3694 * the IP. Returns -EINVAL if @oh is null or if the operation is not 3695 * yet supported on this OMAP; otherwise, passes along the return value 3696 * from _assert_hardreset(). 3697 */ 3698 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name) 3699 { 3700 int ret; 3701 unsigned long flags; 3702 3703 if (!oh) 3704 return -EINVAL; 3705 3706 spin_lock_irqsave(&oh->_lock, flags); 3707 ret = _assert_hardreset(oh, name); 3708 spin_unlock_irqrestore(&oh->_lock, flags); 3709 3710 return ret; 3711 } 3712 3713 /** 3714 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules 3715 * contained in the hwmod module. 3716 * @oh: struct omap_hwmod * 3717 * @name: name of the reset line to look up and deassert 3718 * 3719 * Some IP like dsp, ipu or iva contain processor that require 3720 * an HW reset line to be assert / deassert in order to enable fully 3721 * the IP. Returns -EINVAL if @oh is null or if the operation is not 3722 * yet supported on this OMAP; otherwise, passes along the return value 3723 * from _deassert_hardreset(). 3724 */ 3725 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) 3726 { 3727 int ret; 3728 unsigned long flags; 3729 3730 if (!oh) 3731 return -EINVAL; 3732 3733 spin_lock_irqsave(&oh->_lock, flags); 3734 ret = _deassert_hardreset(oh, name); 3735 spin_unlock_irqrestore(&oh->_lock, flags); 3736 3737 return ret; 3738 } 3739 3740 /** 3741 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname 3742 * @classname: struct omap_hwmod_class name to search for 3743 * @fn: callback function pointer to call for each hwmod in class @classname 3744 * @user: arbitrary context data to pass to the callback function 3745 * 3746 * For each omap_hwmod of class @classname, call @fn. 3747 * If the callback function returns something other than 3748 * zero, the iterator is terminated, and the callback function's return 3749 * value is passed back to the caller. Returns 0 upon success, -EINVAL 3750 * if @classname or @fn are NULL, or passes back the error code from @fn. 3751 */ 3752 int omap_hwmod_for_each_by_class(const char *classname, 3753 int (*fn)(struct omap_hwmod *oh, 3754 void *user), 3755 void *user) 3756 { 3757 struct omap_hwmod *temp_oh; 3758 int ret = 0; 3759 3760 if (!classname || !fn) 3761 return -EINVAL; 3762 3763 pr_debug("omap_hwmod: %s: looking for modules of class %s\n", 3764 __func__, classname); 3765 3766 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 3767 if (!strcmp(temp_oh->class->name, classname)) { 3768 pr_debug("omap_hwmod: %s: %s: calling callback fn\n", 3769 __func__, temp_oh->name); 3770 ret = (*fn)(temp_oh, user); 3771 if (ret) 3772 break; 3773 } 3774 } 3775 3776 if (ret) 3777 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", 3778 __func__, ret); 3779 3780 return ret; 3781 } 3782 3783 /** 3784 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod 3785 * @oh: struct omap_hwmod * 3786 * @state: state that _setup() should leave the hwmod in 3787 * 3788 * Sets the hwmod state that @oh will enter at the end of _setup() 3789 * (called by omap_hwmod_setup_*()). See also the documentation 3790 * for _setup_postsetup(), above. Returns 0 upon success or 3791 * -EINVAL if there is a problem with the arguments or if the hwmod is 3792 * in the wrong state. 3793 */ 3794 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state) 3795 { 3796 int ret; 3797 unsigned long flags; 3798 3799 if (!oh) 3800 return -EINVAL; 3801 3802 if (state != _HWMOD_STATE_DISABLED && 3803 state != _HWMOD_STATE_ENABLED && 3804 state != _HWMOD_STATE_IDLE) 3805 return -EINVAL; 3806 3807 spin_lock_irqsave(&oh->_lock, flags); 3808 3809 if (oh->_state != _HWMOD_STATE_REGISTERED) { 3810 ret = -EINVAL; 3811 goto ohsps_unlock; 3812 } 3813 3814 oh->_postsetup_state = state; 3815 ret = 0; 3816 3817 ohsps_unlock: 3818 spin_unlock_irqrestore(&oh->_lock, flags); 3819 3820 return ret; 3821 } 3822 3823 /** 3824 * omap_hwmod_get_context_loss_count - get lost context count 3825 * @oh: struct omap_hwmod * 3826 * 3827 * Returns the context loss count of associated @oh 3828 * upon success, or zero if no context loss data is available. 3829 * 3830 * On OMAP4, this queries the per-hwmod context loss register, 3831 * assuming one exists. If not, or on OMAP2/3, this queries the 3832 * enclosing powerdomain context loss count. 3833 */ 3834 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) 3835 { 3836 struct powerdomain *pwrdm; 3837 int ret = 0; 3838 3839 if (soc_ops.get_context_lost) 3840 return soc_ops.get_context_lost(oh); 3841 3842 pwrdm = omap_hwmod_get_pwrdm(oh); 3843 if (pwrdm) 3844 ret = pwrdm_get_context_loss_count(pwrdm); 3845 3846 return ret; 3847 } 3848 3849 /** 3850 * omap_hwmod_init - initialize the hwmod code 3851 * 3852 * Sets up some function pointers needed by the hwmod code to operate on the 3853 * currently-booted SoC. Intended to be called once during kernel init 3854 * before any hwmods are registered. No return value. 3855 */ 3856 void __init omap_hwmod_init(void) 3857 { 3858 if (cpu_is_omap24xx()) { 3859 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; 3860 soc_ops.assert_hardreset = _omap2_assert_hardreset; 3861 soc_ops.deassert_hardreset = _omap2_deassert_hardreset; 3862 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; 3863 } else if (cpu_is_omap34xx()) { 3864 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; 3865 soc_ops.assert_hardreset = _omap2_assert_hardreset; 3866 soc_ops.deassert_hardreset = _omap2_deassert_hardreset; 3867 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; 3868 soc_ops.init_clkdm = _init_clkdm; 3869 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { 3870 soc_ops.enable_module = _omap4_enable_module; 3871 soc_ops.disable_module = _omap4_disable_module; 3872 soc_ops.wait_target_ready = _omap4_wait_target_ready; 3873 soc_ops.assert_hardreset = _omap4_assert_hardreset; 3874 soc_ops.deassert_hardreset = _omap4_deassert_hardreset; 3875 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 3876 soc_ops.init_clkdm = _init_clkdm; 3877 soc_ops.update_context_lost = _omap4_update_context_lost; 3878 soc_ops.get_context_lost = _omap4_get_context_lost; 3879 } else if (cpu_is_ti816x() || soc_is_am33xx() || soc_is_am43xx()) { 3880 soc_ops.enable_module = _omap4_enable_module; 3881 soc_ops.disable_module = _omap4_disable_module; 3882 soc_ops.wait_target_ready = _omap4_wait_target_ready; 3883 soc_ops.assert_hardreset = _omap4_assert_hardreset; 3884 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; 3885 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 3886 soc_ops.init_clkdm = _init_clkdm; 3887 } else { 3888 WARN(1, "omap_hwmod: unknown SoC type\n"); 3889 } 3890 3891 inited = true; 3892 } 3893 3894 /** 3895 * omap_hwmod_get_main_clk - get pointer to main clock name 3896 * @oh: struct omap_hwmod * 3897 * 3898 * Returns the main clock name assocated with @oh upon success, 3899 * or NULL if @oh is NULL. 3900 */ 3901 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) 3902 { 3903 if (!oh) 3904 return NULL; 3905 3906 return oh->main_clk; 3907 } 3908