1 /* 2 * omap_hwmod implementation for OMAP2/3/4 3 * 4 * Copyright (C) 2009-2011 Nokia Corporation 5 * Copyright (C) 2011-2012 Texas Instruments, Inc. 6 * 7 * Paul Walmsley, Benoît Cousson, Kevin Hilman 8 * 9 * Created in collaboration with (alphabetical order): Thara Gopinath, 10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand 11 * Sawant, Santosh Shilimkar, Richard Woodruff 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * Introduction 18 * ------------ 19 * One way to view an OMAP SoC is as a collection of largely unrelated 20 * IP blocks connected by interconnects. The IP blocks include 21 * devices such as ARM processors, audio serial interfaces, UARTs, 22 * etc. Some of these devices, like the DSP, are created by TI; 23 * others, like the SGX, largely originate from external vendors. In 24 * TI's documentation, on-chip devices are referred to as "OMAP 25 * modules." Some of these IP blocks are identical across several 26 * OMAP versions. Others are revised frequently. 27 * 28 * These OMAP modules are tied together by various interconnects. 29 * Most of the address and data flow between modules is via OCP-based 30 * interconnects such as the L3 and L4 buses; but there are other 31 * interconnects that distribute the hardware clock tree, handle idle 32 * and reset signaling, supply power, and connect the modules to 33 * various pads or balls on the OMAP package. 34 * 35 * OMAP hwmod provides a consistent way to describe the on-chip 36 * hardware blocks and their integration into the rest of the chip. 37 * This description can be automatically generated from the TI 38 * hardware database. OMAP hwmod provides a standard, consistent API 39 * to reset, enable, idle, and disable these hardware blocks. And 40 * hwmod provides a way for other core code, such as the Linux device 41 * code or the OMAP power management and address space mapping code, 42 * to query the hardware database. 43 * 44 * Using hwmod 45 * ----------- 46 * Drivers won't call hwmod functions directly. That is done by the 47 * omap_device code, and in rare occasions, by custom integration code 48 * in arch/arm/ *omap*. The omap_device code includes functions to 49 * build a struct platform_device using omap_hwmod data, and that is 50 * currently how hwmod data is communicated to drivers and to the 51 * Linux driver model. Most drivers will call omap_hwmod functions only 52 * indirectly, via pm_runtime*() functions. 53 * 54 * From a layering perspective, here is where the OMAP hwmod code 55 * fits into the kernel software stack: 56 * 57 * +-------------------------------+ 58 * | Device driver code | 59 * | (e.g., drivers/) | 60 * +-------------------------------+ 61 * | Linux driver model | 62 * | (platform_device / | 63 * | platform_driver data/code) | 64 * +-------------------------------+ 65 * | OMAP core-driver integration | 66 * |(arch/arm/mach-omap2/devices.c)| 67 * +-------------------------------+ 68 * | omap_device code | 69 * | (../plat-omap/omap_device.c) | 70 * +-------------------------------+ 71 * ----> | omap_hwmod code/data | <----- 72 * | (../mach-omap2/omap_hwmod*) | 73 * +-------------------------------+ 74 * | OMAP clock/PRCM/register fns | 75 * | ({read,write}l_relaxed, clk*) | 76 * +-------------------------------+ 77 * 78 * Device drivers should not contain any OMAP-specific code or data in 79 * them. They should only contain code to operate the IP block that 80 * the driver is responsible for. This is because these IP blocks can 81 * also appear in other SoCs, either from TI (such as DaVinci) or from 82 * other manufacturers; and drivers should be reusable across other 83 * platforms. 84 * 85 * The OMAP hwmod code also will attempt to reset and idle all on-chip 86 * devices upon boot. The goal here is for the kernel to be 87 * completely self-reliant and independent from bootloaders. This is 88 * to ensure a repeatable configuration, both to ensure consistent 89 * runtime behavior, and to make it easier for others to reproduce 90 * bugs. 91 * 92 * OMAP module activity states 93 * --------------------------- 94 * The hwmod code considers modules to be in one of several activity 95 * states. IP blocks start out in an UNKNOWN state, then once they 96 * are registered via the hwmod code, proceed to the REGISTERED state. 97 * Once their clock names are resolved to clock pointers, the module 98 * enters the CLKS_INITED state; and finally, once the module has been 99 * reset and the integration registers programmed, the INITIALIZED state 100 * is entered. The hwmod code will then place the module into either 101 * the IDLE state to save power, or in the case of a critical system 102 * module, the ENABLED state. 103 * 104 * OMAP core integration code can then call omap_hwmod*() functions 105 * directly to move the module between the IDLE, ENABLED, and DISABLED 106 * states, as needed. This is done during both the PM idle loop, and 107 * in the OMAP core integration code's implementation of the PM runtime 108 * functions. 109 * 110 * References 111 * ---------- 112 * This is a partial list. 113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) 114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) 115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) 116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) 117 * - Open Core Protocol Specification 2.2 118 * 119 * To do: 120 * - handle IO mapping 121 * - bus throughput & module latency measurement code 122 * 123 * XXX add tests at the beginning of each function to ensure the hwmod is 124 * in the appropriate state 125 * XXX error return values should be checked to ensure that they are 126 * appropriate 127 */ 128 #undef DEBUG 129 130 #include <linux/kernel.h> 131 #include <linux/errno.h> 132 #include <linux/io.h> 133 #include <linux/clk.h> 134 #include <linux/clk-provider.h> 135 #include <linux/delay.h> 136 #include <linux/err.h> 137 #include <linux/list.h> 138 #include <linux/mutex.h> 139 #include <linux/spinlock.h> 140 #include <linux/slab.h> 141 #include <linux/bootmem.h> 142 #include <linux/cpu.h> 143 #include <linux/of.h> 144 #include <linux/of_address.h> 145 146 #include <asm/system_misc.h> 147 148 #include "clock.h" 149 #include "omap_hwmod.h" 150 151 #include "soc.h" 152 #include "common.h" 153 #include "clockdomain.h" 154 #include "powerdomain.h" 155 #include "cm2xxx.h" 156 #include "cm3xxx.h" 157 #include "cm33xx.h" 158 #include "prm.h" 159 #include "prm3xxx.h" 160 #include "prm44xx.h" 161 #include "prm33xx.h" 162 #include "prminst44xx.h" 163 #include "mux.h" 164 #include "pm.h" 165 166 /* Name of the OMAP hwmod for the MPU */ 167 #define MPU_INITIATOR_NAME "mpu" 168 169 /* 170 * Number of struct omap_hwmod_link records per struct 171 * omap_hwmod_ocp_if record (master->slave and slave->master) 172 */ 173 #define LINKS_PER_OCP_IF 2 174 175 /* 176 * Address offset (in bytes) between the reset control and the reset 177 * status registers: 4 bytes on OMAP4 178 */ 179 #define OMAP4_RST_CTRL_ST_OFFSET 4 180 181 /* 182 * Maximum length for module clock handle names 183 */ 184 #define MOD_CLK_MAX_NAME_LEN 32 185 186 /** 187 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations 188 * @enable_module: function to enable a module (via MODULEMODE) 189 * @disable_module: function to disable a module (via MODULEMODE) 190 * 191 * XXX Eventually this functionality will be hidden inside the PRM/CM 192 * device drivers. Until then, this should avoid huge blocks of cpu_is_*() 193 * conditionals in this code. 194 */ 195 struct omap_hwmod_soc_ops { 196 void (*enable_module)(struct omap_hwmod *oh); 197 int (*disable_module)(struct omap_hwmod *oh); 198 int (*wait_target_ready)(struct omap_hwmod *oh); 199 int (*assert_hardreset)(struct omap_hwmod *oh, 200 struct omap_hwmod_rst_info *ohri); 201 int (*deassert_hardreset)(struct omap_hwmod *oh, 202 struct omap_hwmod_rst_info *ohri); 203 int (*is_hardreset_asserted)(struct omap_hwmod *oh, 204 struct omap_hwmod_rst_info *ohri); 205 int (*init_clkdm)(struct omap_hwmod *oh); 206 void (*update_context_lost)(struct omap_hwmod *oh); 207 int (*get_context_lost)(struct omap_hwmod *oh); 208 int (*disable_direct_prcm)(struct omap_hwmod *oh); 209 }; 210 211 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ 212 static struct omap_hwmod_soc_ops soc_ops; 213 214 /* omap_hwmod_list contains all registered struct omap_hwmods */ 215 static LIST_HEAD(omap_hwmod_list); 216 217 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ 218 static struct omap_hwmod *mpu_oh; 219 220 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */ 221 static DEFINE_SPINLOCK(io_chain_lock); 222 223 /* 224 * linkspace: ptr to a buffer that struct omap_hwmod_link records are 225 * allocated from - used to reduce the number of small memory 226 * allocations, which has a significant impact on performance 227 */ 228 static struct omap_hwmod_link *linkspace; 229 230 /* 231 * free_ls, max_ls: array indexes into linkspace; representing the 232 * next free struct omap_hwmod_link index, and the maximum number of 233 * struct omap_hwmod_link records allocated (respectively) 234 */ 235 static unsigned short free_ls, max_ls, ls_supp; 236 237 /* inited: set to true once the hwmod code is initialized */ 238 static bool inited; 239 240 /* Private functions */ 241 242 /** 243 * _fetch_next_ocp_if - return the next OCP interface in a list 244 * @p: ptr to a ptr to the list_head inside the ocp_if to return 245 * @i: pointer to the index of the element pointed to by @p in the list 246 * 247 * Return a pointer to the struct omap_hwmod_ocp_if record 248 * containing the struct list_head pointed to by @p, and increment 249 * @p such that a future call to this routine will return the next 250 * record. 251 */ 252 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p, 253 int *i) 254 { 255 struct omap_hwmod_ocp_if *oi; 256 257 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if; 258 *p = (*p)->next; 259 260 *i = *i + 1; 261 262 return oi; 263 } 264 265 /** 266 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy 267 * @oh: struct omap_hwmod * 268 * 269 * Load the current value of the hwmod OCP_SYSCONFIG register into the 270 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no 271 * OCP_SYSCONFIG register or 0 upon success. 272 */ 273 static int _update_sysc_cache(struct omap_hwmod *oh) 274 { 275 if (!oh->class->sysc) { 276 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 277 return -EINVAL; 278 } 279 280 /* XXX ensure module interface clock is up */ 281 282 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); 283 284 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) 285 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; 286 287 return 0; 288 } 289 290 /** 291 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register 292 * @v: OCP_SYSCONFIG value to write 293 * @oh: struct omap_hwmod * 294 * 295 * Write @v into the module class' OCP_SYSCONFIG register, if it has 296 * one. No return value. 297 */ 298 static void _write_sysconfig(u32 v, struct omap_hwmod *oh) 299 { 300 if (!oh->class->sysc) { 301 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 302 return; 303 } 304 305 /* XXX ensure module interface clock is up */ 306 307 /* Module might have lost context, always update cache and register */ 308 oh->_sysc_cache = v; 309 310 /* 311 * Some IP blocks (such as RTC) require unlocking of IP before 312 * accessing its registers. If a function pointer is present 313 * to unlock, then call it before accessing sysconfig and 314 * call lock after writing sysconfig. 315 */ 316 if (oh->class->unlock) 317 oh->class->unlock(oh); 318 319 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); 320 321 if (oh->class->lock) 322 oh->class->lock(oh); 323 } 324 325 /** 326 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v 327 * @oh: struct omap_hwmod * 328 * @standbymode: MIDLEMODE field bits 329 * @v: pointer to register contents to modify 330 * 331 * Update the master standby mode bits in @v to be @standbymode for 332 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL 333 * upon error or 0 upon success. 334 */ 335 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, 336 u32 *v) 337 { 338 u32 mstandby_mask; 339 u8 mstandby_shift; 340 341 if (!oh->class->sysc || 342 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) 343 return -EINVAL; 344 345 if (!oh->class->sysc->sysc_fields) { 346 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 347 return -EINVAL; 348 } 349 350 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; 351 mstandby_mask = (0x3 << mstandby_shift); 352 353 *v &= ~mstandby_mask; 354 *v |= __ffs(standbymode) << mstandby_shift; 355 356 return 0; 357 } 358 359 /** 360 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v 361 * @oh: struct omap_hwmod * 362 * @idlemode: SIDLEMODE field bits 363 * @v: pointer to register contents to modify 364 * 365 * Update the slave idle mode bits in @v to be @idlemode for the @oh 366 * hwmod. Does not write to the hardware. Returns -EINVAL upon error 367 * or 0 upon success. 368 */ 369 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) 370 { 371 u32 sidle_mask; 372 u8 sidle_shift; 373 374 if (!oh->class->sysc || 375 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) 376 return -EINVAL; 377 378 if (!oh->class->sysc->sysc_fields) { 379 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 380 return -EINVAL; 381 } 382 383 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; 384 sidle_mask = (0x3 << sidle_shift); 385 386 *v &= ~sidle_mask; 387 *v |= __ffs(idlemode) << sidle_shift; 388 389 return 0; 390 } 391 392 /** 393 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v 394 * @oh: struct omap_hwmod * 395 * @clockact: CLOCKACTIVITY field bits 396 * @v: pointer to register contents to modify 397 * 398 * Update the clockactivity mode bits in @v to be @clockact for the 399 * @oh hwmod. Used for additional powersaving on some modules. Does 400 * not write to the hardware. Returns -EINVAL upon error or 0 upon 401 * success. 402 */ 403 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) 404 { 405 u32 clkact_mask; 406 u8 clkact_shift; 407 408 if (!oh->class->sysc || 409 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) 410 return -EINVAL; 411 412 if (!oh->class->sysc->sysc_fields) { 413 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 414 return -EINVAL; 415 } 416 417 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; 418 clkact_mask = (0x3 << clkact_shift); 419 420 *v &= ~clkact_mask; 421 *v |= clockact << clkact_shift; 422 423 return 0; 424 } 425 426 /** 427 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v 428 * @oh: struct omap_hwmod * 429 * @v: pointer to register contents to modify 430 * 431 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon 432 * error or 0 upon success. 433 */ 434 static int _set_softreset(struct omap_hwmod *oh, u32 *v) 435 { 436 u32 softrst_mask; 437 438 if (!oh->class->sysc || 439 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 440 return -EINVAL; 441 442 if (!oh->class->sysc->sysc_fields) { 443 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 444 return -EINVAL; 445 } 446 447 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 448 449 *v |= softrst_mask; 450 451 return 0; 452 } 453 454 /** 455 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v 456 * @oh: struct omap_hwmod * 457 * @v: pointer to register contents to modify 458 * 459 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon 460 * error or 0 upon success. 461 */ 462 static int _clear_softreset(struct omap_hwmod *oh, u32 *v) 463 { 464 u32 softrst_mask; 465 466 if (!oh->class->sysc || 467 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 468 return -EINVAL; 469 470 if (!oh->class->sysc->sysc_fields) { 471 WARN(1, 472 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n", 473 oh->name); 474 return -EINVAL; 475 } 476 477 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 478 479 *v &= ~softrst_mask; 480 481 return 0; 482 } 483 484 /** 485 * _wait_softreset_complete - wait for an OCP softreset to complete 486 * @oh: struct omap_hwmod * to wait on 487 * 488 * Wait until the IP block represented by @oh reports that its OCP 489 * softreset is complete. This can be triggered by software (see 490 * _ocp_softreset()) or by hardware upon returning from off-mode (one 491 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT 492 * microseconds. Returns the number of microseconds waited. 493 */ 494 static int _wait_softreset_complete(struct omap_hwmod *oh) 495 { 496 struct omap_hwmod_class_sysconfig *sysc; 497 u32 softrst_mask; 498 int c = 0; 499 500 sysc = oh->class->sysc; 501 502 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 503 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) 504 & SYSS_RESETDONE_MASK), 505 MAX_MODULE_SOFTRESET_WAIT, c); 506 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { 507 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); 508 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) 509 & softrst_mask), 510 MAX_MODULE_SOFTRESET_WAIT, c); 511 } 512 513 return c; 514 } 515 516 /** 517 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v 518 * @oh: struct omap_hwmod * 519 * 520 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register 521 * of some modules. When the DMA must perform read/write accesses, the 522 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop 523 * for power management, software must set the DMADISABLE bit back to 1. 524 * 525 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon 526 * error or 0 upon success. 527 */ 528 static int _set_dmadisable(struct omap_hwmod *oh) 529 { 530 u32 v; 531 u32 dmadisable_mask; 532 533 if (!oh->class->sysc || 534 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) 535 return -EINVAL; 536 537 if (!oh->class->sysc->sysc_fields) { 538 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 539 return -EINVAL; 540 } 541 542 /* clocks must be on for this operation */ 543 if (oh->_state != _HWMOD_STATE_ENABLED) { 544 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name); 545 return -EINVAL; 546 } 547 548 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name); 549 550 v = oh->_sysc_cache; 551 dmadisable_mask = 552 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); 553 v |= dmadisable_mask; 554 _write_sysconfig(v, oh); 555 556 return 0; 557 } 558 559 /** 560 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v 561 * @oh: struct omap_hwmod * 562 * @autoidle: desired AUTOIDLE bitfield value (0 or 1) 563 * @v: pointer to register contents to modify 564 * 565 * Update the module autoidle bit in @v to be @autoidle for the @oh 566 * hwmod. The autoidle bit controls whether the module can gate 567 * internal clocks automatically when it isn't doing anything; the 568 * exact function of this bit varies on a per-module basis. This 569 * function does not write to the hardware. Returns -EINVAL upon 570 * error or 0 upon success. 571 */ 572 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, 573 u32 *v) 574 { 575 u32 autoidle_mask; 576 u8 autoidle_shift; 577 578 if (!oh->class->sysc || 579 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) 580 return -EINVAL; 581 582 if (!oh->class->sysc->sysc_fields) { 583 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 584 return -EINVAL; 585 } 586 587 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; 588 autoidle_mask = (0x1 << autoidle_shift); 589 590 *v &= ~autoidle_mask; 591 *v |= autoidle << autoidle_shift; 592 593 return 0; 594 } 595 596 /** 597 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux 598 * @oh: struct omap_hwmod * 599 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable 600 * 601 * Set or clear the I/O pad wakeup flag in the mux entries for the 602 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array 603 * in memory. If the hwmod is currently idled, and the new idle 604 * values don't match the previous ones, this function will also 605 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not 606 * currently idled, this function won't touch the hardware: the new 607 * mux settings are written to the SCM PADCTRL registers when the 608 * hwmod is idled. No return value. 609 */ 610 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake) 611 { 612 struct omap_device_pad *pad; 613 bool change = false; 614 u16 prev_idle; 615 int j; 616 617 if (!oh->mux || !oh->mux->enabled) 618 return; 619 620 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) { 621 pad = oh->mux->pads_dynamic[j]; 622 623 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP)) 624 continue; 625 626 prev_idle = pad->idle; 627 628 if (set_wake) 629 pad->idle |= OMAP_WAKEUP_EN; 630 else 631 pad->idle &= ~OMAP_WAKEUP_EN; 632 633 if (prev_idle != pad->idle) 634 change = true; 635 } 636 637 if (change && oh->_state == _HWMOD_STATE_IDLE) 638 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 639 } 640 641 /** 642 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 643 * @oh: struct omap_hwmod * 644 * 645 * Allow the hardware module @oh to send wakeups. Returns -EINVAL 646 * upon error or 0 upon success. 647 */ 648 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) 649 { 650 if (!oh->class->sysc || 651 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 652 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 653 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 654 return -EINVAL; 655 656 if (!oh->class->sysc->sysc_fields) { 657 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 658 return -EINVAL; 659 } 660 661 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 662 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; 663 664 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 665 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 666 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 667 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 668 669 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 670 671 return 0; 672 } 673 674 /** 675 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 676 * @oh: struct omap_hwmod * 677 * 678 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL 679 * upon error or 0 upon success. 680 */ 681 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) 682 { 683 if (!oh->class->sysc || 684 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 685 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 686 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 687 return -EINVAL; 688 689 if (!oh->class->sysc->sysc_fields) { 690 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 691 return -EINVAL; 692 } 693 694 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 695 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); 696 697 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 698 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); 699 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 700 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); 701 702 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 703 704 return 0; 705 } 706 707 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh) 708 { 709 struct clk_hw_omap *clk; 710 711 if (oh->clkdm) { 712 return oh->clkdm; 713 } else if (oh->_clk) { 714 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC) 715 return NULL; 716 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk)); 717 return clk->clkdm; 718 } 719 return NULL; 720 } 721 722 /** 723 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active 724 * @oh: struct omap_hwmod * 725 * 726 * Prevent the hardware module @oh from entering idle while the 727 * hardare module initiator @init_oh is active. Useful when a module 728 * will be accessed by a particular initiator (e.g., if a module will 729 * be accessed by the IVA, there should be a sleepdep between the IVA 730 * initiator and the module). Only applies to modules in smart-idle 731 * mode. If the clockdomain is marked as not needing autodeps, return 732 * 0 without doing anything. Otherwise, returns -EINVAL upon error or 733 * passes along clkdm_add_sleepdep() value upon success. 734 */ 735 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 736 { 737 struct clockdomain *clkdm, *init_clkdm; 738 739 clkdm = _get_clkdm(oh); 740 init_clkdm = _get_clkdm(init_oh); 741 742 if (!clkdm || !init_clkdm) 743 return -EINVAL; 744 745 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) 746 return 0; 747 748 return clkdm_add_sleepdep(clkdm, init_clkdm); 749 } 750 751 /** 752 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active 753 * @oh: struct omap_hwmod * 754 * 755 * Allow the hardware module @oh to enter idle while the hardare 756 * module initiator @init_oh is active. Useful when a module will not 757 * be accessed by a particular initiator (e.g., if a module will not 758 * be accessed by the IVA, there should be no sleepdep between the IVA 759 * initiator and the module). Only applies to modules in smart-idle 760 * mode. If the clockdomain is marked as not needing autodeps, return 761 * 0 without doing anything. Returns -EINVAL upon error or passes 762 * along clkdm_del_sleepdep() value upon success. 763 */ 764 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 765 { 766 struct clockdomain *clkdm, *init_clkdm; 767 768 clkdm = _get_clkdm(oh); 769 init_clkdm = _get_clkdm(init_oh); 770 771 if (!clkdm || !init_clkdm) 772 return -EINVAL; 773 774 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) 775 return 0; 776 777 return clkdm_del_sleepdep(clkdm, init_clkdm); 778 } 779 780 /** 781 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk 782 * @oh: struct omap_hwmod * 783 * 784 * Called from _init_clocks(). Populates the @oh _clk (main 785 * functional clock pointer) if a clock matching the hwmod name is found, 786 * or a main_clk is present. Returns 0 on success or -EINVAL on error. 787 */ 788 static int _init_main_clk(struct omap_hwmod *oh) 789 { 790 int ret = 0; 791 char name[MOD_CLK_MAX_NAME_LEN]; 792 struct clk *clk; 793 794 /* +7 magic comes from '_mod_ck' suffix */ 795 if (strlen(oh->name) + 7 > MOD_CLK_MAX_NAME_LEN) 796 pr_warn("%s: warning: cropping name for %s\n", __func__, 797 oh->name); 798 799 strncpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - 7); 800 strcat(name, "_mod_ck"); 801 802 clk = clk_get(NULL, name); 803 if (!IS_ERR(clk)) { 804 oh->_clk = clk; 805 soc_ops.disable_direct_prcm(oh); 806 oh->main_clk = kstrdup(name, GFP_KERNEL); 807 } else { 808 if (!oh->main_clk) 809 return 0; 810 811 oh->_clk = clk_get(NULL, oh->main_clk); 812 } 813 814 if (IS_ERR(oh->_clk)) { 815 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n", 816 oh->name, oh->main_clk); 817 return -EINVAL; 818 } 819 /* 820 * HACK: This needs a re-visit once clk_prepare() is implemented 821 * to do something meaningful. Today its just a no-op. 822 * If clk_prepare() is used at some point to do things like 823 * voltage scaling etc, then this would have to be moved to 824 * some point where subsystems like i2c and pmic become 825 * available. 826 */ 827 clk_prepare(oh->_clk); 828 829 if (!_get_clkdm(oh)) 830 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n", 831 oh->name, oh->main_clk); 832 833 return ret; 834 } 835 836 /** 837 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks 838 * @oh: struct omap_hwmod * 839 * 840 * Called from _init_clocks(). Populates the @oh OCP slave interface 841 * clock pointers. Returns 0 on success or -EINVAL on error. 842 */ 843 static int _init_interface_clks(struct omap_hwmod *oh) 844 { 845 struct omap_hwmod_ocp_if *os; 846 struct list_head *p; 847 struct clk *c; 848 int i = 0; 849 int ret = 0; 850 851 p = oh->slave_ports.next; 852 853 while (i < oh->slaves_cnt) { 854 os = _fetch_next_ocp_if(&p, &i); 855 if (!os->clk) 856 continue; 857 858 c = clk_get(NULL, os->clk); 859 if (IS_ERR(c)) { 860 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n", 861 oh->name, os->clk); 862 ret = -EINVAL; 863 continue; 864 } 865 os->_clk = c; 866 /* 867 * HACK: This needs a re-visit once clk_prepare() is implemented 868 * to do something meaningful. Today its just a no-op. 869 * If clk_prepare() is used at some point to do things like 870 * voltage scaling etc, then this would have to be moved to 871 * some point where subsystems like i2c and pmic become 872 * available. 873 */ 874 clk_prepare(os->_clk); 875 } 876 877 return ret; 878 } 879 880 /** 881 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks 882 * @oh: struct omap_hwmod * 883 * 884 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk 885 * clock pointers. Returns 0 on success or -EINVAL on error. 886 */ 887 static int _init_opt_clks(struct omap_hwmod *oh) 888 { 889 struct omap_hwmod_opt_clk *oc; 890 struct clk *c; 891 int i; 892 int ret = 0; 893 894 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { 895 c = clk_get(NULL, oc->clk); 896 if (IS_ERR(c)) { 897 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n", 898 oh->name, oc->clk); 899 ret = -EINVAL; 900 continue; 901 } 902 oc->_clk = c; 903 /* 904 * HACK: This needs a re-visit once clk_prepare() is implemented 905 * to do something meaningful. Today its just a no-op. 906 * If clk_prepare() is used at some point to do things like 907 * voltage scaling etc, then this would have to be moved to 908 * some point where subsystems like i2c and pmic become 909 * available. 910 */ 911 clk_prepare(oc->_clk); 912 } 913 914 return ret; 915 } 916 917 static void _enable_optional_clocks(struct omap_hwmod *oh) 918 { 919 struct omap_hwmod_opt_clk *oc; 920 int i; 921 922 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name); 923 924 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 925 if (oc->_clk) { 926 pr_debug("omap_hwmod: enable %s:%s\n", oc->role, 927 __clk_get_name(oc->_clk)); 928 clk_enable(oc->_clk); 929 } 930 } 931 932 static void _disable_optional_clocks(struct omap_hwmod *oh) 933 { 934 struct omap_hwmod_opt_clk *oc; 935 int i; 936 937 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name); 938 939 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 940 if (oc->_clk) { 941 pr_debug("omap_hwmod: disable %s:%s\n", oc->role, 942 __clk_get_name(oc->_clk)); 943 clk_disable(oc->_clk); 944 } 945 } 946 947 /** 948 * _enable_clocks - enable hwmod main clock and interface clocks 949 * @oh: struct omap_hwmod * 950 * 951 * Enables all clocks necessary for register reads and writes to succeed 952 * on the hwmod @oh. Returns 0. 953 */ 954 static int _enable_clocks(struct omap_hwmod *oh) 955 { 956 struct omap_hwmod_ocp_if *os; 957 struct list_head *p; 958 int i = 0; 959 960 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); 961 962 if (oh->_clk) 963 clk_enable(oh->_clk); 964 965 p = oh->slave_ports.next; 966 967 while (i < oh->slaves_cnt) { 968 os = _fetch_next_ocp_if(&p, &i); 969 970 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) 971 clk_enable(os->_clk); 972 } 973 974 if (oh->flags & HWMOD_OPT_CLKS_NEEDED) 975 _enable_optional_clocks(oh); 976 977 /* The opt clocks are controlled by the device driver. */ 978 979 return 0; 980 } 981 982 /** 983 * _disable_clocks - disable hwmod main clock and interface clocks 984 * @oh: struct omap_hwmod * 985 * 986 * Disables the hwmod @oh main functional and interface clocks. Returns 0. 987 */ 988 static int _disable_clocks(struct omap_hwmod *oh) 989 { 990 struct omap_hwmod_ocp_if *os; 991 struct list_head *p; 992 int i = 0; 993 994 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); 995 996 if (oh->_clk) 997 clk_disable(oh->_clk); 998 999 p = oh->slave_ports.next; 1000 1001 while (i < oh->slaves_cnt) { 1002 os = _fetch_next_ocp_if(&p, &i); 1003 1004 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) 1005 clk_disable(os->_clk); 1006 } 1007 1008 if (oh->flags & HWMOD_OPT_CLKS_NEEDED) 1009 _disable_optional_clocks(oh); 1010 1011 /* The opt clocks are controlled by the device driver. */ 1012 1013 return 0; 1014 } 1015 1016 /** 1017 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 1018 * @oh: struct omap_hwmod * 1019 * 1020 * Enables the PRCM module mode related to the hwmod @oh. 1021 * No return value. 1022 */ 1023 static void _omap4_enable_module(struct omap_hwmod *oh) 1024 { 1025 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 1026 return; 1027 1028 pr_debug("omap_hwmod: %s: %s: %d\n", 1029 oh->name, __func__, oh->prcm.omap4.modulemode); 1030 1031 omap_cm_module_enable(oh->prcm.omap4.modulemode, 1032 oh->clkdm->prcm_partition, 1033 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs); 1034 } 1035 1036 /** 1037 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 1038 * @oh: struct omap_hwmod * 1039 * 1040 * Wait for a module @oh to enter slave idle. Returns 0 if the module 1041 * does not have an IDLEST bit or if the module successfully enters 1042 * slave idle; otherwise, pass along the return value of the 1043 * appropriate *_cm*_wait_module_idle() function. 1044 */ 1045 static int _omap4_wait_target_disable(struct omap_hwmod *oh) 1046 { 1047 if (!oh) 1048 return -EINVAL; 1049 1050 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm) 1051 return 0; 1052 1053 if (oh->flags & HWMOD_NO_IDLEST) 1054 return 0; 1055 1056 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition, 1057 oh->clkdm->cm_inst, 1058 oh->prcm.omap4.clkctrl_offs, 0); 1059 } 1060 1061 /** 1062 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh 1063 * @oh: struct omap_hwmod *oh 1064 * 1065 * Count and return the number of MPU IRQs associated with the hwmod 1066 * @oh. Used to allocate struct resource data. Returns 0 if @oh is 1067 * NULL. 1068 */ 1069 static int _count_mpu_irqs(struct omap_hwmod *oh) 1070 { 1071 struct omap_hwmod_irq_info *ohii; 1072 int i = 0; 1073 1074 if (!oh || !oh->mpu_irqs) 1075 return 0; 1076 1077 do { 1078 ohii = &oh->mpu_irqs[i++]; 1079 } while (ohii->irq != -1); 1080 1081 return i-1; 1082 } 1083 1084 /** 1085 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh 1086 * @oh: struct omap_hwmod *oh 1087 * 1088 * Count and return the number of SDMA request lines associated with 1089 * the hwmod @oh. Used to allocate struct resource data. Returns 0 1090 * if @oh is NULL. 1091 */ 1092 static int _count_sdma_reqs(struct omap_hwmod *oh) 1093 { 1094 struct omap_hwmod_dma_info *ohdi; 1095 int i = 0; 1096 1097 if (!oh || !oh->sdma_reqs) 1098 return 0; 1099 1100 do { 1101 ohdi = &oh->sdma_reqs[i++]; 1102 } while (ohdi->dma_req != -1); 1103 1104 return i-1; 1105 } 1106 1107 /** 1108 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh 1109 * @oh: struct omap_hwmod *oh 1110 * 1111 * Count and return the number of address space ranges associated with 1112 * the hwmod @oh. Used to allocate struct resource data. Returns 0 1113 * if @oh is NULL. 1114 */ 1115 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) 1116 { 1117 struct omap_hwmod_addr_space *mem; 1118 int i = 0; 1119 1120 if (!os || !os->addr) 1121 return 0; 1122 1123 do { 1124 mem = &os->addr[i++]; 1125 } while (mem->pa_start != mem->pa_end); 1126 1127 return i-1; 1128 } 1129 1130 /** 1131 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name 1132 * @oh: struct omap_hwmod * to operate on 1133 * @name: pointer to the name of the MPU interrupt number to fetch (optional) 1134 * @irq: pointer to an unsigned int to store the MPU IRQ number to 1135 * 1136 * Retrieve a MPU hardware IRQ line number named by @name associated 1137 * with the IP block pointed to by @oh. The IRQ number will be filled 1138 * into the address pointed to by @dma. When @name is non-null, the 1139 * IRQ line number associated with the named entry will be returned. 1140 * If @name is null, the first matching entry will be returned. Data 1141 * order is not meaningful in hwmod data, so callers are strongly 1142 * encouraged to use a non-null @name whenever possible to avoid 1143 * unpredictable effects if hwmod data is later added that causes data 1144 * ordering to change. Returns 0 upon success or a negative error 1145 * code upon error. 1146 */ 1147 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name, 1148 unsigned int *irq) 1149 { 1150 int i; 1151 bool found = false; 1152 1153 if (!oh->mpu_irqs) 1154 return -ENOENT; 1155 1156 i = 0; 1157 while (oh->mpu_irqs[i].irq != -1) { 1158 if (name == oh->mpu_irqs[i].name || 1159 !strcmp(name, oh->mpu_irqs[i].name)) { 1160 found = true; 1161 break; 1162 } 1163 i++; 1164 } 1165 1166 if (!found) 1167 return -ENOENT; 1168 1169 *irq = oh->mpu_irqs[i].irq; 1170 1171 return 0; 1172 } 1173 1174 /** 1175 * _get_sdma_req_by_name - fetch SDMA request line ID by name 1176 * @oh: struct omap_hwmod * to operate on 1177 * @name: pointer to the name of the SDMA request line to fetch (optional) 1178 * @dma: pointer to an unsigned int to store the request line ID to 1179 * 1180 * Retrieve an SDMA request line ID named by @name on the IP block 1181 * pointed to by @oh. The ID will be filled into the address pointed 1182 * to by @dma. When @name is non-null, the request line ID associated 1183 * with the named entry will be returned. If @name is null, the first 1184 * matching entry will be returned. Data order is not meaningful in 1185 * hwmod data, so callers are strongly encouraged to use a non-null 1186 * @name whenever possible to avoid unpredictable effects if hwmod 1187 * data is later added that causes data ordering to change. Returns 0 1188 * upon success or a negative error code upon error. 1189 */ 1190 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name, 1191 unsigned int *dma) 1192 { 1193 int i; 1194 bool found = false; 1195 1196 if (!oh->sdma_reqs) 1197 return -ENOENT; 1198 1199 i = 0; 1200 while (oh->sdma_reqs[i].dma_req != -1) { 1201 if (name == oh->sdma_reqs[i].name || 1202 !strcmp(name, oh->sdma_reqs[i].name)) { 1203 found = true; 1204 break; 1205 } 1206 i++; 1207 } 1208 1209 if (!found) 1210 return -ENOENT; 1211 1212 *dma = oh->sdma_reqs[i].dma_req; 1213 1214 return 0; 1215 } 1216 1217 /** 1218 * _get_addr_space_by_name - fetch address space start & end by name 1219 * @oh: struct omap_hwmod * to operate on 1220 * @name: pointer to the name of the address space to fetch (optional) 1221 * @pa_start: pointer to a u32 to store the starting address to 1222 * @pa_end: pointer to a u32 to store the ending address to 1223 * 1224 * Retrieve address space start and end addresses for the IP block 1225 * pointed to by @oh. The data will be filled into the addresses 1226 * pointed to by @pa_start and @pa_end. When @name is non-null, the 1227 * address space data associated with the named entry will be 1228 * returned. If @name is null, the first matching entry will be 1229 * returned. Data order is not meaningful in hwmod data, so callers 1230 * are strongly encouraged to use a non-null @name whenever possible 1231 * to avoid unpredictable effects if hwmod data is later added that 1232 * causes data ordering to change. Returns 0 upon success or a 1233 * negative error code upon error. 1234 */ 1235 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name, 1236 u32 *pa_start, u32 *pa_end) 1237 { 1238 int i, j; 1239 struct omap_hwmod_ocp_if *os; 1240 struct list_head *p = NULL; 1241 bool found = false; 1242 1243 p = oh->slave_ports.next; 1244 1245 i = 0; 1246 while (i < oh->slaves_cnt) { 1247 os = _fetch_next_ocp_if(&p, &i); 1248 1249 if (!os->addr) 1250 return -ENOENT; 1251 1252 j = 0; 1253 while (os->addr[j].pa_start != os->addr[j].pa_end) { 1254 if (name == os->addr[j].name || 1255 !strcmp(name, os->addr[j].name)) { 1256 found = true; 1257 break; 1258 } 1259 j++; 1260 } 1261 1262 if (found) 1263 break; 1264 } 1265 1266 if (!found) 1267 return -ENOENT; 1268 1269 *pa_start = os->addr[j].pa_start; 1270 *pa_end = os->addr[j].pa_end; 1271 1272 return 0; 1273 } 1274 1275 /** 1276 * _save_mpu_port_index - find and save the index to @oh's MPU port 1277 * @oh: struct omap_hwmod * 1278 * 1279 * Determines the array index of the OCP slave port that the MPU uses 1280 * to address the device, and saves it into the struct omap_hwmod. 1281 * Intended to be called during hwmod registration only. No return 1282 * value. 1283 */ 1284 static void __init _save_mpu_port_index(struct omap_hwmod *oh) 1285 { 1286 struct omap_hwmod_ocp_if *os = NULL; 1287 struct list_head *p; 1288 int i = 0; 1289 1290 if (!oh) 1291 return; 1292 1293 oh->_int_flags |= _HWMOD_NO_MPU_PORT; 1294 1295 p = oh->slave_ports.next; 1296 1297 while (i < oh->slaves_cnt) { 1298 os = _fetch_next_ocp_if(&p, &i); 1299 if (os->user & OCP_USER_MPU) { 1300 oh->_mpu_port = os; 1301 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT; 1302 break; 1303 } 1304 } 1305 1306 return; 1307 } 1308 1309 /** 1310 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU 1311 * @oh: struct omap_hwmod * 1312 * 1313 * Given a pointer to a struct omap_hwmod record @oh, return a pointer 1314 * to the struct omap_hwmod_ocp_if record that is used by the MPU to 1315 * communicate with the IP block. This interface need not be directly 1316 * connected to the MPU (and almost certainly is not), but is directly 1317 * connected to the IP block represented by @oh. Returns a pointer 1318 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon 1319 * error or if there does not appear to be a path from the MPU to this 1320 * IP block. 1321 */ 1322 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh) 1323 { 1324 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0) 1325 return NULL; 1326 1327 return oh->_mpu_port; 1328 }; 1329 1330 /** 1331 * _find_mpu_rt_addr_space - return MPU register target address space for @oh 1332 * @oh: struct omap_hwmod * 1333 * 1334 * Returns a pointer to the struct omap_hwmod_addr_space record representing 1335 * the register target MPU address space; or returns NULL upon error. 1336 */ 1337 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh) 1338 { 1339 struct omap_hwmod_ocp_if *os; 1340 struct omap_hwmod_addr_space *mem; 1341 int found = 0, i = 0; 1342 1343 os = _find_mpu_rt_port(oh); 1344 if (!os || !os->addr) 1345 return NULL; 1346 1347 do { 1348 mem = &os->addr[i++]; 1349 if (mem->flags & ADDR_TYPE_RT) 1350 found = 1; 1351 } while (!found && mem->pa_start != mem->pa_end); 1352 1353 return (found) ? mem : NULL; 1354 } 1355 1356 /** 1357 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG 1358 * @oh: struct omap_hwmod * 1359 * 1360 * Ensure that the OCP_SYSCONFIG register for the IP block represented 1361 * by @oh is set to indicate to the PRCM that the IP block is active. 1362 * Usually this means placing the module into smart-idle mode and 1363 * smart-standby, but if there is a bug in the automatic idle handling 1364 * for the IP block, it may need to be placed into the force-idle or 1365 * no-idle variants of these modes. No return value. 1366 */ 1367 static void _enable_sysc(struct omap_hwmod *oh) 1368 { 1369 u8 idlemode, sf; 1370 u32 v; 1371 bool clkdm_act; 1372 struct clockdomain *clkdm; 1373 1374 if (!oh->class->sysc) 1375 return; 1376 1377 /* 1378 * Wait until reset has completed, this is needed as the IP 1379 * block is reset automatically by hardware in some cases 1380 * (off-mode for example), and the drivers require the 1381 * IP to be ready when they access it 1382 */ 1383 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1384 _enable_optional_clocks(oh); 1385 _wait_softreset_complete(oh); 1386 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1387 _disable_optional_clocks(oh); 1388 1389 v = oh->_sysc_cache; 1390 sf = oh->class->sysc->sysc_flags; 1391 1392 clkdm = _get_clkdm(oh); 1393 if (sf & SYSC_HAS_SIDLEMODE) { 1394 if (oh->flags & HWMOD_SWSUP_SIDLE || 1395 oh->flags & HWMOD_SWSUP_SIDLE_ACT) { 1396 idlemode = HWMOD_IDLEMODE_NO; 1397 } else { 1398 if (sf & SYSC_HAS_ENAWAKEUP) 1399 _enable_wakeup(oh, &v); 1400 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 1401 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1402 else 1403 idlemode = HWMOD_IDLEMODE_SMART; 1404 } 1405 1406 /* 1407 * This is special handling for some IPs like 1408 * 32k sync timer. Force them to idle! 1409 */ 1410 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU); 1411 if (clkdm_act && !(oh->class->sysc->idlemodes & 1412 (SIDLE_SMART | SIDLE_SMART_WKUP))) 1413 idlemode = HWMOD_IDLEMODE_FORCE; 1414 1415 _set_slave_idlemode(oh, idlemode, &v); 1416 } 1417 1418 if (sf & SYSC_HAS_MIDLEMODE) { 1419 if (oh->flags & HWMOD_FORCE_MSTANDBY) { 1420 idlemode = HWMOD_IDLEMODE_FORCE; 1421 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { 1422 idlemode = HWMOD_IDLEMODE_NO; 1423 } else { 1424 if (sf & SYSC_HAS_ENAWAKEUP) 1425 _enable_wakeup(oh, &v); 1426 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 1427 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1428 else 1429 idlemode = HWMOD_IDLEMODE_SMART; 1430 } 1431 _set_master_standbymode(oh, idlemode, &v); 1432 } 1433 1434 /* 1435 * XXX The clock framework should handle this, by 1436 * calling into this code. But this must wait until the 1437 * clock structures are tagged with omap_hwmod entries 1438 */ 1439 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && 1440 (sf & SYSC_HAS_CLOCKACTIVITY)) 1441 _set_clockactivity(oh, oh->class->sysc->clockact, &v); 1442 1443 _write_sysconfig(v, oh); 1444 1445 /* 1446 * Set the autoidle bit only after setting the smartidle bit 1447 * Setting this will not have any impact on the other modules. 1448 */ 1449 if (sf & SYSC_HAS_AUTOIDLE) { 1450 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? 1451 0 : 1; 1452 _set_module_autoidle(oh, idlemode, &v); 1453 _write_sysconfig(v, oh); 1454 } 1455 } 1456 1457 /** 1458 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG 1459 * @oh: struct omap_hwmod * 1460 * 1461 * If module is marked as SWSUP_SIDLE, force the module into slave 1462 * idle; otherwise, configure it for smart-idle. If module is marked 1463 * as SWSUP_MSUSPEND, force the module into master standby; otherwise, 1464 * configure it for smart-standby. No return value. 1465 */ 1466 static void _idle_sysc(struct omap_hwmod *oh) 1467 { 1468 u8 idlemode, sf; 1469 u32 v; 1470 1471 if (!oh->class->sysc) 1472 return; 1473 1474 v = oh->_sysc_cache; 1475 sf = oh->class->sysc->sysc_flags; 1476 1477 if (sf & SYSC_HAS_SIDLEMODE) { 1478 if (oh->flags & HWMOD_SWSUP_SIDLE) { 1479 idlemode = HWMOD_IDLEMODE_FORCE; 1480 } else { 1481 if (sf & SYSC_HAS_ENAWAKEUP) 1482 _enable_wakeup(oh, &v); 1483 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 1484 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1485 else 1486 idlemode = HWMOD_IDLEMODE_SMART; 1487 } 1488 _set_slave_idlemode(oh, idlemode, &v); 1489 } 1490 1491 if (sf & SYSC_HAS_MIDLEMODE) { 1492 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || 1493 (oh->flags & HWMOD_FORCE_MSTANDBY)) { 1494 idlemode = HWMOD_IDLEMODE_FORCE; 1495 } else { 1496 if (sf & SYSC_HAS_ENAWAKEUP) 1497 _enable_wakeup(oh, &v); 1498 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 1499 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1500 else 1501 idlemode = HWMOD_IDLEMODE_SMART; 1502 } 1503 _set_master_standbymode(oh, idlemode, &v); 1504 } 1505 1506 /* If the cached value is the same as the new value, skip the write */ 1507 if (oh->_sysc_cache != v) 1508 _write_sysconfig(v, oh); 1509 } 1510 1511 /** 1512 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG 1513 * @oh: struct omap_hwmod * 1514 * 1515 * Force the module into slave idle and master suspend. No return 1516 * value. 1517 */ 1518 static void _shutdown_sysc(struct omap_hwmod *oh) 1519 { 1520 u32 v; 1521 u8 sf; 1522 1523 if (!oh->class->sysc) 1524 return; 1525 1526 v = oh->_sysc_cache; 1527 sf = oh->class->sysc->sysc_flags; 1528 1529 if (sf & SYSC_HAS_SIDLEMODE) 1530 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); 1531 1532 if (sf & SYSC_HAS_MIDLEMODE) 1533 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); 1534 1535 if (sf & SYSC_HAS_AUTOIDLE) 1536 _set_module_autoidle(oh, 1, &v); 1537 1538 _write_sysconfig(v, oh); 1539 } 1540 1541 /** 1542 * _lookup - find an omap_hwmod by name 1543 * @name: find an omap_hwmod by name 1544 * 1545 * Return a pointer to an omap_hwmod by name, or NULL if not found. 1546 */ 1547 static struct omap_hwmod *_lookup(const char *name) 1548 { 1549 struct omap_hwmod *oh, *temp_oh; 1550 1551 oh = NULL; 1552 1553 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 1554 if (!strcmp(name, temp_oh->name)) { 1555 oh = temp_oh; 1556 break; 1557 } 1558 } 1559 1560 return oh; 1561 } 1562 1563 /** 1564 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod 1565 * @oh: struct omap_hwmod * 1566 * 1567 * Convert a clockdomain name stored in a struct omap_hwmod into a 1568 * clockdomain pointer, and save it into the struct omap_hwmod. 1569 * Return -EINVAL if the clkdm_name lookup failed. 1570 */ 1571 static int _init_clkdm(struct omap_hwmod *oh) 1572 { 1573 if (!oh->clkdm_name) { 1574 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name); 1575 return 0; 1576 } 1577 1578 oh->clkdm = clkdm_lookup(oh->clkdm_name); 1579 if (!oh->clkdm) { 1580 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n", 1581 oh->name, oh->clkdm_name); 1582 return 0; 1583 } 1584 1585 pr_debug("omap_hwmod: %s: associated to clkdm %s\n", 1586 oh->name, oh->clkdm_name); 1587 1588 return 0; 1589 } 1590 1591 /** 1592 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as 1593 * well the clockdomain. 1594 * @oh: struct omap_hwmod * 1595 * @data: not used; pass NULL 1596 * 1597 * Called by omap_hwmod_setup_*() (after omap2_clk_init()). 1598 * Resolves all clock names embedded in the hwmod. Returns 0 on 1599 * success, or a negative error code on failure. 1600 */ 1601 static int _init_clocks(struct omap_hwmod *oh, void *data) 1602 { 1603 int ret = 0; 1604 1605 if (oh->_state != _HWMOD_STATE_REGISTERED) 1606 return 0; 1607 1608 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); 1609 1610 if (soc_ops.init_clkdm) 1611 ret |= soc_ops.init_clkdm(oh); 1612 1613 ret |= _init_main_clk(oh); 1614 ret |= _init_interface_clks(oh); 1615 ret |= _init_opt_clks(oh); 1616 1617 if (!ret) 1618 oh->_state = _HWMOD_STATE_CLKS_INITED; 1619 else 1620 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name); 1621 1622 return ret; 1623 } 1624 1625 /** 1626 * _lookup_hardreset - fill register bit info for this hwmod/reset line 1627 * @oh: struct omap_hwmod * 1628 * @name: name of the reset line in the context of this hwmod 1629 * @ohri: struct omap_hwmod_rst_info * that this function will fill in 1630 * 1631 * Return the bit position of the reset line that match the 1632 * input name. Return -ENOENT if not found. 1633 */ 1634 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, 1635 struct omap_hwmod_rst_info *ohri) 1636 { 1637 int i; 1638 1639 for (i = 0; i < oh->rst_lines_cnt; i++) { 1640 const char *rst_line = oh->rst_lines[i].name; 1641 if (!strcmp(rst_line, name)) { 1642 ohri->rst_shift = oh->rst_lines[i].rst_shift; 1643 ohri->st_shift = oh->rst_lines[i].st_shift; 1644 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", 1645 oh->name, __func__, rst_line, ohri->rst_shift, 1646 ohri->st_shift); 1647 1648 return 0; 1649 } 1650 } 1651 1652 return -ENOENT; 1653 } 1654 1655 /** 1656 * _assert_hardreset - assert the HW reset line of submodules 1657 * contained in the hwmod module. 1658 * @oh: struct omap_hwmod * 1659 * @name: name of the reset line to lookup and assert 1660 * 1661 * Some IP like dsp, ipu or iva contain processor that require an HW 1662 * reset line to be assert / deassert in order to enable fully the IP. 1663 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of 1664 * asserting the hardreset line on the currently-booted SoC, or passes 1665 * along the return value from _lookup_hardreset() or the SoC's 1666 * assert_hardreset code. 1667 */ 1668 static int _assert_hardreset(struct omap_hwmod *oh, const char *name) 1669 { 1670 struct omap_hwmod_rst_info ohri; 1671 int ret = -EINVAL; 1672 1673 if (!oh) 1674 return -EINVAL; 1675 1676 if (!soc_ops.assert_hardreset) 1677 return -ENOSYS; 1678 1679 ret = _lookup_hardreset(oh, name, &ohri); 1680 if (ret < 0) 1681 return ret; 1682 1683 ret = soc_ops.assert_hardreset(oh, &ohri); 1684 1685 return ret; 1686 } 1687 1688 /** 1689 * _deassert_hardreset - deassert the HW reset line of submodules contained 1690 * in the hwmod module. 1691 * @oh: struct omap_hwmod * 1692 * @name: name of the reset line to look up and deassert 1693 * 1694 * Some IP like dsp, ipu or iva contain processor that require an HW 1695 * reset line to be assert / deassert in order to enable fully the IP. 1696 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of 1697 * deasserting the hardreset line on the currently-booted SoC, or passes 1698 * along the return value from _lookup_hardreset() or the SoC's 1699 * deassert_hardreset code. 1700 */ 1701 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) 1702 { 1703 struct omap_hwmod_rst_info ohri; 1704 int ret = -EINVAL; 1705 1706 if (!oh) 1707 return -EINVAL; 1708 1709 if (!soc_ops.deassert_hardreset) 1710 return -ENOSYS; 1711 1712 ret = _lookup_hardreset(oh, name, &ohri); 1713 if (ret < 0) 1714 return ret; 1715 1716 if (oh->clkdm) { 1717 /* 1718 * A clockdomain must be in SW_SUP otherwise reset 1719 * might not be completed. The clockdomain can be set 1720 * in HW_AUTO only when the module become ready. 1721 */ 1722 clkdm_deny_idle(oh->clkdm); 1723 ret = clkdm_hwmod_enable(oh->clkdm, oh); 1724 if (ret) { 1725 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", 1726 oh->name, oh->clkdm->name, ret); 1727 return ret; 1728 } 1729 } 1730 1731 _enable_clocks(oh); 1732 if (soc_ops.enable_module) 1733 soc_ops.enable_module(oh); 1734 1735 ret = soc_ops.deassert_hardreset(oh, &ohri); 1736 1737 if (soc_ops.disable_module) 1738 soc_ops.disable_module(oh); 1739 _disable_clocks(oh); 1740 1741 if (ret == -EBUSY) 1742 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); 1743 1744 if (oh->clkdm) { 1745 /* 1746 * Set the clockdomain to HW_AUTO, assuming that the 1747 * previous state was HW_AUTO. 1748 */ 1749 clkdm_allow_idle(oh->clkdm); 1750 1751 clkdm_hwmod_disable(oh->clkdm, oh); 1752 } 1753 1754 return ret; 1755 } 1756 1757 /** 1758 * _read_hardreset - read the HW reset line state of submodules 1759 * contained in the hwmod module 1760 * @oh: struct omap_hwmod * 1761 * @name: name of the reset line to look up and read 1762 * 1763 * Return the state of the reset line. Returns -EINVAL if @oh is 1764 * null, -ENOSYS if we have no way of reading the hardreset line 1765 * status on the currently-booted SoC, or passes along the return 1766 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted 1767 * code. 1768 */ 1769 static int _read_hardreset(struct omap_hwmod *oh, const char *name) 1770 { 1771 struct omap_hwmod_rst_info ohri; 1772 int ret = -EINVAL; 1773 1774 if (!oh) 1775 return -EINVAL; 1776 1777 if (!soc_ops.is_hardreset_asserted) 1778 return -ENOSYS; 1779 1780 ret = _lookup_hardreset(oh, name, &ohri); 1781 if (ret < 0) 1782 return ret; 1783 1784 return soc_ops.is_hardreset_asserted(oh, &ohri); 1785 } 1786 1787 /** 1788 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset 1789 * @oh: struct omap_hwmod * 1790 * 1791 * If all hardreset lines associated with @oh are asserted, then return true. 1792 * Otherwise, if part of @oh is out hardreset or if no hardreset lines 1793 * associated with @oh are asserted, then return false. 1794 * This function is used to avoid executing some parts of the IP block 1795 * enable/disable sequence if its hardreset line is set. 1796 */ 1797 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) 1798 { 1799 int i, rst_cnt = 0; 1800 1801 if (oh->rst_lines_cnt == 0) 1802 return false; 1803 1804 for (i = 0; i < oh->rst_lines_cnt; i++) 1805 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) 1806 rst_cnt++; 1807 1808 if (oh->rst_lines_cnt == rst_cnt) 1809 return true; 1810 1811 return false; 1812 } 1813 1814 /** 1815 * _are_any_hardreset_lines_asserted - return true if any part of @oh is 1816 * hard-reset 1817 * @oh: struct omap_hwmod * 1818 * 1819 * If any hardreset lines associated with @oh are asserted, then 1820 * return true. Otherwise, if no hardreset lines associated with @oh 1821 * are asserted, or if @oh has no hardreset lines, then return false. 1822 * This function is used to avoid executing some parts of the IP block 1823 * enable/disable sequence if any hardreset line is set. 1824 */ 1825 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh) 1826 { 1827 int rst_cnt = 0; 1828 int i; 1829 1830 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++) 1831 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) 1832 rst_cnt++; 1833 1834 return (rst_cnt) ? true : false; 1835 } 1836 1837 /** 1838 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 1839 * @oh: struct omap_hwmod * 1840 * 1841 * Disable the PRCM module mode related to the hwmod @oh. 1842 * Return EINVAL if the modulemode is not supported and 0 in case of success. 1843 */ 1844 static int _omap4_disable_module(struct omap_hwmod *oh) 1845 { 1846 int v; 1847 1848 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 1849 return -EINVAL; 1850 1851 /* 1852 * Since integration code might still be doing something, only 1853 * disable if all lines are under hardreset. 1854 */ 1855 if (_are_any_hardreset_lines_asserted(oh)) 1856 return 0; 1857 1858 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); 1859 1860 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst, 1861 oh->prcm.omap4.clkctrl_offs); 1862 1863 v = _omap4_wait_target_disable(oh); 1864 if (v) 1865 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", 1866 oh->name); 1867 1868 return 0; 1869 } 1870 1871 /** 1872 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit 1873 * @oh: struct omap_hwmod * 1874 * 1875 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be 1876 * enabled for this to work. Returns -ENOENT if the hwmod cannot be 1877 * reset this way, -EINVAL if the hwmod is in the wrong state, 1878 * -ETIMEDOUT if the module did not reset in time, or 0 upon success. 1879 * 1880 * In OMAP3 a specific SYSSTATUS register is used to get the reset status. 1881 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead 1882 * use the SYSCONFIG softreset bit to provide the status. 1883 * 1884 * Note that some IP like McBSP do have reset control but don't have 1885 * reset status. 1886 */ 1887 static int _ocp_softreset(struct omap_hwmod *oh) 1888 { 1889 u32 v; 1890 int c = 0; 1891 int ret = 0; 1892 1893 if (!oh->class->sysc || 1894 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 1895 return -ENOENT; 1896 1897 /* clocks must be on for this operation */ 1898 if (oh->_state != _HWMOD_STATE_ENABLED) { 1899 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", 1900 oh->name); 1901 return -EINVAL; 1902 } 1903 1904 /* For some modules, all optionnal clocks need to be enabled as well */ 1905 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1906 _enable_optional_clocks(oh); 1907 1908 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name); 1909 1910 v = oh->_sysc_cache; 1911 ret = _set_softreset(oh, &v); 1912 if (ret) 1913 goto dis_opt_clks; 1914 1915 _write_sysconfig(v, oh); 1916 1917 if (oh->class->sysc->srst_udelay) 1918 udelay(oh->class->sysc->srst_udelay); 1919 1920 c = _wait_softreset_complete(oh); 1921 if (c == MAX_MODULE_SOFTRESET_WAIT) { 1922 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1923 oh->name, MAX_MODULE_SOFTRESET_WAIT); 1924 ret = -ETIMEDOUT; 1925 goto dis_opt_clks; 1926 } else { 1927 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); 1928 } 1929 1930 ret = _clear_softreset(oh, &v); 1931 if (ret) 1932 goto dis_opt_clks; 1933 1934 _write_sysconfig(v, oh); 1935 1936 /* 1937 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from 1938 * _wait_target_ready() or _reset() 1939 */ 1940 1941 dis_opt_clks: 1942 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1943 _disable_optional_clocks(oh); 1944 1945 return ret; 1946 } 1947 1948 /** 1949 * _reset - reset an omap_hwmod 1950 * @oh: struct omap_hwmod * 1951 * 1952 * Resets an omap_hwmod @oh. If the module has a custom reset 1953 * function pointer defined, then call it to reset the IP block, and 1954 * pass along its return value to the caller. Otherwise, if the IP 1955 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield 1956 * associated with it, call a function to reset the IP block via that 1957 * method, and pass along the return value to the caller. Finally, if 1958 * the IP block has some hardreset lines associated with it, assert 1959 * all of those, but do _not_ deassert them. (This is because driver 1960 * authors have expressed an apparent requirement to control the 1961 * deassertion of the hardreset lines themselves.) 1962 * 1963 * The default software reset mechanism for most OMAP IP blocks is 1964 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some 1965 * hwmods cannot be reset via this method. Some are not targets and 1966 * therefore have no OCP header registers to access. Others (like the 1967 * IVA) have idiosyncratic reset sequences. So for these relatively 1968 * rare cases, custom reset code can be supplied in the struct 1969 * omap_hwmod_class .reset function pointer. 1970 * 1971 * _set_dmadisable() is called to set the DMADISABLE bit so that it 1972 * does not prevent idling of the system. This is necessary for cases 1973 * where ROMCODE/BOOTLOADER uses dma and transfers control to the 1974 * kernel without disabling dma. 1975 * 1976 * Passes along the return value from either _ocp_softreset() or the 1977 * custom reset function - these must return -EINVAL if the hwmod 1978 * cannot be reset this way or if the hwmod is in the wrong state, 1979 * -ETIMEDOUT if the module did not reset in time, or 0 upon success. 1980 */ 1981 static int _reset(struct omap_hwmod *oh) 1982 { 1983 int i, r; 1984 1985 pr_debug("omap_hwmod: %s: resetting\n", oh->name); 1986 1987 if (oh->class->reset) { 1988 r = oh->class->reset(oh); 1989 } else { 1990 if (oh->rst_lines_cnt > 0) { 1991 for (i = 0; i < oh->rst_lines_cnt; i++) 1992 _assert_hardreset(oh, oh->rst_lines[i].name); 1993 return 0; 1994 } else { 1995 r = _ocp_softreset(oh); 1996 if (r == -ENOENT) 1997 r = 0; 1998 } 1999 } 2000 2001 _set_dmadisable(oh); 2002 2003 /* 2004 * OCP_SYSCONFIG bits need to be reprogrammed after a 2005 * softreset. The _enable() function should be split to avoid 2006 * the rewrite of the OCP_SYSCONFIG register. 2007 */ 2008 if (oh->class->sysc) { 2009 _update_sysc_cache(oh); 2010 _enable_sysc(oh); 2011 } 2012 2013 return r; 2014 } 2015 2016 /** 2017 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain 2018 * 2019 * Call the appropriate PRM function to clear any logged I/O chain 2020 * wakeups and to reconfigure the chain. This apparently needs to be 2021 * done upon every mux change. Since hwmods can be concurrently 2022 * enabled and idled, hold a spinlock around the I/O chain 2023 * reconfiguration sequence. No return value. 2024 * 2025 * XXX When the PRM code is moved to drivers, this function can be removed, 2026 * as the PRM infrastructure should abstract this. 2027 */ 2028 static void _reconfigure_io_chain(void) 2029 { 2030 unsigned long flags; 2031 2032 spin_lock_irqsave(&io_chain_lock, flags); 2033 2034 omap_prm_reconfigure_io_chain(); 2035 2036 spin_unlock_irqrestore(&io_chain_lock, flags); 2037 } 2038 2039 /** 2040 * _omap4_update_context_lost - increment hwmod context loss counter if 2041 * hwmod context was lost, and clear hardware context loss reg 2042 * @oh: hwmod to check for context loss 2043 * 2044 * If the PRCM indicates that the hwmod @oh lost context, increment 2045 * our in-memory context loss counter, and clear the RM_*_CONTEXT 2046 * bits. No return value. 2047 */ 2048 static void _omap4_update_context_lost(struct omap_hwmod *oh) 2049 { 2050 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT) 2051 return; 2052 2053 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition, 2054 oh->clkdm->pwrdm.ptr->prcm_offs, 2055 oh->prcm.omap4.context_offs)) 2056 return; 2057 2058 oh->prcm.omap4.context_lost_counter++; 2059 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition, 2060 oh->clkdm->pwrdm.ptr->prcm_offs, 2061 oh->prcm.omap4.context_offs); 2062 } 2063 2064 /** 2065 * _omap4_get_context_lost - get context loss counter for a hwmod 2066 * @oh: hwmod to get context loss counter for 2067 * 2068 * Returns the in-memory context loss counter for a hwmod. 2069 */ 2070 static int _omap4_get_context_lost(struct omap_hwmod *oh) 2071 { 2072 return oh->prcm.omap4.context_lost_counter; 2073 } 2074 2075 /** 2076 * _enable_preprogram - Pre-program an IP block during the _enable() process 2077 * @oh: struct omap_hwmod * 2078 * 2079 * Some IP blocks (such as AESS) require some additional programming 2080 * after enable before they can enter idle. If a function pointer to 2081 * do so is present in the hwmod data, then call it and pass along the 2082 * return value; otherwise, return 0. 2083 */ 2084 static int _enable_preprogram(struct omap_hwmod *oh) 2085 { 2086 if (!oh->class->enable_preprogram) 2087 return 0; 2088 2089 return oh->class->enable_preprogram(oh); 2090 } 2091 2092 /** 2093 * _enable - enable an omap_hwmod 2094 * @oh: struct omap_hwmod * 2095 * 2096 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's 2097 * register target. Returns -EINVAL if the hwmod is in the wrong 2098 * state or passes along the return value of _wait_target_ready(). 2099 */ 2100 static int _enable(struct omap_hwmod *oh) 2101 { 2102 int r; 2103 2104 pr_debug("omap_hwmod: %s: enabling\n", oh->name); 2105 2106 /* 2107 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled 2108 * state at init. Now that someone is really trying to enable 2109 * them, just ensure that the hwmod mux is set. 2110 */ 2111 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { 2112 /* 2113 * If the caller has mux data populated, do the mux'ing 2114 * which wouldn't have been done as part of the _enable() 2115 * done during setup. 2116 */ 2117 if (oh->mux) 2118 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2119 2120 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; 2121 return 0; 2122 } 2123 2124 if (oh->_state != _HWMOD_STATE_INITIALIZED && 2125 oh->_state != _HWMOD_STATE_IDLE && 2126 oh->_state != _HWMOD_STATE_DISABLED) { 2127 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", 2128 oh->name); 2129 return -EINVAL; 2130 } 2131 2132 /* 2133 * If an IP block contains HW reset lines and all of them are 2134 * asserted, we let integration code associated with that 2135 * block handle the enable. We've received very little 2136 * information on what those driver authors need, and until 2137 * detailed information is provided and the driver code is 2138 * posted to the public lists, this is probably the best we 2139 * can do. 2140 */ 2141 if (_are_all_hardreset_lines_asserted(oh)) 2142 return 0; 2143 2144 /* Mux pins for device runtime if populated */ 2145 if (oh->mux && (!oh->mux->enabled || 2146 ((oh->_state == _HWMOD_STATE_IDLE) && 2147 oh->mux->pads_dynamic))) { 2148 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2149 _reconfigure_io_chain(); 2150 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { 2151 _reconfigure_io_chain(); 2152 } 2153 2154 _add_initiator_dep(oh, mpu_oh); 2155 2156 if (oh->clkdm) { 2157 /* 2158 * A clockdomain must be in SW_SUP before enabling 2159 * completely the module. The clockdomain can be set 2160 * in HW_AUTO only when the module become ready. 2161 */ 2162 clkdm_deny_idle(oh->clkdm); 2163 r = clkdm_hwmod_enable(oh->clkdm, oh); 2164 if (r) { 2165 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", 2166 oh->name, oh->clkdm->name, r); 2167 return r; 2168 } 2169 } 2170 2171 _enable_clocks(oh); 2172 if (soc_ops.enable_module) 2173 soc_ops.enable_module(oh); 2174 if (oh->flags & HWMOD_BLOCK_WFI) 2175 cpu_idle_poll_ctrl(true); 2176 2177 if (soc_ops.update_context_lost) 2178 soc_ops.update_context_lost(oh); 2179 2180 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : 2181 -EINVAL; 2182 if (oh->clkdm) 2183 clkdm_allow_idle(oh->clkdm); 2184 2185 if (!r) { 2186 oh->_state = _HWMOD_STATE_ENABLED; 2187 2188 /* Access the sysconfig only if the target is ready */ 2189 if (oh->class->sysc) { 2190 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) 2191 _update_sysc_cache(oh); 2192 _enable_sysc(oh); 2193 } 2194 r = _enable_preprogram(oh); 2195 } else { 2196 if (soc_ops.disable_module) 2197 soc_ops.disable_module(oh); 2198 _disable_clocks(oh); 2199 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n", 2200 oh->name, r); 2201 2202 if (oh->clkdm) 2203 clkdm_hwmod_disable(oh->clkdm, oh); 2204 } 2205 2206 return r; 2207 } 2208 2209 /** 2210 * _idle - idle an omap_hwmod 2211 * @oh: struct omap_hwmod * 2212 * 2213 * Idles an omap_hwmod @oh. This should be called once the hwmod has 2214 * no further work. Returns -EINVAL if the hwmod is in the wrong 2215 * state or returns 0. 2216 */ 2217 static int _idle(struct omap_hwmod *oh) 2218 { 2219 if (oh->flags & HWMOD_NO_IDLE) { 2220 oh->_int_flags |= _HWMOD_SKIP_ENABLE; 2221 return 0; 2222 } 2223 2224 pr_debug("omap_hwmod: %s: idling\n", oh->name); 2225 2226 if (_are_all_hardreset_lines_asserted(oh)) 2227 return 0; 2228 2229 if (oh->_state != _HWMOD_STATE_ENABLED) { 2230 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", 2231 oh->name); 2232 return -EINVAL; 2233 } 2234 2235 if (oh->class->sysc) 2236 _idle_sysc(oh); 2237 _del_initiator_dep(oh, mpu_oh); 2238 2239 if (oh->clkdm) 2240 clkdm_deny_idle(oh->clkdm); 2241 2242 if (oh->flags & HWMOD_BLOCK_WFI) 2243 cpu_idle_poll_ctrl(false); 2244 if (soc_ops.disable_module) 2245 soc_ops.disable_module(oh); 2246 2247 /* 2248 * The module must be in idle mode before disabling any parents 2249 * clocks. Otherwise, the parent clock might be disabled before 2250 * the module transition is done, and thus will prevent the 2251 * transition to complete properly. 2252 */ 2253 _disable_clocks(oh); 2254 if (oh->clkdm) { 2255 clkdm_allow_idle(oh->clkdm); 2256 clkdm_hwmod_disable(oh->clkdm, oh); 2257 } 2258 2259 /* Mux pins for device idle if populated */ 2260 if (oh->mux && oh->mux->pads_dynamic) { 2261 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 2262 _reconfigure_io_chain(); 2263 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { 2264 _reconfigure_io_chain(); 2265 } 2266 2267 oh->_state = _HWMOD_STATE_IDLE; 2268 2269 return 0; 2270 } 2271 2272 /** 2273 * _shutdown - shutdown an omap_hwmod 2274 * @oh: struct omap_hwmod * 2275 * 2276 * Shut down an omap_hwmod @oh. This should be called when the driver 2277 * used for the hwmod is removed or unloaded or if the driver is not 2278 * used by the system. Returns -EINVAL if the hwmod is in the wrong 2279 * state or returns 0. 2280 */ 2281 static int _shutdown(struct omap_hwmod *oh) 2282 { 2283 int ret, i; 2284 u8 prev_state; 2285 2286 if (_are_all_hardreset_lines_asserted(oh)) 2287 return 0; 2288 2289 if (oh->_state != _HWMOD_STATE_IDLE && 2290 oh->_state != _HWMOD_STATE_ENABLED) { 2291 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", 2292 oh->name); 2293 return -EINVAL; 2294 } 2295 2296 pr_debug("omap_hwmod: %s: disabling\n", oh->name); 2297 2298 if (oh->class->pre_shutdown) { 2299 prev_state = oh->_state; 2300 if (oh->_state == _HWMOD_STATE_IDLE) 2301 _enable(oh); 2302 ret = oh->class->pre_shutdown(oh); 2303 if (ret) { 2304 if (prev_state == _HWMOD_STATE_IDLE) 2305 _idle(oh); 2306 return ret; 2307 } 2308 } 2309 2310 if (oh->class->sysc) { 2311 if (oh->_state == _HWMOD_STATE_IDLE) 2312 _enable(oh); 2313 _shutdown_sysc(oh); 2314 } 2315 2316 /* clocks and deps are already disabled in idle */ 2317 if (oh->_state == _HWMOD_STATE_ENABLED) { 2318 _del_initiator_dep(oh, mpu_oh); 2319 /* XXX what about the other system initiators here? dma, dsp */ 2320 if (oh->flags & HWMOD_BLOCK_WFI) 2321 cpu_idle_poll_ctrl(false); 2322 if (soc_ops.disable_module) 2323 soc_ops.disable_module(oh); 2324 _disable_clocks(oh); 2325 if (oh->clkdm) 2326 clkdm_hwmod_disable(oh->clkdm, oh); 2327 } 2328 /* XXX Should this code also force-disable the optional clocks? */ 2329 2330 for (i = 0; i < oh->rst_lines_cnt; i++) 2331 _assert_hardreset(oh, oh->rst_lines[i].name); 2332 2333 /* Mux pins to safe mode or use populated off mode values */ 2334 if (oh->mux) 2335 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); 2336 2337 oh->_state = _HWMOD_STATE_DISABLED; 2338 2339 return 0; 2340 } 2341 2342 static int of_dev_find_hwmod(struct device_node *np, 2343 struct omap_hwmod *oh) 2344 { 2345 int count, i, res; 2346 const char *p; 2347 2348 count = of_property_count_strings(np, "ti,hwmods"); 2349 if (count < 1) 2350 return -ENODEV; 2351 2352 for (i = 0; i < count; i++) { 2353 res = of_property_read_string_index(np, "ti,hwmods", 2354 i, &p); 2355 if (res) 2356 continue; 2357 if (!strcmp(p, oh->name)) { 2358 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n", 2359 np->name, i, oh->name); 2360 return i; 2361 } 2362 } 2363 2364 return -ENODEV; 2365 } 2366 2367 /** 2368 * of_dev_hwmod_lookup - look up needed hwmod from dt blob 2369 * @np: struct device_node * 2370 * @oh: struct omap_hwmod * 2371 * @index: index of the entry found 2372 * @found: struct device_node * found or NULL 2373 * 2374 * Parse the dt blob and find out needed hwmod. Recursive function is 2375 * implemented to take care hierarchical dt blob parsing. 2376 * Return: Returns 0 on success, -ENODEV when not found. 2377 */ 2378 static int of_dev_hwmod_lookup(struct device_node *np, 2379 struct omap_hwmod *oh, 2380 int *index, 2381 struct device_node **found) 2382 { 2383 struct device_node *np0 = NULL; 2384 int res; 2385 2386 res = of_dev_find_hwmod(np, oh); 2387 if (res >= 0) { 2388 *found = np; 2389 *index = res; 2390 return 0; 2391 } 2392 2393 for_each_child_of_node(np, np0) { 2394 struct device_node *fc; 2395 int i; 2396 2397 res = of_dev_hwmod_lookup(np0, oh, &i, &fc); 2398 if (res == 0) { 2399 *found = fc; 2400 *index = i; 2401 return 0; 2402 } 2403 } 2404 2405 *found = NULL; 2406 *index = 0; 2407 2408 return -ENODEV; 2409 } 2410 2411 /** 2412 * _init_mpu_rt_base - populate the virtual address for a hwmod 2413 * @oh: struct omap_hwmod * to locate the virtual address 2414 * @data: (unused, caller should pass NULL) 2415 * @index: index of the reg entry iospace in device tree 2416 * @np: struct device_node * of the IP block's device node in the DT data 2417 * 2418 * Cache the virtual address used by the MPU to access this IP block's 2419 * registers. This address is needed early so the OCP registers that 2420 * are part of the device's address space can be ioremapped properly. 2421 * 2422 * If SYSC access is not needed, the registers will not be remapped 2423 * and non-availability of MPU access is not treated as an error. 2424 * 2425 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and 2426 * -ENXIO on absent or invalid register target address space. 2427 */ 2428 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, 2429 int index, struct device_node *np) 2430 { 2431 struct omap_hwmod_addr_space *mem; 2432 void __iomem *va_start = NULL; 2433 2434 if (!oh) 2435 return -EINVAL; 2436 2437 _save_mpu_port_index(oh); 2438 2439 /* if we don't need sysc access we don't need to ioremap */ 2440 if (!oh->class->sysc) 2441 return 0; 2442 2443 /* we can't continue without MPU PORT if we need sysc access */ 2444 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 2445 return -ENXIO; 2446 2447 mem = _find_mpu_rt_addr_space(oh); 2448 if (!mem) { 2449 pr_debug("omap_hwmod: %s: no MPU register target found\n", 2450 oh->name); 2451 2452 /* Extract the IO space from device tree blob */ 2453 if (!np) { 2454 pr_err("omap_hwmod: %s: no dt node\n", oh->name); 2455 return -ENXIO; 2456 } 2457 2458 va_start = of_iomap(np, index + oh->mpu_rt_idx); 2459 } else { 2460 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); 2461 } 2462 2463 if (!va_start) { 2464 if (mem) 2465 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); 2466 else 2467 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n", 2468 oh->name, index, np->full_name); 2469 return -ENXIO; 2470 } 2471 2472 pr_debug("omap_hwmod: %s: MPU register target at va %p\n", 2473 oh->name, va_start); 2474 2475 oh->_mpu_rt_va = va_start; 2476 return 0; 2477 } 2478 2479 /** 2480 * _init - initialize internal data for the hwmod @oh 2481 * @oh: struct omap_hwmod * 2482 * @n: (unused) 2483 * 2484 * Look up the clocks and the address space used by the MPU to access 2485 * registers belonging to the hwmod @oh. @oh must already be 2486 * registered at this point. This is the first of two phases for 2487 * hwmod initialization. Code called here does not touch any hardware 2488 * registers, it simply prepares internal data structures. Returns 0 2489 * upon success or if the hwmod isn't registered or if the hwmod's 2490 * address space is not defined, or -EINVAL upon failure. 2491 */ 2492 static int __init _init(struct omap_hwmod *oh, void *data) 2493 { 2494 int r, index; 2495 struct device_node *np = NULL; 2496 2497 if (oh->_state != _HWMOD_STATE_REGISTERED) 2498 return 0; 2499 2500 if (of_have_populated_dt()) { 2501 struct device_node *bus; 2502 2503 bus = of_find_node_by_name(NULL, "ocp"); 2504 if (!bus) 2505 return -ENODEV; 2506 2507 r = of_dev_hwmod_lookup(bus, oh, &index, &np); 2508 if (r) 2509 pr_debug("omap_hwmod: %s missing dt data\n", oh->name); 2510 else if (np && index) 2511 pr_warn("omap_hwmod: %s using broken dt data from %s\n", 2512 oh->name, np->name); 2513 } 2514 2515 r = _init_mpu_rt_base(oh, NULL, index, np); 2516 if (r < 0) { 2517 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", 2518 oh->name); 2519 return 0; 2520 } 2521 2522 r = _init_clocks(oh, NULL); 2523 if (r < 0) { 2524 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name); 2525 return -EINVAL; 2526 } 2527 2528 if (np) { 2529 if (of_find_property(np, "ti,no-reset-on-init", NULL)) 2530 oh->flags |= HWMOD_INIT_NO_RESET; 2531 if (of_find_property(np, "ti,no-idle-on-init", NULL)) 2532 oh->flags |= HWMOD_INIT_NO_IDLE; 2533 if (of_find_property(np, "ti,no-idle", NULL)) 2534 oh->flags |= HWMOD_NO_IDLE; 2535 } 2536 2537 oh->_state = _HWMOD_STATE_INITIALIZED; 2538 2539 return 0; 2540 } 2541 2542 /** 2543 * _setup_iclk_autoidle - configure an IP block's interface clocks 2544 * @oh: struct omap_hwmod * 2545 * 2546 * Set up the module's interface clocks. XXX This function is still mostly 2547 * a stub; implementing this properly requires iclk autoidle usecounting in 2548 * the clock code. No return value. 2549 */ 2550 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh) 2551 { 2552 struct omap_hwmod_ocp_if *os; 2553 struct list_head *p; 2554 int i = 0; 2555 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2556 return; 2557 2558 p = oh->slave_ports.next; 2559 2560 while (i < oh->slaves_cnt) { 2561 os = _fetch_next_ocp_if(&p, &i); 2562 if (!os->_clk) 2563 continue; 2564 2565 if (os->flags & OCPIF_SWSUP_IDLE) { 2566 /* XXX omap_iclk_deny_idle(c); */ 2567 } else { 2568 /* XXX omap_iclk_allow_idle(c); */ 2569 clk_enable(os->_clk); 2570 } 2571 } 2572 2573 return; 2574 } 2575 2576 /** 2577 * _setup_reset - reset an IP block during the setup process 2578 * @oh: struct omap_hwmod * 2579 * 2580 * Reset the IP block corresponding to the hwmod @oh during the setup 2581 * process. The IP block is first enabled so it can be successfully 2582 * reset. Returns 0 upon success or a negative error code upon 2583 * failure. 2584 */ 2585 static int __init _setup_reset(struct omap_hwmod *oh) 2586 { 2587 int r; 2588 2589 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2590 return -EINVAL; 2591 2592 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) 2593 return -EPERM; 2594 2595 if (oh->rst_lines_cnt == 0) { 2596 r = _enable(oh); 2597 if (r) { 2598 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n", 2599 oh->name, oh->_state); 2600 return -EINVAL; 2601 } 2602 } 2603 2604 if (!(oh->flags & HWMOD_INIT_NO_RESET)) 2605 r = _reset(oh); 2606 2607 return r; 2608 } 2609 2610 /** 2611 * _setup_postsetup - transition to the appropriate state after _setup 2612 * @oh: struct omap_hwmod * 2613 * 2614 * Place an IP block represented by @oh into a "post-setup" state -- 2615 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that 2616 * this function is called at the end of _setup().) The postsetup 2617 * state for an IP block can be changed by calling 2618 * omap_hwmod_enter_postsetup_state() early in the boot process, 2619 * before one of the omap_hwmod_setup*() functions are called for the 2620 * IP block. 2621 * 2622 * The IP block stays in this state until a PM runtime-based driver is 2623 * loaded for that IP block. A post-setup state of IDLE is 2624 * appropriate for almost all IP blocks with runtime PM-enabled 2625 * drivers, since those drivers are able to enable the IP block. A 2626 * post-setup state of ENABLED is appropriate for kernels with PM 2627 * runtime disabled. The DISABLED state is appropriate for unusual IP 2628 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers 2629 * included, since the WDTIMER starts running on reset and will reset 2630 * the MPU if left active. 2631 * 2632 * This post-setup mechanism is deprecated. Once all of the OMAP 2633 * drivers have been converted to use PM runtime, and all of the IP 2634 * block data and interconnect data is available to the hwmod code, it 2635 * should be possible to replace this mechanism with a "lazy reset" 2636 * arrangement. In a "lazy reset" setup, each IP block is enabled 2637 * when the driver first probes, then all remaining IP blocks without 2638 * drivers are either shut down or enabled after the drivers have 2639 * loaded. However, this cannot take place until the above 2640 * preconditions have been met, since otherwise the late reset code 2641 * has no way of knowing which IP blocks are in use by drivers, and 2642 * which ones are unused. 2643 * 2644 * No return value. 2645 */ 2646 static void __init _setup_postsetup(struct omap_hwmod *oh) 2647 { 2648 u8 postsetup_state; 2649 2650 if (oh->rst_lines_cnt > 0) 2651 return; 2652 2653 postsetup_state = oh->_postsetup_state; 2654 if (postsetup_state == _HWMOD_STATE_UNKNOWN) 2655 postsetup_state = _HWMOD_STATE_ENABLED; 2656 2657 /* 2658 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data - 2659 * it should be set by the core code as a runtime flag during startup 2660 */ 2661 if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) && 2662 (postsetup_state == _HWMOD_STATE_IDLE)) { 2663 oh->_int_flags |= _HWMOD_SKIP_ENABLE; 2664 postsetup_state = _HWMOD_STATE_ENABLED; 2665 } 2666 2667 if (postsetup_state == _HWMOD_STATE_IDLE) 2668 _idle(oh); 2669 else if (postsetup_state == _HWMOD_STATE_DISABLED) 2670 _shutdown(oh); 2671 else if (postsetup_state != _HWMOD_STATE_ENABLED) 2672 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", 2673 oh->name, postsetup_state); 2674 2675 return; 2676 } 2677 2678 /** 2679 * _setup - prepare IP block hardware for use 2680 * @oh: struct omap_hwmod * 2681 * @n: (unused, pass NULL) 2682 * 2683 * Configure the IP block represented by @oh. This may include 2684 * enabling the IP block, resetting it, and placing it into a 2685 * post-setup state, depending on the type of IP block and applicable 2686 * flags. IP blocks are reset to prevent any previous configuration 2687 * by the bootloader or previous operating system from interfering 2688 * with power management or other parts of the system. The reset can 2689 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of 2690 * two phases for hwmod initialization. Code called here generally 2691 * affects the IP block hardware, or system integration hardware 2692 * associated with the IP block. Returns 0. 2693 */ 2694 static int __init _setup(struct omap_hwmod *oh, void *data) 2695 { 2696 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2697 return 0; 2698 2699 if (oh->parent_hwmod) { 2700 int r; 2701 2702 r = _enable(oh->parent_hwmod); 2703 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n", 2704 oh->name, oh->parent_hwmod->name); 2705 } 2706 2707 _setup_iclk_autoidle(oh); 2708 2709 if (!_setup_reset(oh)) 2710 _setup_postsetup(oh); 2711 2712 if (oh->parent_hwmod) { 2713 u8 postsetup_state; 2714 2715 postsetup_state = oh->parent_hwmod->_postsetup_state; 2716 2717 if (postsetup_state == _HWMOD_STATE_IDLE) 2718 _idle(oh->parent_hwmod); 2719 else if (postsetup_state == _HWMOD_STATE_DISABLED) 2720 _shutdown(oh->parent_hwmod); 2721 else if (postsetup_state != _HWMOD_STATE_ENABLED) 2722 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", 2723 oh->parent_hwmod->name, postsetup_state); 2724 } 2725 2726 return 0; 2727 } 2728 2729 /** 2730 * _register - register a struct omap_hwmod 2731 * @oh: struct omap_hwmod * 2732 * 2733 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod 2734 * already has been registered by the same name; -EINVAL if the 2735 * omap_hwmod is in the wrong state, if @oh is NULL, if the 2736 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a 2737 * name, or if the omap_hwmod's class is missing a name; or 0 upon 2738 * success. 2739 * 2740 * XXX The data should be copied into bootmem, so the original data 2741 * should be marked __initdata and freed after init. This would allow 2742 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note 2743 * that the copy process would be relatively complex due to the large number 2744 * of substructures. 2745 */ 2746 static int __init _register(struct omap_hwmod *oh) 2747 { 2748 if (!oh || !oh->name || !oh->class || !oh->class->name || 2749 (oh->_state != _HWMOD_STATE_UNKNOWN)) 2750 return -EINVAL; 2751 2752 pr_debug("omap_hwmod: %s: registering\n", oh->name); 2753 2754 if (_lookup(oh->name)) 2755 return -EEXIST; 2756 2757 list_add_tail(&oh->node, &omap_hwmod_list); 2758 2759 INIT_LIST_HEAD(&oh->master_ports); 2760 INIT_LIST_HEAD(&oh->slave_ports); 2761 spin_lock_init(&oh->_lock); 2762 lockdep_set_class(&oh->_lock, &oh->hwmod_key); 2763 2764 oh->_state = _HWMOD_STATE_REGISTERED; 2765 2766 /* 2767 * XXX Rather than doing a strcmp(), this should test a flag 2768 * set in the hwmod data, inserted by the autogenerator code. 2769 */ 2770 if (!strcmp(oh->name, MPU_INITIATOR_NAME)) 2771 mpu_oh = oh; 2772 2773 return 0; 2774 } 2775 2776 /** 2777 * _alloc_links - return allocated memory for hwmod links 2778 * @ml: pointer to a struct omap_hwmod_link * for the master link 2779 * @sl: pointer to a struct omap_hwmod_link * for the slave link 2780 * 2781 * Return pointers to two struct omap_hwmod_link records, via the 2782 * addresses pointed to by @ml and @sl. Will first attempt to return 2783 * memory allocated as part of a large initial block, but if that has 2784 * been exhausted, will allocate memory itself. Since ideally this 2785 * second allocation path will never occur, the number of these 2786 * 'supplemental' allocations will be logged when debugging is 2787 * enabled. Returns 0. 2788 */ 2789 static int __init _alloc_links(struct omap_hwmod_link **ml, 2790 struct omap_hwmod_link **sl) 2791 { 2792 unsigned int sz; 2793 2794 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) { 2795 *ml = &linkspace[free_ls++]; 2796 *sl = &linkspace[free_ls++]; 2797 return 0; 2798 } 2799 2800 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF; 2801 2802 *sl = NULL; 2803 *ml = memblock_virt_alloc(sz, 0); 2804 2805 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link); 2806 2807 ls_supp++; 2808 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n", 2809 ls_supp * LINKS_PER_OCP_IF); 2810 2811 return 0; 2812 }; 2813 2814 /** 2815 * _add_link - add an interconnect between two IP blocks 2816 * @oi: pointer to a struct omap_hwmod_ocp_if record 2817 * 2818 * Add struct omap_hwmod_link records connecting the master IP block 2819 * specified in @oi->master to @oi, and connecting the slave IP block 2820 * specified in @oi->slave to @oi. This code is assumed to run before 2821 * preemption or SMP has been enabled, thus avoiding the need for 2822 * locking in this code. Changes to this assumption will require 2823 * additional locking. Returns 0. 2824 */ 2825 static int __init _add_link(struct omap_hwmod_ocp_if *oi) 2826 { 2827 struct omap_hwmod_link *ml, *sl; 2828 2829 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name, 2830 oi->slave->name); 2831 2832 _alloc_links(&ml, &sl); 2833 2834 ml->ocp_if = oi; 2835 list_add(&ml->node, &oi->master->master_ports); 2836 oi->master->masters_cnt++; 2837 2838 sl->ocp_if = oi; 2839 list_add(&sl->node, &oi->slave->slave_ports); 2840 oi->slave->slaves_cnt++; 2841 2842 return 0; 2843 } 2844 2845 /** 2846 * _register_link - register a struct omap_hwmod_ocp_if 2847 * @oi: struct omap_hwmod_ocp_if * 2848 * 2849 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it 2850 * has already been registered; -EINVAL if @oi is NULL or if the 2851 * record pointed to by @oi is missing required fields; or 0 upon 2852 * success. 2853 * 2854 * XXX The data should be copied into bootmem, so the original data 2855 * should be marked __initdata and freed after init. This would allow 2856 * unneeded omap_hwmods to be freed on multi-OMAP configurations. 2857 */ 2858 static int __init _register_link(struct omap_hwmod_ocp_if *oi) 2859 { 2860 if (!oi || !oi->master || !oi->slave || !oi->user) 2861 return -EINVAL; 2862 2863 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED) 2864 return -EEXIST; 2865 2866 pr_debug("omap_hwmod: registering link from %s to %s\n", 2867 oi->master->name, oi->slave->name); 2868 2869 /* 2870 * Register the connected hwmods, if they haven't been 2871 * registered already 2872 */ 2873 if (oi->master->_state != _HWMOD_STATE_REGISTERED) 2874 _register(oi->master); 2875 2876 if (oi->slave->_state != _HWMOD_STATE_REGISTERED) 2877 _register(oi->slave); 2878 2879 _add_link(oi); 2880 2881 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED; 2882 2883 return 0; 2884 } 2885 2886 /** 2887 * _alloc_linkspace - allocate large block of hwmod links 2888 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count 2889 * 2890 * Allocate a large block of struct omap_hwmod_link records. This 2891 * improves boot time significantly by avoiding the need to allocate 2892 * individual records one by one. If the number of records to 2893 * allocate in the block hasn't been manually specified, this function 2894 * will count the number of struct omap_hwmod_ocp_if records in @ois 2895 * and use that to determine the allocation size. For SoC families 2896 * that require multiple list registrations, such as OMAP3xxx, this 2897 * estimation process isn't optimal, so manual estimation is advised 2898 * in those cases. Returns -EEXIST if the allocation has already occurred 2899 * or 0 upon success. 2900 */ 2901 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) 2902 { 2903 unsigned int i = 0; 2904 unsigned int sz; 2905 2906 if (linkspace) { 2907 WARN(1, "linkspace already allocated\n"); 2908 return -EEXIST; 2909 } 2910 2911 if (max_ls == 0) 2912 while (ois[i++]) 2913 max_ls += LINKS_PER_OCP_IF; 2914 2915 sz = sizeof(struct omap_hwmod_link) * max_ls; 2916 2917 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n", 2918 __func__, sz, max_ls); 2919 2920 linkspace = memblock_virt_alloc(sz, 0); 2921 2922 return 0; 2923 } 2924 2925 /* Static functions intended only for use in soc_ops field function pointers */ 2926 2927 /** 2928 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle 2929 * @oh: struct omap_hwmod * 2930 * 2931 * Wait for a module @oh to leave slave idle. Returns 0 if the module 2932 * does not have an IDLEST bit or if the module successfully leaves 2933 * slave idle; otherwise, pass along the return value of the 2934 * appropriate *_cm*_wait_module_ready() function. 2935 */ 2936 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh) 2937 { 2938 if (!oh) 2939 return -EINVAL; 2940 2941 if (oh->flags & HWMOD_NO_IDLEST) 2942 return 0; 2943 2944 if (!_find_mpu_rt_port(oh)) 2945 return 0; 2946 2947 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ 2948 2949 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs, 2950 oh->prcm.omap2.idlest_reg_id, 2951 oh->prcm.omap2.idlest_idle_bit); 2952 } 2953 2954 /** 2955 * _omap4_wait_target_ready - wait for a module to leave slave idle 2956 * @oh: struct omap_hwmod * 2957 * 2958 * Wait for a module @oh to leave slave idle. Returns 0 if the module 2959 * does not have an IDLEST bit or if the module successfully leaves 2960 * slave idle; otherwise, pass along the return value of the 2961 * appropriate *_cm*_wait_module_ready() function. 2962 */ 2963 static int _omap4_wait_target_ready(struct omap_hwmod *oh) 2964 { 2965 if (!oh) 2966 return -EINVAL; 2967 2968 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm) 2969 return 0; 2970 2971 if (!_find_mpu_rt_port(oh)) 2972 return 0; 2973 2974 /* XXX check module SIDLEMODE, hardreset status */ 2975 2976 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition, 2977 oh->clkdm->cm_inst, 2978 oh->prcm.omap4.clkctrl_offs, 0); 2979 } 2980 2981 /** 2982 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args 2983 * @oh: struct omap_hwmod * to assert hardreset 2984 * @ohri: hardreset line data 2985 * 2986 * Call omap2_prm_assert_hardreset() with parameters extracted from 2987 * the hwmod @oh and the hardreset line data @ohri. Only intended for 2988 * use as an soc_ops function pointer. Passes along the return value 2989 * from omap2_prm_assert_hardreset(). XXX This function is scheduled 2990 * for removal when the PRM code is moved into drivers/. 2991 */ 2992 static int _omap2_assert_hardreset(struct omap_hwmod *oh, 2993 struct omap_hwmod_rst_info *ohri) 2994 { 2995 return omap_prm_assert_hardreset(ohri->rst_shift, 0, 2996 oh->prcm.omap2.module_offs, 0); 2997 } 2998 2999 /** 3000 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args 3001 * @oh: struct omap_hwmod * to deassert hardreset 3002 * @ohri: hardreset line data 3003 * 3004 * Call omap2_prm_deassert_hardreset() with parameters extracted from 3005 * the hwmod @oh and the hardreset line data @ohri. Only intended for 3006 * use as an soc_ops function pointer. Passes along the return value 3007 * from omap2_prm_deassert_hardreset(). XXX This function is 3008 * scheduled for removal when the PRM code is moved into drivers/. 3009 */ 3010 static int _omap2_deassert_hardreset(struct omap_hwmod *oh, 3011 struct omap_hwmod_rst_info *ohri) 3012 { 3013 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0, 3014 oh->prcm.omap2.module_offs, 0, 0); 3015 } 3016 3017 /** 3018 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args 3019 * @oh: struct omap_hwmod * to test hardreset 3020 * @ohri: hardreset line data 3021 * 3022 * Call omap2_prm_is_hardreset_asserted() with parameters extracted 3023 * from the hwmod @oh and the hardreset line data @ohri. Only 3024 * intended for use as an soc_ops function pointer. Passes along the 3025 * return value from omap2_prm_is_hardreset_asserted(). XXX This 3026 * function is scheduled for removal when the PRM code is moved into 3027 * drivers/. 3028 */ 3029 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, 3030 struct omap_hwmod_rst_info *ohri) 3031 { 3032 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0, 3033 oh->prcm.omap2.module_offs, 0); 3034 } 3035 3036 /** 3037 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args 3038 * @oh: struct omap_hwmod * to assert hardreset 3039 * @ohri: hardreset line data 3040 * 3041 * Call omap4_prminst_assert_hardreset() with parameters extracted 3042 * from the hwmod @oh and the hardreset line data @ohri. Only 3043 * intended for use as an soc_ops function pointer. Passes along the 3044 * return value from omap4_prminst_assert_hardreset(). XXX This 3045 * function is scheduled for removal when the PRM code is moved into 3046 * drivers/. 3047 */ 3048 static int _omap4_assert_hardreset(struct omap_hwmod *oh, 3049 struct omap_hwmod_rst_info *ohri) 3050 { 3051 if (!oh->clkdm) 3052 return -EINVAL; 3053 3054 return omap_prm_assert_hardreset(ohri->rst_shift, 3055 oh->clkdm->pwrdm.ptr->prcm_partition, 3056 oh->clkdm->pwrdm.ptr->prcm_offs, 3057 oh->prcm.omap4.rstctrl_offs); 3058 } 3059 3060 /** 3061 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args 3062 * @oh: struct omap_hwmod * to deassert hardreset 3063 * @ohri: hardreset line data 3064 * 3065 * Call omap4_prminst_deassert_hardreset() with parameters extracted 3066 * from the hwmod @oh and the hardreset line data @ohri. Only 3067 * intended for use as an soc_ops function pointer. Passes along the 3068 * return value from omap4_prminst_deassert_hardreset(). XXX This 3069 * function is scheduled for removal when the PRM code is moved into 3070 * drivers/. 3071 */ 3072 static int _omap4_deassert_hardreset(struct omap_hwmod *oh, 3073 struct omap_hwmod_rst_info *ohri) 3074 { 3075 if (!oh->clkdm) 3076 return -EINVAL; 3077 3078 if (ohri->st_shift) 3079 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", 3080 oh->name, ohri->name); 3081 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift, 3082 oh->clkdm->pwrdm.ptr->prcm_partition, 3083 oh->clkdm->pwrdm.ptr->prcm_offs, 3084 oh->prcm.omap4.rstctrl_offs, 3085 oh->prcm.omap4.rstctrl_offs + 3086 OMAP4_RST_CTRL_ST_OFFSET); 3087 } 3088 3089 /** 3090 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args 3091 * @oh: struct omap_hwmod * to test hardreset 3092 * @ohri: hardreset line data 3093 * 3094 * Call omap4_prminst_is_hardreset_asserted() with parameters 3095 * extracted from the hwmod @oh and the hardreset line data @ohri. 3096 * Only intended for use as an soc_ops function pointer. Passes along 3097 * the return value from omap4_prminst_is_hardreset_asserted(). XXX 3098 * This function is scheduled for removal when the PRM code is moved 3099 * into drivers/. 3100 */ 3101 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, 3102 struct omap_hwmod_rst_info *ohri) 3103 { 3104 if (!oh->clkdm) 3105 return -EINVAL; 3106 3107 return omap_prm_is_hardreset_asserted(ohri->rst_shift, 3108 oh->clkdm->pwrdm.ptr-> 3109 prcm_partition, 3110 oh->clkdm->pwrdm.ptr->prcm_offs, 3111 oh->prcm.omap4.rstctrl_offs); 3112 } 3113 3114 /** 3115 * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod 3116 * @oh: struct omap_hwmod * to disable control for 3117 * 3118 * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod 3119 * will be using its main_clk to enable/disable the module. Returns 3120 * 0 if successful. 3121 */ 3122 static int _omap4_disable_direct_prcm(struct omap_hwmod *oh) 3123 { 3124 if (!oh) 3125 return -EINVAL; 3126 3127 oh->prcm.omap4.clkctrl_offs = 0; 3128 oh->prcm.omap4.modulemode = 0; 3129 3130 return 0; 3131 } 3132 3133 /** 3134 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args 3135 * @oh: struct omap_hwmod * to deassert hardreset 3136 * @ohri: hardreset line data 3137 * 3138 * Call am33xx_prminst_deassert_hardreset() with parameters extracted 3139 * from the hwmod @oh and the hardreset line data @ohri. Only 3140 * intended for use as an soc_ops function pointer. Passes along the 3141 * return value from am33xx_prminst_deassert_hardreset(). XXX This 3142 * function is scheduled for removal when the PRM code is moved into 3143 * drivers/. 3144 */ 3145 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, 3146 struct omap_hwmod_rst_info *ohri) 3147 { 3148 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 3149 oh->clkdm->pwrdm.ptr->prcm_partition, 3150 oh->clkdm->pwrdm.ptr->prcm_offs, 3151 oh->prcm.omap4.rstctrl_offs, 3152 oh->prcm.omap4.rstst_offs); 3153 } 3154 3155 /* Public functions */ 3156 3157 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) 3158 { 3159 if (oh->flags & HWMOD_16BIT_REG) 3160 return readw_relaxed(oh->_mpu_rt_va + reg_offs); 3161 else 3162 return readl_relaxed(oh->_mpu_rt_va + reg_offs); 3163 } 3164 3165 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) 3166 { 3167 if (oh->flags & HWMOD_16BIT_REG) 3168 writew_relaxed(v, oh->_mpu_rt_va + reg_offs); 3169 else 3170 writel_relaxed(v, oh->_mpu_rt_va + reg_offs); 3171 } 3172 3173 /** 3174 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit 3175 * @oh: struct omap_hwmod * 3176 * 3177 * This is a public function exposed to drivers. Some drivers may need to do 3178 * some settings before and after resetting the device. Those drivers after 3179 * doing the necessary settings could use this function to start a reset by 3180 * setting the SYSCONFIG.SOFTRESET bit. 3181 */ 3182 int omap_hwmod_softreset(struct omap_hwmod *oh) 3183 { 3184 u32 v; 3185 int ret; 3186 3187 if (!oh || !(oh->_sysc_cache)) 3188 return -EINVAL; 3189 3190 v = oh->_sysc_cache; 3191 ret = _set_softreset(oh, &v); 3192 if (ret) 3193 goto error; 3194 _write_sysconfig(v, oh); 3195 3196 ret = _clear_softreset(oh, &v); 3197 if (ret) 3198 goto error; 3199 _write_sysconfig(v, oh); 3200 3201 error: 3202 return ret; 3203 } 3204 3205 /** 3206 * omap_hwmod_lookup - look up a registered omap_hwmod by name 3207 * @name: name of the omap_hwmod to look up 3208 * 3209 * Given a @name of an omap_hwmod, return a pointer to the registered 3210 * struct omap_hwmod *, or NULL upon error. 3211 */ 3212 struct omap_hwmod *omap_hwmod_lookup(const char *name) 3213 { 3214 struct omap_hwmod *oh; 3215 3216 if (!name) 3217 return NULL; 3218 3219 oh = _lookup(name); 3220 3221 return oh; 3222 } 3223 3224 /** 3225 * omap_hwmod_for_each - call function for each registered omap_hwmod 3226 * @fn: pointer to a callback function 3227 * @data: void * data to pass to callback function 3228 * 3229 * Call @fn for each registered omap_hwmod, passing @data to each 3230 * function. @fn must return 0 for success or any other value for 3231 * failure. If @fn returns non-zero, the iteration across omap_hwmods 3232 * will stop and the non-zero return value will be passed to the 3233 * caller of omap_hwmod_for_each(). @fn is called with 3234 * omap_hwmod_for_each() held. 3235 */ 3236 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), 3237 void *data) 3238 { 3239 struct omap_hwmod *temp_oh; 3240 int ret = 0; 3241 3242 if (!fn) 3243 return -EINVAL; 3244 3245 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 3246 ret = (*fn)(temp_oh, data); 3247 if (ret) 3248 break; 3249 } 3250 3251 return ret; 3252 } 3253 3254 /** 3255 * omap_hwmod_register_links - register an array of hwmod links 3256 * @ois: pointer to an array of omap_hwmod_ocp_if to register 3257 * 3258 * Intended to be called early in boot before the clock framework is 3259 * initialized. If @ois is not null, will register all omap_hwmods 3260 * listed in @ois that are valid for this chip. Returns -EINVAL if 3261 * omap_hwmod_init() hasn't been called before calling this function, 3262 * -ENOMEM if the link memory area can't be allocated, or 0 upon 3263 * success. 3264 */ 3265 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) 3266 { 3267 int r, i; 3268 3269 if (!inited) 3270 return -EINVAL; 3271 3272 if (!ois) 3273 return 0; 3274 3275 if (ois[0] == NULL) /* Empty list */ 3276 return 0; 3277 3278 if (!linkspace) { 3279 if (_alloc_linkspace(ois)) { 3280 pr_err("omap_hwmod: could not allocate link space\n"); 3281 return -ENOMEM; 3282 } 3283 } 3284 3285 i = 0; 3286 do { 3287 r = _register_link(ois[i]); 3288 WARN(r && r != -EEXIST, 3289 "omap_hwmod: _register_link(%s -> %s) returned %d\n", 3290 ois[i]->master->name, ois[i]->slave->name, r); 3291 } while (ois[++i]); 3292 3293 return 0; 3294 } 3295 3296 /** 3297 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up 3298 * @oh: pointer to the hwmod currently being set up (usually not the MPU) 3299 * 3300 * If the hwmod data corresponding to the MPU subsystem IP block 3301 * hasn't been initialized and set up yet, do so now. This must be 3302 * done first since sleep dependencies may be added from other hwmods 3303 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No 3304 * return value. 3305 */ 3306 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) 3307 { 3308 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN) 3309 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n", 3310 __func__, MPU_INITIATOR_NAME); 3311 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh) 3312 omap_hwmod_setup_one(MPU_INITIATOR_NAME); 3313 } 3314 3315 /** 3316 * omap_hwmod_setup_one - set up a single hwmod 3317 * @oh_name: const char * name of the already-registered hwmod to set up 3318 * 3319 * Initialize and set up a single hwmod. Intended to be used for a 3320 * small number of early devices, such as the timer IP blocks used for 3321 * the scheduler clock. Must be called after omap2_clk_init(). 3322 * Resolves the struct clk names to struct clk pointers for each 3323 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns 3324 * -EINVAL upon error or 0 upon success. 3325 */ 3326 int __init omap_hwmod_setup_one(const char *oh_name) 3327 { 3328 struct omap_hwmod *oh; 3329 3330 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__); 3331 3332 oh = _lookup(oh_name); 3333 if (!oh) { 3334 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name); 3335 return -EINVAL; 3336 } 3337 3338 _ensure_mpu_hwmod_is_setup(oh); 3339 3340 _init(oh, NULL); 3341 _setup(oh, NULL); 3342 3343 return 0; 3344 } 3345 3346 /** 3347 * omap_hwmod_setup_all - set up all registered IP blocks 3348 * 3349 * Initialize and set up all IP blocks registered with the hwmod code. 3350 * Must be called after omap2_clk_init(). Resolves the struct clk 3351 * names to struct clk pointers for each registered omap_hwmod. Also 3352 * calls _setup() on each hwmod. Returns 0 upon success. 3353 */ 3354 static int __init omap_hwmod_setup_all(void) 3355 { 3356 _ensure_mpu_hwmod_is_setup(NULL); 3357 3358 omap_hwmod_for_each(_init, NULL); 3359 omap_hwmod_for_each(_setup, NULL); 3360 3361 return 0; 3362 } 3363 omap_postcore_initcall(omap_hwmod_setup_all); 3364 3365 /** 3366 * omap_hwmod_enable - enable an omap_hwmod 3367 * @oh: struct omap_hwmod * 3368 * 3369 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable(). 3370 * Returns -EINVAL on error or passes along the return value from _enable(). 3371 */ 3372 int omap_hwmod_enable(struct omap_hwmod *oh) 3373 { 3374 int r; 3375 unsigned long flags; 3376 3377 if (!oh) 3378 return -EINVAL; 3379 3380 spin_lock_irqsave(&oh->_lock, flags); 3381 r = _enable(oh); 3382 spin_unlock_irqrestore(&oh->_lock, flags); 3383 3384 return r; 3385 } 3386 3387 /** 3388 * omap_hwmod_idle - idle an omap_hwmod 3389 * @oh: struct omap_hwmod * 3390 * 3391 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle(). 3392 * Returns -EINVAL on error or passes along the return value from _idle(). 3393 */ 3394 int omap_hwmod_idle(struct omap_hwmod *oh) 3395 { 3396 int r; 3397 unsigned long flags; 3398 3399 if (!oh) 3400 return -EINVAL; 3401 3402 spin_lock_irqsave(&oh->_lock, flags); 3403 r = _idle(oh); 3404 spin_unlock_irqrestore(&oh->_lock, flags); 3405 3406 return r; 3407 } 3408 3409 /** 3410 * omap_hwmod_shutdown - shutdown an omap_hwmod 3411 * @oh: struct omap_hwmod * 3412 * 3413 * Shutdown an omap_hwmod @oh. Intended to be called by 3414 * omap_device_shutdown(). Returns -EINVAL on error or passes along 3415 * the return value from _shutdown(). 3416 */ 3417 int omap_hwmod_shutdown(struct omap_hwmod *oh) 3418 { 3419 int r; 3420 unsigned long flags; 3421 3422 if (!oh) 3423 return -EINVAL; 3424 3425 spin_lock_irqsave(&oh->_lock, flags); 3426 r = _shutdown(oh); 3427 spin_unlock_irqrestore(&oh->_lock, flags); 3428 3429 return r; 3430 } 3431 3432 /* 3433 * IP block data retrieval functions 3434 */ 3435 3436 /** 3437 * omap_hwmod_count_resources - count number of struct resources needed by hwmod 3438 * @oh: struct omap_hwmod * 3439 * @flags: Type of resources to include when counting (IRQ/DMA/MEM) 3440 * 3441 * Count the number of struct resource array elements necessary to 3442 * contain omap_hwmod @oh resources. Intended to be called by code 3443 * that registers omap_devices. Intended to be used to determine the 3444 * size of a dynamically-allocated struct resource array, before 3445 * calling omap_hwmod_fill_resources(). Returns the number of struct 3446 * resource array elements needed. 3447 * 3448 * XXX This code is not optimized. It could attempt to merge adjacent 3449 * resource IDs. 3450 * 3451 */ 3452 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags) 3453 { 3454 int ret = 0; 3455 3456 if (flags & IORESOURCE_IRQ) 3457 ret += _count_mpu_irqs(oh); 3458 3459 if (flags & IORESOURCE_DMA) 3460 ret += _count_sdma_reqs(oh); 3461 3462 if (flags & IORESOURCE_MEM) { 3463 int i = 0; 3464 struct omap_hwmod_ocp_if *os; 3465 struct list_head *p = oh->slave_ports.next; 3466 3467 while (i < oh->slaves_cnt) { 3468 os = _fetch_next_ocp_if(&p, &i); 3469 ret += _count_ocp_if_addr_spaces(os); 3470 } 3471 } 3472 3473 return ret; 3474 } 3475 3476 /** 3477 * omap_hwmod_fill_resources - fill struct resource array with hwmod data 3478 * @oh: struct omap_hwmod * 3479 * @res: pointer to the first element of an array of struct resource to fill 3480 * 3481 * Fill the struct resource array @res with resource data from the 3482 * omap_hwmod @oh. Intended to be called by code that registers 3483 * omap_devices. See also omap_hwmod_count_resources(). Returns the 3484 * number of array elements filled. 3485 */ 3486 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) 3487 { 3488 struct omap_hwmod_ocp_if *os; 3489 struct list_head *p; 3490 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt; 3491 int r = 0; 3492 3493 /* For each IRQ, DMA, memory area, fill in array.*/ 3494 3495 mpu_irqs_cnt = _count_mpu_irqs(oh); 3496 for (i = 0; i < mpu_irqs_cnt; i++) { 3497 unsigned int irq; 3498 3499 if (oh->xlate_irq) 3500 irq = oh->xlate_irq((oh->mpu_irqs + i)->irq); 3501 else 3502 irq = (oh->mpu_irqs + i)->irq; 3503 (res + r)->name = (oh->mpu_irqs + i)->name; 3504 (res + r)->start = irq; 3505 (res + r)->end = irq; 3506 (res + r)->flags = IORESOURCE_IRQ; 3507 r++; 3508 } 3509 3510 sdma_reqs_cnt = _count_sdma_reqs(oh); 3511 for (i = 0; i < sdma_reqs_cnt; i++) { 3512 (res + r)->name = (oh->sdma_reqs + i)->name; 3513 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 3514 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 3515 (res + r)->flags = IORESOURCE_DMA; 3516 r++; 3517 } 3518 3519 p = oh->slave_ports.next; 3520 3521 i = 0; 3522 while (i < oh->slaves_cnt) { 3523 os = _fetch_next_ocp_if(&p, &i); 3524 addr_cnt = _count_ocp_if_addr_spaces(os); 3525 3526 for (j = 0; j < addr_cnt; j++) { 3527 (res + r)->name = (os->addr + j)->name; 3528 (res + r)->start = (os->addr + j)->pa_start; 3529 (res + r)->end = (os->addr + j)->pa_end; 3530 (res + r)->flags = IORESOURCE_MEM; 3531 r++; 3532 } 3533 } 3534 3535 return r; 3536 } 3537 3538 /** 3539 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data 3540 * @oh: struct omap_hwmod * 3541 * @res: pointer to the array of struct resource to fill 3542 * 3543 * Fill the struct resource array @res with dma resource data from the 3544 * omap_hwmod @oh. Intended to be called by code that registers 3545 * omap_devices. See also omap_hwmod_count_resources(). Returns the 3546 * number of array elements filled. 3547 */ 3548 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res) 3549 { 3550 int i, sdma_reqs_cnt; 3551 int r = 0; 3552 3553 sdma_reqs_cnt = _count_sdma_reqs(oh); 3554 for (i = 0; i < sdma_reqs_cnt; i++) { 3555 (res + r)->name = (oh->sdma_reqs + i)->name; 3556 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 3557 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 3558 (res + r)->flags = IORESOURCE_DMA; 3559 r++; 3560 } 3561 3562 return r; 3563 } 3564 3565 /** 3566 * omap_hwmod_get_resource_byname - fetch IP block integration data by name 3567 * @oh: struct omap_hwmod * to operate on 3568 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h 3569 * @name: pointer to the name of the data to fetch (optional) 3570 * @rsrc: pointer to a struct resource, allocated by the caller 3571 * 3572 * Retrieve MPU IRQ, SDMA request line, or address space start/end 3573 * data for the IP block pointed to by @oh. The data will be filled 3574 * into a struct resource record pointed to by @rsrc. The struct 3575 * resource must be allocated by the caller. When @name is non-null, 3576 * the data associated with the matching entry in the IRQ/SDMA/address 3577 * space hwmod data arrays will be returned. If @name is null, the 3578 * first array entry will be returned. Data order is not meaningful 3579 * in hwmod data, so callers are strongly encouraged to use a non-null 3580 * @name whenever possible to avoid unpredictable effects if hwmod 3581 * data is later added that causes data ordering to change. This 3582 * function is only intended for use by OMAP core code. Device 3583 * drivers should not call this function - the appropriate bus-related 3584 * data accessor functions should be used instead. Returns 0 upon 3585 * success or a negative error code upon error. 3586 */ 3587 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, 3588 const char *name, struct resource *rsrc) 3589 { 3590 int r; 3591 unsigned int irq, dma; 3592 u32 pa_start, pa_end; 3593 3594 if (!oh || !rsrc) 3595 return -EINVAL; 3596 3597 if (type == IORESOURCE_IRQ) { 3598 r = _get_mpu_irq_by_name(oh, name, &irq); 3599 if (r) 3600 return r; 3601 3602 rsrc->start = irq; 3603 rsrc->end = irq; 3604 } else if (type == IORESOURCE_DMA) { 3605 r = _get_sdma_req_by_name(oh, name, &dma); 3606 if (r) 3607 return r; 3608 3609 rsrc->start = dma; 3610 rsrc->end = dma; 3611 } else if (type == IORESOURCE_MEM) { 3612 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end); 3613 if (r) 3614 return r; 3615 3616 rsrc->start = pa_start; 3617 rsrc->end = pa_end; 3618 } else { 3619 return -EINVAL; 3620 } 3621 3622 rsrc->flags = type; 3623 rsrc->name = name; 3624 3625 return 0; 3626 } 3627 3628 /** 3629 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain 3630 * @oh: struct omap_hwmod * 3631 * 3632 * Return the powerdomain pointer associated with the OMAP module 3633 * @oh's main clock. If @oh does not have a main clk, return the 3634 * powerdomain associated with the interface clock associated with the 3635 * module's MPU port. (XXX Perhaps this should use the SDMA port 3636 * instead?) Returns NULL on error, or a struct powerdomain * on 3637 * success. 3638 */ 3639 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) 3640 { 3641 struct clk *c; 3642 struct omap_hwmod_ocp_if *oi; 3643 struct clockdomain *clkdm; 3644 struct clk_hw_omap *clk; 3645 3646 if (!oh) 3647 return NULL; 3648 3649 if (oh->clkdm) 3650 return oh->clkdm->pwrdm.ptr; 3651 3652 if (oh->_clk) { 3653 c = oh->_clk; 3654 } else { 3655 oi = _find_mpu_rt_port(oh); 3656 if (!oi) 3657 return NULL; 3658 c = oi->_clk; 3659 } 3660 3661 clk = to_clk_hw_omap(__clk_get_hw(c)); 3662 clkdm = clk->clkdm; 3663 if (!clkdm) 3664 return NULL; 3665 3666 return clkdm->pwrdm.ptr; 3667 } 3668 3669 /** 3670 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) 3671 * @oh: struct omap_hwmod * 3672 * 3673 * Returns the virtual address corresponding to the beginning of the 3674 * module's register target, in the address range that is intended to 3675 * be used by the MPU. Returns the virtual address upon success or NULL 3676 * upon error. 3677 */ 3678 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) 3679 { 3680 if (!oh) 3681 return NULL; 3682 3683 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 3684 return NULL; 3685 3686 if (oh->_state == _HWMOD_STATE_UNKNOWN) 3687 return NULL; 3688 3689 return oh->_mpu_rt_va; 3690 } 3691 3692 /* 3693 * XXX what about functions for drivers to save/restore ocp_sysconfig 3694 * for context save/restore operations? 3695 */ 3696 3697 /** 3698 * omap_hwmod_enable_wakeup - allow device to wake up the system 3699 * @oh: struct omap_hwmod * 3700 * 3701 * Sets the module OCP socket ENAWAKEUP bit to allow the module to 3702 * send wakeups to the PRCM, and enable I/O ring wakeup events for 3703 * this IP block if it has dynamic mux entries. Eventually this 3704 * should set PRCM wakeup registers to cause the PRCM to receive 3705 * wakeup events from the module. Does not set any wakeup routing 3706 * registers beyond this point - if the module is to wake up any other 3707 * module or subsystem, that must be set separately. Called by 3708 * omap_device code. Returns -EINVAL on error or 0 upon success. 3709 */ 3710 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) 3711 { 3712 unsigned long flags; 3713 u32 v; 3714 3715 spin_lock_irqsave(&oh->_lock, flags); 3716 3717 if (oh->class->sysc && 3718 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 3719 v = oh->_sysc_cache; 3720 _enable_wakeup(oh, &v); 3721 _write_sysconfig(v, oh); 3722 } 3723 3724 _set_idle_ioring_wakeup(oh, true); 3725 spin_unlock_irqrestore(&oh->_lock, flags); 3726 3727 return 0; 3728 } 3729 3730 /** 3731 * omap_hwmod_disable_wakeup - prevent device from waking the system 3732 * @oh: struct omap_hwmod * 3733 * 3734 * Clears the module OCP socket ENAWAKEUP bit to prevent the module 3735 * from sending wakeups to the PRCM, and disable I/O ring wakeup 3736 * events for this IP block if it has dynamic mux entries. Eventually 3737 * this should clear PRCM wakeup registers to cause the PRCM to ignore 3738 * wakeup events from the module. Does not set any wakeup routing 3739 * registers beyond this point - if the module is to wake up any other 3740 * module or subsystem, that must be set separately. Called by 3741 * omap_device code. Returns -EINVAL on error or 0 upon success. 3742 */ 3743 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) 3744 { 3745 unsigned long flags; 3746 u32 v; 3747 3748 spin_lock_irqsave(&oh->_lock, flags); 3749 3750 if (oh->class->sysc && 3751 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 3752 v = oh->_sysc_cache; 3753 _disable_wakeup(oh, &v); 3754 _write_sysconfig(v, oh); 3755 } 3756 3757 _set_idle_ioring_wakeup(oh, false); 3758 spin_unlock_irqrestore(&oh->_lock, flags); 3759 3760 return 0; 3761 } 3762 3763 /** 3764 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules 3765 * contained in the hwmod module. 3766 * @oh: struct omap_hwmod * 3767 * @name: name of the reset line to lookup and assert 3768 * 3769 * Some IP like dsp, ipu or iva contain processor that require 3770 * an HW reset line to be assert / deassert in order to enable fully 3771 * the IP. Returns -EINVAL if @oh is null or if the operation is not 3772 * yet supported on this OMAP; otherwise, passes along the return value 3773 * from _assert_hardreset(). 3774 */ 3775 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name) 3776 { 3777 int ret; 3778 unsigned long flags; 3779 3780 if (!oh) 3781 return -EINVAL; 3782 3783 spin_lock_irqsave(&oh->_lock, flags); 3784 ret = _assert_hardreset(oh, name); 3785 spin_unlock_irqrestore(&oh->_lock, flags); 3786 3787 return ret; 3788 } 3789 3790 /** 3791 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules 3792 * contained in the hwmod module. 3793 * @oh: struct omap_hwmod * 3794 * @name: name of the reset line to look up and deassert 3795 * 3796 * Some IP like dsp, ipu or iva contain processor that require 3797 * an HW reset line to be assert / deassert in order to enable fully 3798 * the IP. Returns -EINVAL if @oh is null or if the operation is not 3799 * yet supported on this OMAP; otherwise, passes along the return value 3800 * from _deassert_hardreset(). 3801 */ 3802 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) 3803 { 3804 int ret; 3805 unsigned long flags; 3806 3807 if (!oh) 3808 return -EINVAL; 3809 3810 spin_lock_irqsave(&oh->_lock, flags); 3811 ret = _deassert_hardreset(oh, name); 3812 spin_unlock_irqrestore(&oh->_lock, flags); 3813 3814 return ret; 3815 } 3816 3817 /** 3818 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname 3819 * @classname: struct omap_hwmod_class name to search for 3820 * @fn: callback function pointer to call for each hwmod in class @classname 3821 * @user: arbitrary context data to pass to the callback function 3822 * 3823 * For each omap_hwmod of class @classname, call @fn. 3824 * If the callback function returns something other than 3825 * zero, the iterator is terminated, and the callback function's return 3826 * value is passed back to the caller. Returns 0 upon success, -EINVAL 3827 * if @classname or @fn are NULL, or passes back the error code from @fn. 3828 */ 3829 int omap_hwmod_for_each_by_class(const char *classname, 3830 int (*fn)(struct omap_hwmod *oh, 3831 void *user), 3832 void *user) 3833 { 3834 struct omap_hwmod *temp_oh; 3835 int ret = 0; 3836 3837 if (!classname || !fn) 3838 return -EINVAL; 3839 3840 pr_debug("omap_hwmod: %s: looking for modules of class %s\n", 3841 __func__, classname); 3842 3843 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 3844 if (!strcmp(temp_oh->class->name, classname)) { 3845 pr_debug("omap_hwmod: %s: %s: calling callback fn\n", 3846 __func__, temp_oh->name); 3847 ret = (*fn)(temp_oh, user); 3848 if (ret) 3849 break; 3850 } 3851 } 3852 3853 if (ret) 3854 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", 3855 __func__, ret); 3856 3857 return ret; 3858 } 3859 3860 /** 3861 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod 3862 * @oh: struct omap_hwmod * 3863 * @state: state that _setup() should leave the hwmod in 3864 * 3865 * Sets the hwmod state that @oh will enter at the end of _setup() 3866 * (called by omap_hwmod_setup_*()). See also the documentation 3867 * for _setup_postsetup(), above. Returns 0 upon success or 3868 * -EINVAL if there is a problem with the arguments or if the hwmod is 3869 * in the wrong state. 3870 */ 3871 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state) 3872 { 3873 int ret; 3874 unsigned long flags; 3875 3876 if (!oh) 3877 return -EINVAL; 3878 3879 if (state != _HWMOD_STATE_DISABLED && 3880 state != _HWMOD_STATE_ENABLED && 3881 state != _HWMOD_STATE_IDLE) 3882 return -EINVAL; 3883 3884 spin_lock_irqsave(&oh->_lock, flags); 3885 3886 if (oh->_state != _HWMOD_STATE_REGISTERED) { 3887 ret = -EINVAL; 3888 goto ohsps_unlock; 3889 } 3890 3891 oh->_postsetup_state = state; 3892 ret = 0; 3893 3894 ohsps_unlock: 3895 spin_unlock_irqrestore(&oh->_lock, flags); 3896 3897 return ret; 3898 } 3899 3900 /** 3901 * omap_hwmod_get_context_loss_count - get lost context count 3902 * @oh: struct omap_hwmod * 3903 * 3904 * Returns the context loss count of associated @oh 3905 * upon success, or zero if no context loss data is available. 3906 * 3907 * On OMAP4, this queries the per-hwmod context loss register, 3908 * assuming one exists. If not, or on OMAP2/3, this queries the 3909 * enclosing powerdomain context loss count. 3910 */ 3911 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) 3912 { 3913 struct powerdomain *pwrdm; 3914 int ret = 0; 3915 3916 if (soc_ops.get_context_lost) 3917 return soc_ops.get_context_lost(oh); 3918 3919 pwrdm = omap_hwmod_get_pwrdm(oh); 3920 if (pwrdm) 3921 ret = pwrdm_get_context_loss_count(pwrdm); 3922 3923 return ret; 3924 } 3925 3926 /** 3927 * omap_hwmod_init - initialize the hwmod code 3928 * 3929 * Sets up some function pointers needed by the hwmod code to operate on the 3930 * currently-booted SoC. Intended to be called once during kernel init 3931 * before any hwmods are registered. No return value. 3932 */ 3933 void __init omap_hwmod_init(void) 3934 { 3935 if (cpu_is_omap24xx()) { 3936 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; 3937 soc_ops.assert_hardreset = _omap2_assert_hardreset; 3938 soc_ops.deassert_hardreset = _omap2_deassert_hardreset; 3939 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; 3940 } else if (cpu_is_omap34xx()) { 3941 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; 3942 soc_ops.assert_hardreset = _omap2_assert_hardreset; 3943 soc_ops.deassert_hardreset = _omap2_deassert_hardreset; 3944 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; 3945 soc_ops.init_clkdm = _init_clkdm; 3946 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { 3947 soc_ops.enable_module = _omap4_enable_module; 3948 soc_ops.disable_module = _omap4_disable_module; 3949 soc_ops.wait_target_ready = _omap4_wait_target_ready; 3950 soc_ops.assert_hardreset = _omap4_assert_hardreset; 3951 soc_ops.deassert_hardreset = _omap4_deassert_hardreset; 3952 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 3953 soc_ops.init_clkdm = _init_clkdm; 3954 soc_ops.update_context_lost = _omap4_update_context_lost; 3955 soc_ops.get_context_lost = _omap4_get_context_lost; 3956 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; 3957 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() || 3958 soc_is_am43xx()) { 3959 soc_ops.enable_module = _omap4_enable_module; 3960 soc_ops.disable_module = _omap4_disable_module; 3961 soc_ops.wait_target_ready = _omap4_wait_target_ready; 3962 soc_ops.assert_hardreset = _omap4_assert_hardreset; 3963 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; 3964 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 3965 soc_ops.init_clkdm = _init_clkdm; 3966 soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; 3967 } else { 3968 WARN(1, "omap_hwmod: unknown SoC type\n"); 3969 } 3970 3971 inited = true; 3972 } 3973 3974 /** 3975 * omap_hwmod_get_main_clk - get pointer to main clock name 3976 * @oh: struct omap_hwmod * 3977 * 3978 * Returns the main clock name assocated with @oh upon success, 3979 * or NULL if @oh is NULL. 3980 */ 3981 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) 3982 { 3983 if (!oh) 3984 return NULL; 3985 3986 return oh->main_clk; 3987 } 3988