xref: /linux/arch/arm/mach-omap2/msdi.c (revision 5c35a02c545a7bbe77f3a1ae337d9e29beed079b)
1 /*
2  * MSDI IP block reset
3  *
4  * Copyright (C) 2012 Texas Instruments, Inc.
5  * Paul Walmsley
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19  * 02110-1301 USA
20  *
21  * XXX What about pad muxing?
22  */
23 
24 #include <linux/kernel.h>
25 #include <linux/err.h>
26 
27 #include "prm.h"
28 #include "common.h"
29 #include "control.h"
30 #include "omap_hwmod.h"
31 #include "omap_device.h"
32 #include "mmc.h"
33 
34 /*
35  * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
36  *     from the IP block's base address
37  */
38 #define MSDI_CON_OFFSET				0x0c
39 
40 /* Register bitfields in the CON register */
41 #define MSDI_CON_POW_MASK			BIT(11)
42 #define MSDI_CON_CLKD_MASK			(0x3f << 0)
43 #define MSDI_CON_CLKD_SHIFT			0
44 
45 /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
46 #define MSDI_TARGET_RESET_CLKD		0x3ff
47 
48 /**
49  * omap_msdi_reset - reset the MSDI IP block
50  * @oh: struct omap_hwmod *
51  *
52  * The MSDI IP block on OMAP2420 has to have both the POW and CLKD
53  * fields set inside its CON register for a reset to complete
54  * successfully.  This is not documented in the TRM.  For CLKD, we use
55  * the value that results in the lowest possible clock rate, to attempt
56  * to avoid disturbing any cards.
57  */
58 int omap_msdi_reset(struct omap_hwmod *oh)
59 {
60 	u16 v = 0;
61 	int c = 0;
62 
63 	/* Write to the SOFTRESET bit */
64 	omap_hwmod_softreset(oh);
65 
66 	/* Enable the MSDI core and internal clock */
67 	v |= MSDI_CON_POW_MASK;
68 	v |= MSDI_TARGET_RESET_CLKD << MSDI_CON_CLKD_SHIFT;
69 	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
70 
71 	/* Poll on RESETDONE bit */
72 	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
73 			   & SYSS_RESETDONE_MASK),
74 			  MAX_MODULE_SOFTRESET_WAIT, c);
75 
76 	if (c == MAX_MODULE_SOFTRESET_WAIT)
77 		pr_warn("%s: %s: softreset failed (waited %d usec)\n",
78 			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
79 	else
80 		pr_debug("%s: %s: softreset in %d usec\n", __func__,
81 			 oh->name, c);
82 
83 	/* Disable the MSDI internal clock */
84 	v &= ~MSDI_CON_CLKD_MASK;
85 	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
86 
87 	return 0;
88 }
89