xref: /linux/arch/arm/mach-omap2/iomap.h (revision 26b0d14106954ae46d2f4f7eec3481828a210f7d)
1 /*
2  * IO mappings for OMAP2+
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19  *
20  * You should have received a copy of the  GNU General Public License along
21  * with this program; if not, write  to the Free Software Foundation, Inc.,
22  * 675 Mass Ave, Cambridge, MA 02139, USA.
23  */
24 
25 #define OMAP2_L3_IO_OFFSET	0x90000000
26 #define OMAP2_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
27 
28 #define OMAP2_L4_IO_OFFSET	0xb2000000
29 #define OMAP2_L4_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
30 
31 #define OMAP4_L3_IO_OFFSET	0xb4000000
32 #define OMAP4_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
33 
34 #define AM33XX_L4_WK_IO_OFFSET	0xb5000000
35 #define AM33XX_L4_WK_IO_ADDRESS(pa)	IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
36 
37 #define OMAP4_L3_PER_IO_OFFSET	0xb1100000
38 #define OMAP4_L3_PER_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
39 
40 #define OMAP2_EMU_IO_OFFSET		0xaa800000	/* Emulation */
41 #define OMAP2_EMU_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
42 
43 /*
44  * ----------------------------------------------------------------------------
45  * Omap2 specific IO mapping
46  * ----------------------------------------------------------------------------
47  */
48 
49 /* We map both L3 and L4 on OMAP2 */
50 #define L3_24XX_PHYS	L3_24XX_BASE	/* 0x68000000 --> 0xf8000000*/
51 #define L3_24XX_VIRT	(L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
52 #define L3_24XX_SIZE	SZ_1M		/* 44kB of 128MB used, want 1MB sect */
53 #define L4_24XX_PHYS	L4_24XX_BASE	/* 0x48000000 --> 0xfa000000 */
54 #define L4_24XX_VIRT	(L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
55 #define L4_24XX_SIZE	SZ_1M		/* 1MB of 128MB used, want 1MB sect */
56 
57 #define L4_WK_243X_PHYS		L4_WK_243X_BASE	/* 0x49000000 --> 0xfb000000 */
58 #define L4_WK_243X_VIRT		(L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
59 #define L4_WK_243X_SIZE		SZ_1M
60 #define OMAP243X_GPMC_PHYS	OMAP243X_GPMC_BASE
61 #define OMAP243X_GPMC_VIRT	(OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
62 						/* 0x6e000000 --> 0xfe000000 */
63 #define OMAP243X_GPMC_SIZE	SZ_1M
64 #define OMAP243X_SDRC_PHYS	OMAP243X_SDRC_BASE
65 						/* 0x6D000000 --> 0xfd000000 */
66 #define OMAP243X_SDRC_VIRT	(OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
67 #define OMAP243X_SDRC_SIZE	SZ_1M
68 #define OMAP243X_SMS_PHYS	OMAP243X_SMS_BASE
69 						/* 0x6c000000 --> 0xfc000000 */
70 #define OMAP243X_SMS_VIRT	(OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
71 #define OMAP243X_SMS_SIZE	SZ_1M
72 
73 /* 2420 IVA */
74 #define DSP_MEM_2420_PHYS	OMAP2420_DSP_MEM_BASE
75 						/* 0x58000000 --> 0xfc100000 */
76 #define DSP_MEM_2420_VIRT	0xfc100000
77 #define DSP_MEM_2420_SIZE	0x28000
78 #define DSP_IPI_2420_PHYS	OMAP2420_DSP_IPI_BASE
79 						/* 0x59000000 --> 0xfc128000 */
80 #define DSP_IPI_2420_VIRT	0xfc128000
81 #define DSP_IPI_2420_SIZE	SZ_4K
82 #define DSP_MMU_2420_PHYS	OMAP2420_DSP_MMU_BASE
83 						/* 0x5a000000 --> 0xfc129000 */
84 #define DSP_MMU_2420_VIRT	0xfc129000
85 #define DSP_MMU_2420_SIZE	SZ_4K
86 
87 /* 2430 IVA2.1 - currently unmapped */
88 
89 /*
90  * ----------------------------------------------------------------------------
91  * Omap3 specific IO mapping
92  * ----------------------------------------------------------------------------
93  */
94 
95 /* We map both L3 and L4 on OMAP3 */
96 #define L3_34XX_PHYS		L3_34XX_BASE	/* 0x68000000 --> 0xf8000000 */
97 #define L3_34XX_VIRT		(L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
98 #define L3_34XX_SIZE		SZ_1M   /* 44kB of 128MB used, want 1MB sect */
99 
100 #define L4_34XX_PHYS		L4_34XX_BASE	/* 0x48000000 --> 0xfa000000 */
101 #define L4_34XX_VIRT		(L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
102 #define L4_34XX_SIZE		SZ_4M   /* 1MB of 128MB used, want 1MB sect */
103 
104 /*
105  * ----------------------------------------------------------------------------
106  * AM33XX specific IO mapping
107  * ----------------------------------------------------------------------------
108  */
109 #define L4_WK_AM33XX_PHYS	L4_WK_AM33XX_BASE
110 #define L4_WK_AM33XX_VIRT	(L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
111 #define L4_WK_AM33XX_SIZE	SZ_4M   /* 1MB of 128MB used, want 1MB sect */
112 
113 /*
114  * Need to look at the Size 4M for L4.
115  * VPOM3430 was not working for Int controller
116  */
117 
118 #define L4_PER_34XX_PHYS	L4_PER_34XX_BASE
119 						/* 0x49000000 --> 0xfb000000 */
120 #define L4_PER_34XX_VIRT	(L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
121 #define L4_PER_34XX_SIZE	SZ_1M
122 
123 #define L4_EMU_34XX_PHYS	L4_EMU_34XX_BASE
124 						/* 0x54000000 --> 0xfe800000 */
125 #define L4_EMU_34XX_VIRT	(L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
126 #define L4_EMU_34XX_SIZE	SZ_8M
127 
128 #define OMAP34XX_GPMC_PHYS	OMAP34XX_GPMC_BASE
129 						/* 0x6e000000 --> 0xfe000000 */
130 #define OMAP34XX_GPMC_VIRT	(OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
131 #define OMAP34XX_GPMC_SIZE	SZ_1M
132 
133 #define OMAP343X_SMS_PHYS	OMAP343X_SMS_BASE
134 						/* 0x6c000000 --> 0xfc000000 */
135 #define OMAP343X_SMS_VIRT	(OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
136 #define OMAP343X_SMS_SIZE	SZ_1M
137 
138 #define OMAP343X_SDRC_PHYS	OMAP343X_SDRC_BASE
139 						/* 0x6D000000 --> 0xfd000000 */
140 #define OMAP343X_SDRC_VIRT	(OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
141 #define OMAP343X_SDRC_SIZE	SZ_1M
142 
143 /* 3430 IVA - currently unmapped */
144 
145 /*
146  * ----------------------------------------------------------------------------
147  * Omap4 specific IO mapping
148  * ----------------------------------------------------------------------------
149  */
150 
151 /* We map both L3 and L4 on OMAP4 */
152 #define L3_44XX_PHYS		L3_44XX_BASE	/* 0x44000000 --> 0xf8000000 */
153 #define L3_44XX_VIRT		(L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
154 #define L3_44XX_SIZE		SZ_1M
155 
156 #define L4_44XX_PHYS		L4_44XX_BASE	/* 0x4a000000 --> 0xfc000000 */
157 #define L4_44XX_VIRT		(L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
158 #define L4_44XX_SIZE		SZ_4M
159 
160 #define L4_PER_44XX_PHYS	L4_PER_44XX_BASE
161 						/* 0x48000000 --> 0xfa000000 */
162 #define L4_PER_44XX_VIRT	(L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
163 #define L4_PER_44XX_SIZE	SZ_4M
164 
165 #define L4_ABE_44XX_PHYS	L4_ABE_44XX_BASE
166 						/* 0x49000000 --> 0xfb000000 */
167 #define L4_ABE_44XX_VIRT	(L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
168 #define L4_ABE_44XX_SIZE	SZ_1M
169 
170