1 /* 2 * Helper module for board specific I2C bus registration 3 * 4 * Copyright (C) 2009 Nokia Corporation. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 18 * 02110-1301 USA 19 * 20 */ 21 22 #include "soc.h" 23 #include "omap_hwmod.h" 24 #include "omap_device.h" 25 26 #include "prm.h" 27 #include "common.h" 28 #include "mux.h" 29 #include "i2c.h" 30 31 /* In register I2C_CON, Bit 15 is the I2C enable bit */ 32 #define I2C_EN BIT(15) 33 #define OMAP2_I2C_CON_OFFSET 0x24 34 #define OMAP4_I2C_CON_OFFSET 0xA4 35 36 #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16 37 38 static void __init omap2_i2c_mux_pins(int bus_id) 39 { 40 char mux_name[sizeof("i2c2_scl.i2c2_scl")]; 41 42 /* First I2C bus is not muxable */ 43 if (bus_id == 1) 44 return; 45 46 sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id); 47 omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); 48 sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); 49 omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); 50 } 51 52 /** 53 * omap_i2c_reset - reset the omap i2c module. 54 * @oh: struct omap_hwmod * 55 * 56 * The i2c moudle in omap2, omap3 had a special sequence to reset. The 57 * sequence is: 58 * - Disable the I2C. 59 * - Write to SOFTRESET bit. 60 * - Enable the I2C. 61 * - Poll on the RESETDONE bit. 62 * The sequence is implemented in below function. This is called for 2420, 63 * 2430 and omap3. 64 */ 65 int omap_i2c_reset(struct omap_hwmod *oh) 66 { 67 u32 v; 68 u16 i2c_con; 69 int c = 0; 70 71 if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { 72 i2c_con = OMAP4_I2C_CON_OFFSET; 73 } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { 74 i2c_con = OMAP2_I2C_CON_OFFSET; 75 } else { 76 WARN(1, "Cannot reset I2C block %s: unsupported revision\n", 77 oh->name); 78 return -EINVAL; 79 } 80 81 /* Disable I2C */ 82 v = omap_hwmod_read(oh, i2c_con); 83 v &= ~I2C_EN; 84 omap_hwmod_write(v, oh, i2c_con); 85 86 /* Write to the SOFTRESET bit */ 87 omap_hwmod_softreset(oh); 88 89 /* Enable I2C */ 90 v = omap_hwmod_read(oh, i2c_con); 91 v |= I2C_EN; 92 omap_hwmod_write(v, oh, i2c_con); 93 94 /* Poll on RESETDONE bit */ 95 omap_test_timeout((omap_hwmod_read(oh, 96 oh->class->sysc->syss_offs) 97 & SYSS_RESETDONE_MASK), 98 MAX_MODULE_SOFTRESET_WAIT, c); 99 100 if (c == MAX_MODULE_SOFTRESET_WAIT) 101 pr_warning("%s: %s: softreset failed (waited %d usec)\n", 102 __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); 103 else 104 pr_debug("%s: %s: softreset in %d usec\n", __func__, 105 oh->name, c); 106 107 return 0; 108 } 109 110 static int __init omap_i2c_nr_ports(void) 111 { 112 int ports = 0; 113 114 if (cpu_is_omap24xx()) 115 ports = 2; 116 else if (cpu_is_omap34xx()) 117 ports = 3; 118 else if (cpu_is_omap44xx()) 119 ports = 4; 120 return ports; 121 } 122 123 /* 124 * XXX This function is a temporary compatibility wrapper - only 125 * needed until the I2C driver can be converted to call 126 * omap_pm_set_max_dev_wakeup_lat() and handle a return code. 127 */ 128 static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t) 129 { 130 omap_pm_set_max_mpu_wakeup_lat(dev, t); 131 } 132 133 static const char name[] = "omap_i2c"; 134 135 int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata, 136 int bus_id) 137 { 138 int l; 139 struct omap_hwmod *oh; 140 struct platform_device *pdev; 141 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; 142 struct omap_i2c_bus_platform_data *pdata; 143 struct omap_i2c_dev_attr *dev_attr; 144 145 if (bus_id > omap_i2c_nr_ports()) 146 return -EINVAL; 147 148 omap2_i2c_mux_pins(bus_id); 149 150 l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id); 151 WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN, 152 "String buffer overflow in I2C%d device setup\n", bus_id); 153 oh = omap_hwmod_lookup(oh_name); 154 if (!oh) { 155 pr_err("Could not look up %s\n", oh_name); 156 return -EEXIST; 157 } 158 159 pdata = i2c_pdata; 160 /* 161 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in 162 * use, and functionality implementation flags, up to the OMAP I2C 163 * driver via platform data 164 */ 165 pdata->rev = oh->class->rev; 166 167 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; 168 pdata->flags = dev_attr->flags; 169 170 /* 171 * When waiting for completion of a i2c transfer, we need to 172 * set a wake up latency constraint for the MPU. This is to 173 * ensure quick enough wakeup from idle, when transfer 174 * completes. 175 * Only omap3 has support for constraints 176 */ 177 if (cpu_is_omap34xx()) 178 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; 179 pdev = omap_device_build(name, bus_id, oh, pdata, 180 sizeof(struct omap_i2c_bus_platform_data), 181 NULL, 0, 0); 182 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name); 183 184 return PTR_RET(pdev); 185 } 186 187