1 /* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27 #ifndef __ASSEMBLER__ 28 29 #include <linux/irq.h> 30 #include <linux/delay.h> 31 #include <linux/i2c.h> 32 #include <linux/i2c/twl.h> 33 #include <linux/i2c-omap.h> 34 #include <linux/reboot.h> 35 #include <linux/irqchip/irq-omap-intc.h> 36 37 #include <asm/proc-fns.h> 38 39 #include "i2c.h" 40 #include "serial.h" 41 42 #include "usb.h" 43 44 #define OMAP_INTC_START NR_IRQS 45 46 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 47 int omap2_pm_init(void); 48 #else 49 static inline int omap2_pm_init(void) 50 { 51 return 0; 52 } 53 #endif 54 55 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 56 int omap3_pm_init(void); 57 #else 58 static inline int omap3_pm_init(void) 59 { 60 return 0; 61 } 62 #endif 63 64 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)) 65 int omap4_pm_init(void); 66 int omap4_pm_init_early(void); 67 #else 68 static inline int omap4_pm_init(void) 69 { 70 return 0; 71 } 72 73 static inline int omap4_pm_init_early(void) 74 { 75 return 0; 76 } 77 #endif 78 79 #ifdef CONFIG_OMAP_MUX 80 int omap_mux_late_init(void); 81 #else 82 static inline int omap_mux_late_init(void) 83 { 84 return 0; 85 } 86 #endif 87 88 extern void omap2_init_common_infrastructure(void); 89 90 extern void omap2_sync32k_timer_init(void); 91 extern void omap3_sync32k_timer_init(void); 92 extern void omap3_secure_sync32k_timer_init(void); 93 extern void omap3_gptimer_timer_init(void); 94 extern void omap4_local_timer_init(void); 95 #ifdef CONFIG_CACHE_L2X0 96 int omap_l2_cache_init(void); 97 #else 98 static inline int omap_l2_cache_init(void) 99 { 100 return 0; 101 } 102 #endif 103 extern void omap5_realtime_timer_init(void); 104 105 void omap2420_init_early(void); 106 void omap2430_init_early(void); 107 void omap3430_init_early(void); 108 void omap35xx_init_early(void); 109 void omap3630_init_early(void); 110 void omap3_init_early(void); /* Do not use this one */ 111 void am33xx_init_early(void); 112 void am35xx_init_early(void); 113 void ti814x_init_early(void); 114 void ti816x_init_early(void); 115 void am33xx_init_early(void); 116 void am43xx_init_early(void); 117 void am43xx_init_late(void); 118 void omap4430_init_early(void); 119 void omap5_init_early(void); 120 void omap3_init_late(void); /* Do not use this one */ 121 void omap4430_init_late(void); 122 void omap2420_init_late(void); 123 void omap2430_init_late(void); 124 void omap3430_init_late(void); 125 void omap35xx_init_late(void); 126 void omap3630_init_late(void); 127 void am35xx_init_late(void); 128 void ti81xx_init_late(void); 129 void am33xx_init_late(void); 130 void omap5_init_late(void); 131 int omap2_common_pm_late_init(void); 132 void dra7xx_init_early(void); 133 void dra7xx_init_late(void); 134 135 #ifdef CONFIG_SOC_BUS 136 void omap_soc_device_init(void); 137 #else 138 static inline void omap_soc_device_init(void) 139 { 140 } 141 #endif 142 143 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 144 void omap2xxx_restart(enum reboot_mode mode, const char *cmd); 145 #else 146 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd) 147 { 148 } 149 #endif 150 151 #ifdef CONFIG_SOC_AM33XX 152 void am33xx_restart(enum reboot_mode mode, const char *cmd); 153 #else 154 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd) 155 { 156 } 157 #endif 158 159 #ifdef CONFIG_ARCH_OMAP3 160 void omap3xxx_restart(enum reboot_mode mode, const char *cmd); 161 #else 162 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd) 163 { 164 } 165 #endif 166 167 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ 168 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) 169 void omap44xx_restart(enum reboot_mode mode, const char *cmd); 170 #else 171 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 172 { 173 } 174 #endif 175 176 /* This gets called from mach-omap2/io.c, do not call this */ 177 void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 178 179 void __init omap242x_map_io(void); 180 void __init omap243x_map_io(void); 181 void __init omap3_map_io(void); 182 void __init am33xx_map_io(void); 183 void __init omap4_map_io(void); 184 void __init omap5_map_io(void); 185 void __init ti81xx_map_io(void); 186 187 /* omap_barriers_init() is OMAP4 only */ 188 void omap_barriers_init(void); 189 190 /** 191 * omap_test_timeout - busy-loop, testing a condition 192 * @cond: condition to test until it evaluates to true 193 * @timeout: maximum number of microseconds in the timeout 194 * @index: loop index (integer) 195 * 196 * Loop waiting for @cond to become true or until at least @timeout 197 * microseconds have passed. To use, define some integer @index in the 198 * calling code. After running, if @index == @timeout, then the loop has 199 * timed out. 200 */ 201 #define omap_test_timeout(cond, timeout, index) \ 202 ({ \ 203 for (index = 0; index < timeout; index++) { \ 204 if (cond) \ 205 break; \ 206 udelay(1); \ 207 } \ 208 }) 209 210 extern struct device *omap2_get_mpuss_device(void); 211 extern struct device *omap2_get_iva_device(void); 212 extern struct device *omap2_get_l3_device(void); 213 extern struct device *omap4_get_dsp_device(void); 214 215 void omap_gic_of_init(void); 216 217 #ifdef CONFIG_CACHE_L2X0 218 extern void __iomem *omap4_get_l2cache_base(void); 219 #endif 220 221 struct device_node; 222 223 #ifdef CONFIG_SMP 224 extern void __iomem *omap4_get_scu_base(void); 225 #else 226 static inline void __iomem *omap4_get_scu_base(void) 227 { 228 return NULL; 229 } 230 #endif 231 232 extern void gic_dist_disable(void); 233 extern void gic_dist_enable(void); 234 extern bool gic_dist_disabled(void); 235 extern void gic_timer_retrigger(void); 236 extern void omap_smc1(u32 fn, u32 arg); 237 extern void __iomem *omap4_get_sar_ram_base(void); 238 extern void omap_do_wfi(void); 239 240 #ifdef CONFIG_SMP 241 /* Needed for secondary core boot */ 242 extern void omap4_secondary_startup(void); 243 extern void omap4460_secondary_startup(void); 244 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 245 extern void omap_auxcoreboot_addr(u32 cpu_addr); 246 extern u32 omap_read_auxcoreboot0(void); 247 248 extern void omap4_cpu_die(unsigned int cpu); 249 250 extern struct smp_operations omap4_smp_ops; 251 252 extern void omap5_secondary_startup(void); 253 #endif 254 255 #if defined(CONFIG_SMP) && defined(CONFIG_PM) 256 extern int omap4_mpuss_init(void); 257 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); 258 extern int omap4_finish_suspend(unsigned long cpu_state); 259 extern void omap4_cpu_resume(void); 260 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 261 #else 262 static inline int omap4_enter_lowpower(unsigned int cpu, 263 unsigned int power_state) 264 { 265 cpu_do_idle(); 266 return 0; 267 } 268 269 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 270 { 271 cpu_do_idle(); 272 return 0; 273 } 274 275 static inline int omap4_mpuss_init(void) 276 { 277 return 0; 278 } 279 280 static inline int omap4_finish_suspend(unsigned long cpu_state) 281 { 282 return 0; 283 } 284 285 static inline void omap4_cpu_resume(void) 286 {} 287 288 #endif 289 290 void pdata_quirks_init(const struct of_device_id *); 291 void omap_auxdata_legacy_init(struct device *dev); 292 void omap_pcs_legacy_init(int irq, void (*rearm)(void)); 293 294 struct omap_sdrc_params; 295 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 296 struct omap_sdrc_params *sdrc_cs1); 297 struct omap2_hsmmc_info; 298 extern void omap_reserve(void); 299 300 struct omap_hwmod; 301 extern int omap_dss_reset(struct omap_hwmod *); 302 303 /* SoC specific clock initializer */ 304 int omap_clk_init(void); 305 306 int __init omapdss_init_of(void); 307 void __init omapdss_early_init_of(void); 308 309 #endif /* __ASSEMBLER__ */ 310 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 311