1 /* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27 #ifndef __ASSEMBLER__ 28 29 #include <linux/irq.h> 30 #include <linux/delay.h> 31 #include <linux/i2c.h> 32 #include <linux/i2c/twl.h> 33 #include <linux/i2c-omap.h> 34 35 #include <asm/proc-fns.h> 36 37 #include "i2c.h" 38 #include "serial.h" 39 40 #include "usb.h" 41 42 #define OMAP_INTC_START NR_IRQS 43 44 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 45 int omap2_pm_init(void); 46 #else 47 static inline int omap2_pm_init(void) 48 { 49 return 0; 50 } 51 #endif 52 53 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 54 int omap3_pm_init(void); 55 #else 56 static inline int omap3_pm_init(void) 57 { 58 return 0; 59 } 60 #endif 61 62 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 63 int omap4_pm_init(void); 64 #else 65 static inline int omap4_pm_init(void) 66 { 67 return 0; 68 } 69 #endif 70 71 #ifdef CONFIG_OMAP_MUX 72 int omap_mux_late_init(void); 73 #else 74 static inline int omap_mux_late_init(void) 75 { 76 return 0; 77 } 78 #endif 79 80 extern void omap2_init_common_infrastructure(void); 81 82 extern void omap2_sync32k_timer_init(void); 83 extern void omap3_sync32k_timer_init(void); 84 extern void omap3_secure_sync32k_timer_init(void); 85 extern void omap3_gp_gptimer_timer_init(void); 86 extern void omap3_am33xx_gptimer_timer_init(void); 87 extern void omap4_local_timer_init(void); 88 extern void omap5_realtime_timer_init(void); 89 90 void omap2420_init_early(void); 91 void omap2430_init_early(void); 92 void omap3430_init_early(void); 93 void omap35xx_init_early(void); 94 void omap3630_init_early(void); 95 void omap3_init_early(void); /* Do not use this one */ 96 void am33xx_init_early(void); 97 void am35xx_init_early(void); 98 void ti81xx_init_early(void); 99 void am33xx_init_early(void); 100 void omap4430_init_early(void); 101 void omap5_init_early(void); 102 void omap3_init_late(void); /* Do not use this one */ 103 void omap4430_init_late(void); 104 void omap2420_init_late(void); 105 void omap2430_init_late(void); 106 void omap3430_init_late(void); 107 void omap35xx_init_late(void); 108 void omap3630_init_late(void); 109 void am35xx_init_late(void); 110 void ti81xx_init_late(void); 111 int omap2_common_pm_late_init(void); 112 113 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 114 void omap2xxx_restart(char mode, const char *cmd); 115 #else 116 static inline void omap2xxx_restart(char mode, const char *cmd) 117 { 118 } 119 #endif 120 121 #ifdef CONFIG_SOC_AM33XX 122 void am33xx_restart(char mode, const char *cmd); 123 #else 124 static inline void am33xx_restart(char mode, const char *cmd) 125 { 126 } 127 #endif 128 129 #ifdef CONFIG_ARCH_OMAP3 130 void omap3xxx_restart(char mode, const char *cmd); 131 #else 132 static inline void omap3xxx_restart(char mode, const char *cmd) 133 { 134 } 135 #endif 136 137 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 138 void omap44xx_restart(char mode, const char *cmd); 139 #else 140 static inline void omap44xx_restart(char mode, const char *cmd) 141 { 142 } 143 #endif 144 145 /* This gets called from mach-omap2/io.c, do not call this */ 146 void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 147 148 void __init omap242x_map_io(void); 149 void __init omap243x_map_io(void); 150 void __init omap3_map_io(void); 151 void __init am33xx_map_io(void); 152 void __init omap4_map_io(void); 153 void __init omap5_map_io(void); 154 void __init ti81xx_map_io(void); 155 156 /* omap_barriers_init() is OMAP4 only */ 157 void omap_barriers_init(void); 158 159 /** 160 * omap_test_timeout - busy-loop, testing a condition 161 * @cond: condition to test until it evaluates to true 162 * @timeout: maximum number of microseconds in the timeout 163 * @index: loop index (integer) 164 * 165 * Loop waiting for @cond to become true or until at least @timeout 166 * microseconds have passed. To use, define some integer @index in the 167 * calling code. After running, if @index == @timeout, then the loop has 168 * timed out. 169 */ 170 #define omap_test_timeout(cond, timeout, index) \ 171 ({ \ 172 for (index = 0; index < timeout; index++) { \ 173 if (cond) \ 174 break; \ 175 udelay(1); \ 176 } \ 177 }) 178 179 extern struct device *omap2_get_mpuss_device(void); 180 extern struct device *omap2_get_iva_device(void); 181 extern struct device *omap2_get_l3_device(void); 182 extern struct device *omap4_get_dsp_device(void); 183 184 void omap2_init_irq(void); 185 void omap3_init_irq(void); 186 void ti81xx_init_irq(void); 187 extern int omap_irq_pending(void); 188 void omap_intc_save_context(void); 189 void omap_intc_restore_context(void); 190 void omap3_intc_suspend(void); 191 void omap3_intc_prepare_idle(void); 192 void omap3_intc_resume_idle(void); 193 void omap2_intc_handle_irq(struct pt_regs *regs); 194 void omap3_intc_handle_irq(struct pt_regs *regs); 195 void omap_intc_of_init(void); 196 void omap_gic_of_init(void); 197 198 #ifdef CONFIG_CACHE_L2X0 199 extern void __iomem *omap4_get_l2cache_base(void); 200 #endif 201 202 struct device_node; 203 #ifdef CONFIG_OF 204 int __init intc_of_init(struct device_node *node, 205 struct device_node *parent); 206 #else 207 int __init intc_of_init(struct device_node *node, 208 struct device_node *parent) 209 { 210 return 0; 211 } 212 #endif 213 214 #ifdef CONFIG_SMP 215 extern void __iomem *omap4_get_scu_base(void); 216 #else 217 static inline void __iomem *omap4_get_scu_base(void) 218 { 219 return NULL; 220 } 221 #endif 222 223 extern void __init gic_init_irq(void); 224 extern void gic_dist_disable(void); 225 extern bool gic_dist_disabled(void); 226 extern void gic_timer_retrigger(void); 227 extern void omap_smc1(u32 fn, u32 arg); 228 extern void __iomem *omap4_get_sar_ram_base(void); 229 extern void omap_do_wfi(void); 230 231 #ifdef CONFIG_SMP 232 /* Needed for secondary core boot */ 233 extern void omap_secondary_startup(void); 234 extern void omap_secondary_startup_4460(void); 235 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 236 extern void omap_auxcoreboot_addr(u32 cpu_addr); 237 extern u32 omap_read_auxcoreboot0(void); 238 239 extern void omap4_cpu_die(unsigned int cpu); 240 241 extern struct smp_operations omap4_smp_ops; 242 243 extern void omap5_secondary_startup(void); 244 #endif 245 246 #if defined(CONFIG_SMP) && defined(CONFIG_PM) 247 extern int omap4_mpuss_init(void); 248 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); 249 extern int omap4_finish_suspend(unsigned long cpu_state); 250 extern void omap4_cpu_resume(void); 251 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 252 extern u32 omap4_mpuss_read_prev_context_state(void); 253 #else 254 static inline int omap4_enter_lowpower(unsigned int cpu, 255 unsigned int power_state) 256 { 257 cpu_do_idle(); 258 return 0; 259 } 260 261 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 262 { 263 cpu_do_idle(); 264 return 0; 265 } 266 267 static inline int omap4_mpuss_init(void) 268 { 269 return 0; 270 } 271 272 static inline int omap4_finish_suspend(unsigned long cpu_state) 273 { 274 return 0; 275 } 276 277 static inline void omap4_cpu_resume(void) 278 {} 279 280 static inline u32 omap4_mpuss_read_prev_context_state(void) 281 { 282 return 0; 283 } 284 #endif 285 286 struct omap_sdrc_params; 287 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 288 struct omap_sdrc_params *sdrc_cs1); 289 struct omap2_hsmmc_info; 290 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers); 291 extern void omap_reserve(void); 292 293 struct omap_hwmod; 294 extern int omap_dss_reset(struct omap_hwmod *); 295 296 #endif /* __ASSEMBLER__ */ 297 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 298