1 /* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27 #ifndef __ASSEMBLER__ 28 29 #include <linux/irq.h> 30 #include <linux/delay.h> 31 #include <linux/i2c.h> 32 #include <linux/i2c/twl.h> 33 #include <linux/i2c-omap.h> 34 #include <linux/reboot.h> 35 36 #include <asm/proc-fns.h> 37 38 #include "i2c.h" 39 #include "serial.h" 40 41 #include "usb.h" 42 43 #define OMAP_INTC_START NR_IRQS 44 45 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 46 int omap2_pm_init(void); 47 #else 48 static inline int omap2_pm_init(void) 49 { 50 return 0; 51 } 52 #endif 53 54 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 55 int omap3_pm_init(void); 56 #else 57 static inline int omap3_pm_init(void) 58 { 59 return 0; 60 } 61 #endif 62 63 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 64 int omap4_pm_init(void); 65 #else 66 static inline int omap4_pm_init(void) 67 { 68 return 0; 69 } 70 #endif 71 72 #ifdef CONFIG_OMAP_MUX 73 int omap_mux_late_init(void); 74 #else 75 static inline int omap_mux_late_init(void) 76 { 77 return 0; 78 } 79 #endif 80 81 extern void omap2_init_common_infrastructure(void); 82 83 extern void omap2_sync32k_timer_init(void); 84 extern void omap3_sync32k_timer_init(void); 85 extern void omap3_secure_sync32k_timer_init(void); 86 extern void omap3_gptimer_timer_init(void); 87 extern void omap4_local_timer_init(void); 88 extern void omap5_realtime_timer_init(void); 89 90 void omap2420_init_early(void); 91 void omap2430_init_early(void); 92 void omap3430_init_early(void); 93 void omap35xx_init_early(void); 94 void omap3630_init_early(void); 95 void omap3_init_early(void); /* Do not use this one */ 96 void am33xx_init_early(void); 97 void am35xx_init_early(void); 98 void ti81xx_init_early(void); 99 void am33xx_init_early(void); 100 void am43xx_init_early(void); 101 void am43xx_init_late(void); 102 void omap4430_init_early(void); 103 void omap5_init_early(void); 104 void omap3_init_late(void); /* Do not use this one */ 105 void omap4430_init_late(void); 106 void omap2420_init_late(void); 107 void omap2430_init_late(void); 108 void omap3430_init_late(void); 109 void omap35xx_init_late(void); 110 void omap3630_init_late(void); 111 void am35xx_init_late(void); 112 void ti81xx_init_late(void); 113 void am33xx_init_late(void); 114 void omap5_init_late(void); 115 int omap2_common_pm_late_init(void); 116 void dra7xx_init_early(void); 117 void dra7xx_init_late(void); 118 119 #ifdef CONFIG_SOC_BUS 120 void omap_soc_device_init(void); 121 #else 122 static inline void omap_soc_device_init(void) 123 { 124 } 125 #endif 126 127 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 128 void omap2xxx_restart(enum reboot_mode mode, const char *cmd); 129 #else 130 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd) 131 { 132 } 133 #endif 134 135 #ifdef CONFIG_SOC_AM33XX 136 void am33xx_restart(enum reboot_mode mode, const char *cmd); 137 #else 138 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd) 139 { 140 } 141 #endif 142 143 #ifdef CONFIG_ARCH_OMAP3 144 void omap3xxx_restart(enum reboot_mode mode, const char *cmd); 145 #else 146 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd) 147 { 148 } 149 #endif 150 151 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 152 void omap44xx_restart(enum reboot_mode mode, const char *cmd); 153 #else 154 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 155 { 156 } 157 #endif 158 159 /* This gets called from mach-omap2/io.c, do not call this */ 160 void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 161 162 void __init omap242x_map_io(void); 163 void __init omap243x_map_io(void); 164 void __init omap3_map_io(void); 165 void __init am33xx_map_io(void); 166 void __init omap4_map_io(void); 167 void __init omap5_map_io(void); 168 void __init ti81xx_map_io(void); 169 170 /* omap_barriers_init() is OMAP4 only */ 171 void omap_barriers_init(void); 172 173 /** 174 * omap_test_timeout - busy-loop, testing a condition 175 * @cond: condition to test until it evaluates to true 176 * @timeout: maximum number of microseconds in the timeout 177 * @index: loop index (integer) 178 * 179 * Loop waiting for @cond to become true or until at least @timeout 180 * microseconds have passed. To use, define some integer @index in the 181 * calling code. After running, if @index == @timeout, then the loop has 182 * timed out. 183 */ 184 #define omap_test_timeout(cond, timeout, index) \ 185 ({ \ 186 for (index = 0; index < timeout; index++) { \ 187 if (cond) \ 188 break; \ 189 udelay(1); \ 190 } \ 191 }) 192 193 extern struct device *omap2_get_mpuss_device(void); 194 extern struct device *omap2_get_iva_device(void); 195 extern struct device *omap2_get_l3_device(void); 196 extern struct device *omap4_get_dsp_device(void); 197 198 void omap2_init_irq(void); 199 void omap3_init_irq(void); 200 void ti81xx_init_irq(void); 201 extern int omap_irq_pending(void); 202 void omap_intc_save_context(void); 203 void omap_intc_restore_context(void); 204 void omap3_intc_suspend(void); 205 void omap3_intc_prepare_idle(void); 206 void omap3_intc_resume_idle(void); 207 void omap2_intc_handle_irq(struct pt_regs *regs); 208 void omap3_intc_handle_irq(struct pt_regs *regs); 209 void omap_intc_of_init(void); 210 void omap_gic_of_init(void); 211 212 #ifdef CONFIG_CACHE_L2X0 213 extern void __iomem *omap4_get_l2cache_base(void); 214 #endif 215 216 struct device_node; 217 #ifdef CONFIG_OF 218 int __init intc_of_init(struct device_node *node, 219 struct device_node *parent); 220 #else 221 int __init intc_of_init(struct device_node *node, 222 struct device_node *parent) 223 { 224 return 0; 225 } 226 #endif 227 228 #ifdef CONFIG_SMP 229 extern void __iomem *omap4_get_scu_base(void); 230 #else 231 static inline void __iomem *omap4_get_scu_base(void) 232 { 233 return NULL; 234 } 235 #endif 236 237 extern void __init gic_init_irq(void); 238 extern void gic_dist_disable(void); 239 extern void gic_dist_enable(void); 240 extern bool gic_dist_disabled(void); 241 extern void gic_timer_retrigger(void); 242 extern void omap_smc1(u32 fn, u32 arg); 243 extern void __iomem *omap4_get_sar_ram_base(void); 244 extern void omap_do_wfi(void); 245 246 #ifdef CONFIG_SMP 247 /* Needed for secondary core boot */ 248 extern void omap4_secondary_startup(void); 249 extern void omap4460_secondary_startup(void); 250 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 251 extern void omap_auxcoreboot_addr(u32 cpu_addr); 252 extern u32 omap_read_auxcoreboot0(void); 253 254 extern void omap4_cpu_die(unsigned int cpu); 255 256 extern struct smp_operations omap4_smp_ops; 257 258 extern void omap5_secondary_startup(void); 259 #endif 260 261 #if defined(CONFIG_SMP) && defined(CONFIG_PM) 262 extern int omap4_mpuss_init(void); 263 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); 264 extern int omap4_finish_suspend(unsigned long cpu_state); 265 extern void omap4_cpu_resume(void); 266 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 267 #else 268 static inline int omap4_enter_lowpower(unsigned int cpu, 269 unsigned int power_state) 270 { 271 cpu_do_idle(); 272 return 0; 273 } 274 275 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 276 { 277 cpu_do_idle(); 278 return 0; 279 } 280 281 static inline int omap4_mpuss_init(void) 282 { 283 return 0; 284 } 285 286 static inline int omap4_finish_suspend(unsigned long cpu_state) 287 { 288 return 0; 289 } 290 291 static inline void omap4_cpu_resume(void) 292 {} 293 294 #endif 295 296 void pdata_quirks_init(struct of_device_id *); 297 void omap_auxdata_legacy_init(struct device *dev); 298 void omap_pcs_legacy_init(int irq, void (*rearm)(void)); 299 300 struct omap_sdrc_params; 301 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 302 struct omap_sdrc_params *sdrc_cs1); 303 struct omap2_hsmmc_info; 304 extern void omap_reserve(void); 305 306 struct omap_hwmod; 307 extern int omap_dss_reset(struct omap_hwmod *); 308 309 /* SoC specific clock initializer */ 310 int omap_clk_init(void); 311 312 #endif /* __ASSEMBLER__ */ 313 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 314