1 /* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27 #ifndef __ASSEMBLER__ 28 29 #include <linux/irq.h> 30 #include <linux/delay.h> 31 #include <linux/i2c.h> 32 #include <linux/i2c/twl.h> 33 #include <linux/i2c-omap.h> 34 #include <linux/reboot.h> 35 36 #include <asm/proc-fns.h> 37 38 #include "i2c.h" 39 #include "serial.h" 40 41 #include "usb.h" 42 43 #define OMAP_INTC_START NR_IRQS 44 45 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 46 int omap2_pm_init(void); 47 #else 48 static inline int omap2_pm_init(void) 49 { 50 return 0; 51 } 52 #endif 53 54 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 55 int omap3_pm_init(void); 56 #else 57 static inline int omap3_pm_init(void) 58 { 59 return 0; 60 } 61 #endif 62 63 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 64 int omap4_pm_init(void); 65 #else 66 static inline int omap4_pm_init(void) 67 { 68 return 0; 69 } 70 #endif 71 72 #ifdef CONFIG_OMAP_MUX 73 int omap_mux_late_init(void); 74 #else 75 static inline int omap_mux_late_init(void) 76 { 77 return 0; 78 } 79 #endif 80 81 extern void omap2_init_common_infrastructure(void); 82 83 extern void omap2_sync32k_timer_init(void); 84 extern void omap3_sync32k_timer_init(void); 85 extern void omap3_secure_sync32k_timer_init(void); 86 extern void omap3_gptimer_timer_init(void); 87 extern void omap4_local_timer_init(void); 88 extern void omap5_realtime_timer_init(void); 89 90 void omap2420_init_early(void); 91 void omap2430_init_early(void); 92 void omap3430_init_early(void); 93 void omap35xx_init_early(void); 94 void omap3630_init_early(void); 95 void omap3_init_early(void); /* Do not use this one */ 96 void am33xx_init_early(void); 97 void am35xx_init_early(void); 98 void ti81xx_init_early(void); 99 void am33xx_init_early(void); 100 void am43xx_init_early(void); 101 void omap4430_init_early(void); 102 void omap5_init_early(void); 103 void omap3_init_late(void); /* Do not use this one */ 104 void omap4430_init_late(void); 105 void omap2420_init_late(void); 106 void omap2430_init_late(void); 107 void omap3430_init_late(void); 108 void omap35xx_init_late(void); 109 void omap3630_init_late(void); 110 void am35xx_init_late(void); 111 void ti81xx_init_late(void); 112 int omap2_common_pm_late_init(void); 113 114 #ifdef CONFIG_SOC_BUS 115 void omap_soc_device_init(void); 116 #else 117 static inline void omap_soc_device_init(void) 118 { 119 } 120 #endif 121 122 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 123 void omap2xxx_restart(enum reboot_mode mode, const char *cmd); 124 #else 125 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd) 126 { 127 } 128 #endif 129 130 #ifdef CONFIG_SOC_AM33XX 131 void am33xx_restart(enum reboot_mode mode, const char *cmd); 132 #else 133 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd) 134 { 135 } 136 #endif 137 138 #ifdef CONFIG_ARCH_OMAP3 139 void omap3xxx_restart(enum reboot_mode mode, const char *cmd); 140 #else 141 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd) 142 { 143 } 144 #endif 145 146 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 147 void omap44xx_restart(enum reboot_mode mode, const char *cmd); 148 #else 149 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 150 { 151 } 152 #endif 153 154 /* This gets called from mach-omap2/io.c, do not call this */ 155 void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 156 157 void __init omap242x_map_io(void); 158 void __init omap243x_map_io(void); 159 void __init omap3_map_io(void); 160 void __init am33xx_map_io(void); 161 void __init omap4_map_io(void); 162 void __init omap5_map_io(void); 163 void __init ti81xx_map_io(void); 164 165 /* omap_barriers_init() is OMAP4 only */ 166 void omap_barriers_init(void); 167 168 /** 169 * omap_test_timeout - busy-loop, testing a condition 170 * @cond: condition to test until it evaluates to true 171 * @timeout: maximum number of microseconds in the timeout 172 * @index: loop index (integer) 173 * 174 * Loop waiting for @cond to become true or until at least @timeout 175 * microseconds have passed. To use, define some integer @index in the 176 * calling code. After running, if @index == @timeout, then the loop has 177 * timed out. 178 */ 179 #define omap_test_timeout(cond, timeout, index) \ 180 ({ \ 181 for (index = 0; index < timeout; index++) { \ 182 if (cond) \ 183 break; \ 184 udelay(1); \ 185 } \ 186 }) 187 188 extern struct device *omap2_get_mpuss_device(void); 189 extern struct device *omap2_get_iva_device(void); 190 extern struct device *omap2_get_l3_device(void); 191 extern struct device *omap4_get_dsp_device(void); 192 193 void omap2_init_irq(void); 194 void omap3_init_irq(void); 195 void ti81xx_init_irq(void); 196 extern int omap_irq_pending(void); 197 void omap_intc_save_context(void); 198 void omap_intc_restore_context(void); 199 void omap3_intc_suspend(void); 200 void omap3_intc_prepare_idle(void); 201 void omap3_intc_resume_idle(void); 202 void omap2_intc_handle_irq(struct pt_regs *regs); 203 void omap3_intc_handle_irq(struct pt_regs *regs); 204 void omap_intc_of_init(void); 205 void omap_gic_of_init(void); 206 207 #ifdef CONFIG_CACHE_L2X0 208 extern void __iomem *omap4_get_l2cache_base(void); 209 #endif 210 211 struct device_node; 212 #ifdef CONFIG_OF 213 int __init intc_of_init(struct device_node *node, 214 struct device_node *parent); 215 #else 216 int __init intc_of_init(struct device_node *node, 217 struct device_node *parent) 218 { 219 return 0; 220 } 221 #endif 222 223 #ifdef CONFIG_SMP 224 extern void __iomem *omap4_get_scu_base(void); 225 #else 226 static inline void __iomem *omap4_get_scu_base(void) 227 { 228 return NULL; 229 } 230 #endif 231 232 extern void __init gic_init_irq(void); 233 extern void gic_dist_disable(void); 234 extern bool gic_dist_disabled(void); 235 extern void gic_timer_retrigger(void); 236 extern void omap_smc1(u32 fn, u32 arg); 237 extern void __iomem *omap4_get_sar_ram_base(void); 238 extern void omap_do_wfi(void); 239 240 #ifdef CONFIG_SMP 241 /* Needed for secondary core boot */ 242 extern void omap4_secondary_startup(void); 243 extern void omap4460_secondary_startup(void); 244 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 245 extern void omap_auxcoreboot_addr(u32 cpu_addr); 246 extern u32 omap_read_auxcoreboot0(void); 247 248 extern void omap4_cpu_die(unsigned int cpu); 249 250 extern struct smp_operations omap4_smp_ops; 251 252 extern void omap5_secondary_startup(void); 253 #endif 254 255 #if defined(CONFIG_SMP) && defined(CONFIG_PM) 256 extern int omap4_mpuss_init(void); 257 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); 258 extern int omap4_finish_suspend(unsigned long cpu_state); 259 extern void omap4_cpu_resume(void); 260 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 261 #else 262 static inline int omap4_enter_lowpower(unsigned int cpu, 263 unsigned int power_state) 264 { 265 cpu_do_idle(); 266 return 0; 267 } 268 269 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 270 { 271 cpu_do_idle(); 272 return 0; 273 } 274 275 static inline int omap4_mpuss_init(void) 276 { 277 return 0; 278 } 279 280 static inline int omap4_finish_suspend(unsigned long cpu_state) 281 { 282 return 0; 283 } 284 285 static inline void omap4_cpu_resume(void) 286 {} 287 288 #endif 289 290 struct omap_sdrc_params; 291 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 292 struct omap_sdrc_params *sdrc_cs1); 293 struct omap2_hsmmc_info; 294 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers); 295 extern void omap_reserve(void); 296 297 struct omap_hwmod; 298 extern int omap_dss_reset(struct omap_hwmod *); 299 300 /* SoC specific clock initializer */ 301 extern int (*omap_clk_init)(void); 302 303 #endif /* __ASSEMBLER__ */ 304 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 305