1 /* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27 #ifndef __ASSEMBLER__ 28 29 #include <linux/irq.h> 30 #include <linux/delay.h> 31 #include <linux/i2c.h> 32 #include <linux/mfd/twl.h> 33 #include <linux/platform_data/i2c-omap.h> 34 #include <linux/reboot.h> 35 #include <linux/irqchip/irq-omap-intc.h> 36 37 #include <asm/proc-fns.h> 38 #include <asm/hardware/cache-l2x0.h> 39 40 #include "i2c.h" 41 42 #define OMAP_INTC_START NR_IRQS 43 44 extern int (*omap_pm_soc_init)(void); 45 int omap_pm_nop_init(void); 46 47 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 48 int omap3_pm_init(void); 49 #else 50 static inline int omap3_pm_init(void) 51 { 52 return 0; 53 } 54 #endif 55 56 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)) 57 int omap4_pm_init(void); 58 int omap4_pm_init_early(void); 59 #else 60 static inline int omap4_pm_init(void) 61 { 62 return 0; 63 } 64 65 static inline int omap4_pm_init_early(void) 66 { 67 return 0; 68 } 69 #endif 70 71 #if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \ 72 defined(CONFIG_SOC_AM43XX)) 73 int amx3_common_pm_init(void); 74 #else 75 static inline int amx3_common_pm_init(void) 76 { 77 return 0; 78 } 79 #endif 80 81 #ifdef CONFIG_CACHE_L2X0 82 int omap_l2_cache_init(void); 83 #define OMAP_L2C_AUX_CTRL (L2C_AUX_CTRL_SHARED_OVERRIDE | \ 84 L310_AUX_CTRL_DATA_PREFETCH | \ 85 L310_AUX_CTRL_INSTR_PREFETCH) 86 void omap4_l2c310_write_sec(unsigned long val, unsigned reg); 87 #else 88 static inline int omap_l2_cache_init(void) 89 { 90 return 0; 91 } 92 93 #define OMAP_L2C_AUX_CTRL 0 94 #define omap4_l2c310_write_sec NULL 95 #endif 96 97 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER 98 extern void omap5_realtime_timer_init(void); 99 #else 100 static inline void omap5_realtime_timer_init(void) 101 { 102 } 103 #endif 104 105 void omap2420_init_early(void); 106 void omap2430_init_early(void); 107 void omap3430_init_early(void); 108 void omap3630_init_early(void); 109 void am33xx_init_early(void); 110 void am35xx_init_early(void); 111 void ti814x_init_early(void); 112 void ti816x_init_early(void); 113 void am43xx_init_early(void); 114 void am43xx_init_late(void); 115 void omap4430_init_early(void); 116 void omap5_init_early(void); 117 void omap3_init_late(void); 118 void omap4430_init_late(void); 119 void ti81xx_init_late(void); 120 void am33xx_init_late(void); 121 void omap5_init_late(void); 122 void dra7xx_init_early(void); 123 void dra7xx_init_late(void); 124 125 #ifdef CONFIG_SOC_BUS 126 void omap_soc_device_init(void); 127 #else 128 static inline void omap_soc_device_init(void) 129 { 130 } 131 #endif 132 133 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 134 void omap2xxx_restart(enum reboot_mode mode, const char *cmd); 135 #else 136 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd) 137 { 138 } 139 #endif 140 141 #ifdef CONFIG_SOC_AM33XX 142 void am33xx_restart(enum reboot_mode mode, const char *cmd); 143 #else 144 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd) 145 { 146 } 147 #endif 148 149 #ifdef CONFIG_ARCH_OMAP3 150 void omap3xxx_restart(enum reboot_mode mode, const char *cmd); 151 #else 152 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd) 153 { 154 } 155 #endif 156 157 #ifdef CONFIG_SOC_TI81XX 158 void ti81xx_restart(enum reboot_mode mode, const char *cmd); 159 #else 160 static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd) 161 { 162 } 163 #endif 164 165 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ 166 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) 167 void omap44xx_restart(enum reboot_mode mode, const char *cmd); 168 #else 169 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 170 { 171 } 172 #endif 173 174 #ifdef CONFIG_OMAP_INTERCONNECT_BARRIER 175 void omap_barrier_reserve_memblock(void); 176 void omap_barriers_init(void); 177 #else 178 static inline void omap_barrier_reserve_memblock(void) 179 { 180 } 181 #endif 182 183 /* This gets called from mach-omap2/io.c, do not call this */ 184 void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 185 186 void __init omap242x_map_io(void); 187 void __init omap243x_map_io(void); 188 void __init omap3_map_io(void); 189 void __init am33xx_map_io(void); 190 void __init omap4_map_io(void); 191 void __init omap5_map_io(void); 192 void __init dra7xx_map_io(void); 193 void __init ti81xx_map_io(void); 194 195 /** 196 * omap_test_timeout - busy-loop, testing a condition 197 * @cond: condition to test until it evaluates to true 198 * @timeout: maximum number of microseconds in the timeout 199 * @index: loop index (integer) 200 * 201 * Loop waiting for @cond to become true or until at least @timeout 202 * microseconds have passed. To use, define some integer @index in the 203 * calling code. After running, if @index == @timeout, then the loop has 204 * timed out. 205 */ 206 #define omap_test_timeout(cond, timeout, index) \ 207 ({ \ 208 for (index = 0; index < timeout; index++) { \ 209 if (cond) \ 210 break; \ 211 udelay(1); \ 212 } \ 213 }) 214 215 void omap_gic_of_init(void); 216 217 #ifdef CONFIG_CACHE_L2X0 218 extern void __iomem *omap4_get_l2cache_base(void); 219 #endif 220 221 struct device_node; 222 223 #ifdef CONFIG_SMP 224 extern void __iomem *omap4_get_scu_base(void); 225 #else 226 static inline void __iomem *omap4_get_scu_base(void) 227 { 228 return NULL; 229 } 230 #endif 231 232 extern void gic_dist_disable(void); 233 extern void gic_dist_enable(void); 234 extern bool gic_dist_disabled(void); 235 extern void gic_timer_retrigger(void); 236 extern void _omap_smc1(u32 fn, u32 arg); 237 extern void omap4_sar_ram_init(void); 238 extern void __iomem *omap4_get_sar_ram_base(void); 239 extern void omap4_mpuss_early_init(void); 240 extern void omap_do_wfi(void); 241 extern void omap_interconnect_sync(void); 242 243 #ifdef CONFIG_SMP 244 /* Needed for secondary core boot */ 245 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 246 extern void omap_auxcoreboot_addr(u32 cpu_addr); 247 extern u32 omap_read_auxcoreboot0(void); 248 249 extern void omap4_cpu_die(unsigned int cpu); 250 extern int omap4_cpu_kill(unsigned int cpu); 251 252 extern const struct smp_operations omap4_smp_ops; 253 #endif 254 255 extern u32 omap4_get_cpu1_ns_pa_addr(void); 256 257 #if defined(CONFIG_SMP) && defined(CONFIG_PM) 258 extern int omap4_mpuss_init(void); 259 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state, 260 bool rcuidle); 261 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 262 #else 263 static inline int omap4_enter_lowpower(unsigned int cpu, 264 unsigned int power_state, 265 bool rcuidle) 266 { 267 cpu_do_idle(); 268 return 0; 269 } 270 271 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 272 { 273 cpu_do_idle(); 274 return 0; 275 } 276 277 static inline int omap4_mpuss_init(void) 278 { 279 return 0; 280 } 281 282 #endif 283 284 #ifdef CONFIG_ARCH_OMAP4 285 void omap4_secondary_startup(void); 286 void omap4460_secondary_startup(void); 287 int omap4_finish_suspend(unsigned long cpu_state); 288 void omap4_cpu_resume(void); 289 #else 290 static inline void omap4_secondary_startup(void) 291 { 292 } 293 294 static inline void omap4460_secondary_startup(void) 295 { 296 } 297 static inline int omap4_finish_suspend(unsigned long cpu_state) 298 { 299 return 0; 300 } 301 static inline void omap4_cpu_resume(void) 302 { 303 } 304 #endif 305 306 #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) 307 void omap5_secondary_startup(void); 308 void omap5_secondary_hyp_startup(void); 309 #else 310 static inline void omap5_secondary_startup(void) 311 { 312 } 313 314 static inline void omap5_secondary_hyp_startup(void) 315 { 316 } 317 #endif 318 319 struct omap_system_dma_plat_info; 320 321 void pdata_quirks_init(const struct of_device_id *); 322 void omap_auxdata_legacy_init(struct device *dev); 323 void omap_pcs_legacy_init(int irq, void (*rearm)(void)); 324 extern struct omap_system_dma_plat_info dma_plat_info; 325 326 struct omap_sdrc_params; 327 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 328 struct omap_sdrc_params *sdrc_cs1); 329 extern void omap_reserve(void); 330 331 struct omap_hwmod; 332 extern int omap_dss_reset(struct omap_hwmod *); 333 334 /* SoC specific clock initializer */ 335 int omap_clk_init(void); 336 337 #if IS_ENABLED(CONFIG_OMAP_IOMMU) 338 int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request, 339 u8 *pwrst); 340 #else 341 static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, 342 bool request, u8 *pwrst) 343 { 344 return 0; 345 } 346 #endif 347 348 #endif /* __ASSEMBLER__ */ 349 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 350