xref: /linux/arch/arm/mach-omap2/Kconfig (revision 93d90ad708b8da6efc0e487b66111aa9db7f70c7)
1menu "TI OMAP/AM/DM/DRA Family"
2	depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
3
4config ARCH_OMAP2
5	bool "TI OMAP2"
6	depends on ARCH_MULTI_V6
7	select ARCH_OMAP2PLUS
8	select CPU_V6
9	select SOC_HAS_OMAP2_SDRC
10
11config ARCH_OMAP3
12	bool "TI OMAP3"
13	depends on ARCH_MULTI_V7
14	select ARCH_OMAP2PLUS
15	select ARM_CPU_SUSPEND if PM
16	select OMAP_INTERCONNECT
17	select PM_OPP if PM
18	select PM if CPU_IDLE
19	select SOC_HAS_OMAP2_SDRC
20
21config ARCH_OMAP4
22	bool "TI OMAP4"
23	depends on ARCH_MULTI_V7
24	select ARCH_OMAP2PLUS
25	select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
26	select ARM_CPU_SUSPEND if PM
27	select ARM_ERRATA_720789
28	select ARM_GIC
29	select HAVE_ARM_SCU if SMP
30	select HAVE_ARM_TWD if SMP
31	select OMAP_INTERCONNECT
32	select PL310_ERRATA_588369 if CACHE_L2X0
33	select PL310_ERRATA_727915 if CACHE_L2X0
34	select PM_OPP if PM
35	select PM if CPU_IDLE
36	select ARM_ERRATA_754322
37	select ARM_ERRATA_775420
38
39config SOC_OMAP5
40	bool "TI OMAP5"
41	depends on ARCH_MULTI_V7
42	select ARCH_OMAP2PLUS
43	select ARM_CPU_SUSPEND if PM
44	select ARM_GIC
45	select HAVE_ARM_SCU if SMP
46	select HAVE_ARM_TWD if SMP
47	select HAVE_ARM_ARCH_TIMER
48	select ARM_ERRATA_798181 if SMP
49
50config SOC_AM33XX
51	bool "TI AM33XX"
52	depends on ARCH_MULTI_V7
53	select ARCH_OMAP2PLUS
54	select ARM_CPU_SUSPEND if PM
55
56config SOC_AM43XX
57	bool "TI AM43x"
58	depends on ARCH_MULTI_V7
59	select ARCH_OMAP2PLUS
60	select ARM_GIC
61	select MACH_OMAP_GENERIC
62	select MIGHT_HAVE_CACHE_L2X0
63
64config SOC_DRA7XX
65	bool "TI DRA7XX"
66	depends on ARCH_MULTI_V7
67	select ARCH_OMAP2PLUS
68	select ARM_CPU_SUSPEND if PM
69	select ARM_GIC
70	select HAVE_ARM_ARCH_TIMER
71	select IRQ_CROSSBAR
72
73config ARCH_OMAP2PLUS
74	bool
75	select ARCH_HAS_BANDGAP
76	select ARCH_HAS_HOLES_MEMORYMODEL
77	select ARCH_OMAP
78	select ARCH_REQUIRE_GPIOLIB
79	select CLKSRC_MMIO
80	select GENERIC_IRQ_CHIP
81	select MACH_OMAP_GENERIC
82	select MEMORY
83	select OMAP_DM_TIMER
84	select OMAP_GPMC
85	select PINCTRL
86	select SOC_BUS
87	select TI_PRIV_EDMA
88	select OMAP_IRQCHIP
89	help
90	  Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
91
92
93if ARCH_OMAP2PLUS
94
95menu "TI OMAP2/3/4 Specific Features"
96
97config ARCH_OMAP2PLUS_TYPICAL
98	bool "Typical OMAP configuration"
99	default y
100	select AEABI
101	select HIGHMEM
102	select I2C
103	select I2C_OMAP
104	select MENELAUS if ARCH_OMAP2
105	select NEON if CPU_V7
106	select PM
107	select REGULATOR
108	select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
109	select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
110	select VFP
111	help
112	  Compile a kernel suitable for booting most boards
113
114config SOC_HAS_OMAP2_SDRC
115	bool "OMAP2 SDRAM Controller support"
116
117config SOC_HAS_REALTIME_COUNTER
118	bool "Real time free running counter"
119	depends on SOC_OMAP5 || SOC_DRA7XX
120	default y
121
122comment "OMAP Core Type"
123	depends on ARCH_OMAP2
124
125config SOC_OMAP2420
126	bool "OMAP2420 support"
127	depends on ARCH_OMAP2
128	default y
129	select OMAP_DM_TIMER
130	select SOC_HAS_OMAP2_SDRC
131
132config SOC_OMAP2430
133	bool "OMAP2430 support"
134	depends on ARCH_OMAP2
135	default y
136	select SOC_HAS_OMAP2_SDRC
137
138config SOC_OMAP3430
139	bool "OMAP3430 support"
140	depends on ARCH_OMAP3
141	default y
142	select SOC_HAS_OMAP2_SDRC
143
144config SOC_TI81XX
145	bool "TI81XX support"
146	depends on ARCH_OMAP3
147	default y
148
149config OMAP_PACKAGE_CBC
150       bool
151
152config OMAP_PACKAGE_CBB
153       bool
154
155config OMAP_PACKAGE_CUS
156       bool
157
158config OMAP_PACKAGE_CBP
159       bool
160
161comment "OMAP Legacy Platform Data Board Type"
162	depends on ARCH_OMAP2PLUS
163
164config MACH_OMAP_GENERIC
165	bool
166
167config MACH_OMAP2_TUSB6010
168	bool
169	depends on ARCH_OMAP2 && SOC_OMAP2420
170	default y if MACH_NOKIA_N8X0
171
172config MACH_OMAP3_BEAGLE
173	bool "OMAP3 BEAGLE board"
174	depends on ARCH_OMAP3
175	default y
176	select OMAP_PACKAGE_CBB
177
178config MACH_DEVKIT8000
179	bool "DEVKIT8000 board"
180	depends on ARCH_OMAP3
181	default y
182	select OMAP_PACKAGE_CUS
183
184config MACH_OMAP_LDP
185	bool "OMAP3 LDP board"
186	depends on ARCH_OMAP3
187	default y
188	select OMAP_PACKAGE_CBB
189
190config MACH_OMAP3530_LV_SOM
191	bool "OMAP3 Logic 3530 LV SOM board"
192	depends on ARCH_OMAP3
193	default y
194	select OMAP_PACKAGE_CBB
195	help
196	 Support for the LogicPD OMAP3530 SOM Development kit
197	 for full description please see the products webpage at
198	 http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap35x-development-kit
199
200config MACH_OMAP3_TORPEDO
201	bool "OMAP3 Logic 35x Torpedo board"
202	depends on ARCH_OMAP3
203	default y
204	select OMAP_PACKAGE_CBB
205	help
206	 Support for the LogicPD OMAP35x Torpedo Development kit
207	 for full description please see the products webpage at
208	 http://www.logicpd.com/products/development-kits/zoom-omap35x-torpedo-development-kit
209
210config MACH_OVERO
211	bool "Gumstix Overo board"
212	depends on ARCH_OMAP3
213	default y
214	select OMAP_PACKAGE_CBB
215
216config MACH_OMAP3517EVM
217	bool "OMAP3517/ AM3517 EVM board"
218	depends on ARCH_OMAP3
219	default y
220	select OMAP_PACKAGE_CBB
221
222config MACH_CRANEBOARD
223	bool "AM3517/05 CRANE board"
224	depends on ARCH_OMAP3
225	select OMAP_PACKAGE_CBB
226
227config MACH_OMAP3_PANDORA
228	bool "OMAP3 Pandora"
229	depends on ARCH_OMAP3
230	default y
231	select OMAP_PACKAGE_CBB
232	select REGULATOR_FIXED_VOLTAGE if REGULATOR
233
234config MACH_TOUCHBOOK
235	bool "OMAP3 Touch Book"
236	depends on ARCH_OMAP3
237	default y
238	select OMAP_PACKAGE_CBB
239
240config MACH_NOKIA_N810
241       bool
242
243config MACH_NOKIA_N810_WIMAX
244       bool
245
246config MACH_NOKIA_N8X0
247	bool "Nokia N800/N810"
248	depends on SOC_OMAP2420
249	default y
250	select MACH_NOKIA_N810
251	select MACH_NOKIA_N810_WIMAX
252
253config MACH_NOKIA_RX51
254	bool "Nokia N900 (RX-51) phone"
255	depends on ARCH_OMAP3
256	default y
257	select OMAP_PACKAGE_CBB
258
259config MACH_CM_T35
260	bool "CompuLab CM-T35/CM-T3730 modules"
261	depends on ARCH_OMAP3
262	default y
263	select MACH_CM_T3730
264	select OMAP_PACKAGE_CUS
265
266config MACH_CM_T3517
267	bool "CompuLab CM-T3517 module"
268	depends on ARCH_OMAP3
269	default y
270	select OMAP_PACKAGE_CBB
271
272config MACH_CM_T3730
273       bool
274
275config MACH_SBC3530
276	bool "OMAP3 SBC STALKER board"
277	depends on ARCH_OMAP3
278	default y
279	select OMAP_PACKAGE_CUS
280
281config OMAP3_SDRC_AC_TIMING
282	bool "Enable SDRC AC timing register changes"
283	depends on ARCH_OMAP3
284	default n
285	help
286	  If you know that none of your system initiators will attempt to
287	  access SDRAM during CORE DVFS, select Y here.  This should boost
288	  SDRAM performance at lower CORE OPPs.  There are relatively few
289	  users who will wish to say yes at this point - almost everyone will
290	  wish to say no.  Selecting yes without understanding what is
291	  going on could result in system crashes;
292
293config OMAP4_ERRATA_I688
294	bool "OMAP4 errata: Async Bridge Corruption"
295	depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
296	select ARCH_HAS_BARRIERS
297	help
298	  If a data is stalled inside asynchronous bridge because of back
299	  pressure, it may be accepted multiple times, creating pointer
300	  misalignment that will corrupt next transfers on that data path
301	  until next reset of the system (No recovery procedure once the
302	  issue is hit, the path remains consistently broken). Async bridge
303	  can be found on path between MPU to EMIF and MPU to L3 interconnect.
304	  This situation can happen only when the idle is initiated by a
305	  Master Request Disconnection (which is trigged by software when
306	  executing WFI on CPU).
307	  The work-around for this errata needs all the initiators connected
308	  through async bridge must ensure that data path is properly drained
309	  before issuing WFI. This condition will be met if one Strongly ordered
310	  access is performed to the target right before executing the WFI.
311	  In MPU case, L3 T2ASYNC FIFO and DDR T2ASYNC FIFO needs to be drained.
312	  IO barrier ensure that there is no synchronisation loss on initiators
313	  operating on both interconnect port simultaneously.
314endmenu
315
316endif
317
318endmenu
319