xref: /linux/arch/arm/mach-omap1/serial.c (revision 95e9fd10f06cb5642028b6b851e32b8c8afb4571)
1 /*
2  * linux/arch/arm/mach-omap1/serial.c
3  *
4  * OMAP1 serial support.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/gpio.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/irq.h>
15 #include <linux/delay.h>
16 #include <linux/serial.h>
17 #include <linux/tty.h>
18 #include <linux/serial_8250.h>
19 #include <linux/serial_reg.h>
20 #include <linux/clk.h>
21 #include <linux/io.h>
22 
23 #include <asm/mach-types.h>
24 
25 #include <plat/board.h>
26 #include <plat/mux.h>
27 #include <plat/fpga.h>
28 
29 #include "pm.h"
30 
31 static struct clk * uart1_ck;
32 static struct clk * uart2_ck;
33 static struct clk * uart3_ck;
34 
35 static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
36 					  int offset)
37 {
38 	offset <<= up->regshift;
39 	return (unsigned int)__raw_readb(up->membase + offset);
40 }
41 
42 static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
43 				    int value)
44 {
45 	offset <<= p->regshift;
46 	__raw_writeb(value, p->membase + offset);
47 }
48 
49 /*
50  * Internal UARTs need to be initialized for the 8250 autoconfig to work
51  * properly. Note that the TX watermark initialization may not be needed
52  * once the 8250.c watermark handling code is merged.
53  */
54 static void __init omap_serial_reset(struct plat_serial8250_port *p)
55 {
56 	omap_serial_outp(p, UART_OMAP_MDR1,
57 			UART_OMAP_MDR1_DISABLE);	/* disable UART */
58 	omap_serial_outp(p, UART_OMAP_SCR, 0x08);	/* TX watermark */
59 	omap_serial_outp(p, UART_OMAP_MDR1,
60 			UART_OMAP_MDR1_16X_MODE);	/* enable UART */
61 
62 	if (!cpu_is_omap15xx()) {
63 		omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
64 		while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
65 	}
66 }
67 
68 static struct plat_serial8250_port serial_platform_data[] = {
69 	{
70 		.mapbase	= OMAP1_UART1_BASE,
71 		.irq		= INT_UART1,
72 		.flags		= UPF_BOOT_AUTOCONF,
73 		.iotype		= UPIO_MEM,
74 		.regshift	= 2,
75 		.uartclk	= OMAP16XX_BASE_BAUD * 16,
76 	},
77 	{
78 		.mapbase	= OMAP1_UART2_BASE,
79 		.irq		= INT_UART2,
80 		.flags		= UPF_BOOT_AUTOCONF,
81 		.iotype		= UPIO_MEM,
82 		.regshift	= 2,
83 		.uartclk	= OMAP16XX_BASE_BAUD * 16,
84 	},
85 	{
86 		.mapbase	= OMAP1_UART3_BASE,
87 		.irq		= INT_UART3,
88 		.flags		= UPF_BOOT_AUTOCONF,
89 		.iotype		= UPIO_MEM,
90 		.regshift	= 2,
91 		.uartclk	= OMAP16XX_BASE_BAUD * 16,
92 	},
93 	{ },
94 };
95 
96 static struct platform_device serial_device = {
97 	.name			= "serial8250",
98 	.id			= PLAT8250_DEV_PLATFORM,
99 	.dev			= {
100 		.platform_data	= serial_platform_data,
101 	},
102 };
103 
104 /*
105  * Note that on Innovator-1510 UART2 pins conflict with USB2.
106  * By default UART2 does not work on Innovator-1510 if you have
107  * USB OHCI enabled. To use UART2, you must disable USB2 first.
108  */
109 void __init omap_serial_init(void)
110 {
111 	int i;
112 
113 	if (cpu_is_omap7xx()) {
114 		serial_platform_data[0].regshift = 0;
115 		serial_platform_data[1].regshift = 0;
116 		serial_platform_data[0].irq = INT_7XX_UART_MODEM_1;
117 		serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2;
118 	}
119 
120 	if (cpu_is_omap15xx()) {
121 		serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
122 		serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
123 		serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
124 	}
125 
126 	for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
127 
128 		/* Don't look at UARTs higher than 2 for omap7xx */
129 		if (cpu_is_omap7xx() && i > 1) {
130 			serial_platform_data[i].membase = NULL;
131 			serial_platform_data[i].mapbase = 0;
132 			continue;
133 		}
134 
135 		/* Static mapping, never released */
136 		serial_platform_data[i].membase =
137 			ioremap(serial_platform_data[i].mapbase, SZ_2K);
138 		if (!serial_platform_data[i].membase) {
139 			printk(KERN_ERR "Could not ioremap uart%i\n", i);
140 			continue;
141 		}
142 		switch (i) {
143 		case 0:
144 			uart1_ck = clk_get(NULL, "uart1_ck");
145 			if (IS_ERR(uart1_ck))
146 				printk("Could not get uart1_ck\n");
147 			else {
148 				clk_enable(uart1_ck);
149 				if (cpu_is_omap15xx())
150 					clk_set_rate(uart1_ck, 12000000);
151 			}
152 			break;
153 		case 1:
154 			uart2_ck = clk_get(NULL, "uart2_ck");
155 			if (IS_ERR(uart2_ck))
156 				printk("Could not get uart2_ck\n");
157 			else {
158 				clk_enable(uart2_ck);
159 				if (cpu_is_omap15xx())
160 					clk_set_rate(uart2_ck, 12000000);
161 				else
162 					clk_set_rate(uart2_ck, 48000000);
163 			}
164 			break;
165 		case 2:
166 			uart3_ck = clk_get(NULL, "uart3_ck");
167 			if (IS_ERR(uart3_ck))
168 				printk("Could not get uart3_ck\n");
169 			else {
170 				clk_enable(uart3_ck);
171 				if (cpu_is_omap15xx())
172 					clk_set_rate(uart3_ck, 12000000);
173 			}
174 			break;
175 		}
176 		omap_serial_reset(&serial_platform_data[i]);
177 	}
178 }
179 
180 #ifdef CONFIG_OMAP_SERIAL_WAKE
181 
182 static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
183 {
184 	/* Need to do something with serial port right after wake-up? */
185 	return IRQ_HANDLED;
186 }
187 
188 /*
189  * Reroutes serial RX lines to GPIO lines for the duration of
190  * sleep to allow waking up the device from serial port even
191  * in deep sleep.
192  */
193 void omap_serial_wake_trigger(int enable)
194 {
195 	if (!cpu_is_omap16xx())
196 		return;
197 
198 	if (uart1_ck != NULL) {
199 		if (enable)
200 			omap_cfg_reg(V14_16XX_GPIO37);
201 		else
202 			omap_cfg_reg(V14_16XX_UART1_RX);
203 	}
204 	if (uart2_ck != NULL) {
205 		if (enable)
206 			omap_cfg_reg(R9_16XX_GPIO18);
207 		else
208 			omap_cfg_reg(R9_16XX_UART2_RX);
209 	}
210 	if (uart3_ck != NULL) {
211 		if (enable)
212 			omap_cfg_reg(L14_16XX_GPIO49);
213 		else
214 			omap_cfg_reg(L14_16XX_UART3_RX);
215 	}
216 }
217 
218 static void __init omap_serial_set_port_wakeup(int gpio_nr)
219 {
220 	int ret;
221 
222 	ret = gpio_request(gpio_nr, "UART wake");
223 	if (ret < 0) {
224 		printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
225 		       gpio_nr);
226 		return;
227 	}
228 	gpio_direction_input(gpio_nr);
229 	ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
230 			  IRQF_TRIGGER_RISING, "serial wakeup", NULL);
231 	if (ret) {
232 		gpio_free(gpio_nr);
233 		printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
234 		       gpio_nr);
235 		return;
236 	}
237 	enable_irq_wake(gpio_to_irq(gpio_nr));
238 }
239 
240 int __init omap_serial_wakeup_init(void)
241 {
242 	if (!cpu_is_omap16xx())
243 		return 0;
244 
245 	if (uart1_ck != NULL)
246 		omap_serial_set_port_wakeup(37);
247 	if (uart2_ck != NULL)
248 		omap_serial_set_port_wakeup(18);
249 	if (uart3_ck != NULL)
250 		omap_serial_set_port_wakeup(49);
251 
252 	return 0;
253 }
254 
255 #endif	/* CONFIG_OMAP_SERIAL_WAKE */
256 
257 static int __init omap_init(void)
258 {
259 	if (!cpu_class_is_omap1())
260 		return -ENODEV;
261 
262 	return platform_device_register(&serial_device);
263 }
264 arch_initcall(omap_init);
265