xref: /linux/arch/arm/mach-omap1/gpio16xx.c (revision dec1c62e91ba268ab2a6e339d4d7a59287d5eba1)
1 /*
2  * OMAP16xx specific gpio init
3  *
4  * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
5  *
6  * Author:
7  *	Charulatha V <charu@ti.com>
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation version 2.
12  *
13  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14  * kind, whether express or implied; without even the implied warranty
15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18 
19 #include <linux/gpio.h>
20 #include <linux/platform_data/gpio-omap.h>
21 #include <linux/soc/ti/omap1-io.h>
22 
23 #include "hardware.h"
24 #include "irqs.h"
25 #include "soc.h"
26 
27 #define OMAP1610_GPIO1_BASE		0xfffbe400
28 #define OMAP1610_GPIO2_BASE		0xfffbec00
29 #define OMAP1610_GPIO3_BASE		0xfffbb400
30 #define OMAP1610_GPIO4_BASE		0xfffbbc00
31 #define OMAP1_MPUIO_VBASE		OMAP1_MPUIO_BASE
32 
33 /* smart idle, enable wakeup */
34 #define SYSCONFIG_WORD			0x14
35 
36 /* mpu gpio */
37 static struct resource omap16xx_mpu_gpio_resources[] = {
38 	{
39 		.start	= OMAP1_MPUIO_VBASE,
40 		.end	= OMAP1_MPUIO_VBASE + SZ_2K - 1,
41 		.flags	= IORESOURCE_MEM,
42 	},
43 	{
44 		.start	= INT_MPUIO,
45 		.flags	= IORESOURCE_IRQ,
46 	},
47 };
48 
49 static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
50 	.revision       = USHRT_MAX,
51 	.direction	= OMAP_MPUIO_IO_CNTL,
52 	.datain		= OMAP_MPUIO_INPUT_LATCH,
53 	.dataout	= OMAP_MPUIO_OUTPUT,
54 	.irqstatus	= OMAP_MPUIO_GPIO_INT,
55 	.irqenable	= OMAP_MPUIO_GPIO_MASKIT,
56 	.irqenable_inv	= true,
57 	.irqctrl	= OMAP_MPUIO_GPIO_INT_EDGE,
58 };
59 
60 static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
61 	.is_mpuio		= true,
62 	.bank_width		= 16,
63 	.bank_stride		= 1,
64 	.regs                   = &omap16xx_mpuio_regs,
65 };
66 
67 static struct platform_device omap16xx_mpu_gpio = {
68 	.name           = "omap_gpio",
69 	.id             = 0,
70 	.dev            = {
71 		.platform_data = &omap16xx_mpu_gpio_config,
72 	},
73 	.num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
74 	.resource = omap16xx_mpu_gpio_resources,
75 };
76 
77 /* gpio1 */
78 static struct resource omap16xx_gpio1_resources[] = {
79 	{
80 		.start	= OMAP1610_GPIO1_BASE,
81 		.end	= OMAP1610_GPIO1_BASE + SZ_2K - 1,
82 		.flags	= IORESOURCE_MEM,
83 	},
84 	{
85 		.start	= INT_GPIO_BANK1,
86 		.flags	= IORESOURCE_IRQ,
87 	},
88 };
89 
90 static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
91 	.revision       = OMAP1610_GPIO_REVISION,
92 	.direction	= OMAP1610_GPIO_DIRECTION,
93 	.set_dataout	= OMAP1610_GPIO_SET_DATAOUT,
94 	.clr_dataout	= OMAP1610_GPIO_CLEAR_DATAOUT,
95 	.datain		= OMAP1610_GPIO_DATAIN,
96 	.dataout	= OMAP1610_GPIO_DATAOUT,
97 	.irqstatus	= OMAP1610_GPIO_IRQSTATUS1,
98 	.irqenable	= OMAP1610_GPIO_IRQENABLE1,
99 	.set_irqenable	= OMAP1610_GPIO_SET_IRQENABLE1,
100 	.clr_irqenable	= OMAP1610_GPIO_CLEAR_IRQENABLE1,
101 	.wkup_en	= OMAP1610_GPIO_WAKEUPENABLE,
102 	.edgectrl1	= OMAP1610_GPIO_EDGE_CTRL1,
103 	.edgectrl2	= OMAP1610_GPIO_EDGE_CTRL2,
104 };
105 
106 static struct omap_gpio_platform_data omap16xx_gpio1_config = {
107 	.bank_width		= 16,
108 	.regs                   = &omap16xx_gpio_regs,
109 };
110 
111 static struct platform_device omap16xx_gpio1 = {
112 	.name           = "omap_gpio",
113 	.id             = 1,
114 	.dev            = {
115 		.platform_data = &omap16xx_gpio1_config,
116 	},
117 	.num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
118 	.resource = omap16xx_gpio1_resources,
119 };
120 
121 /* gpio2 */
122 static struct resource omap16xx_gpio2_resources[] = {
123 	{
124 		.start	= OMAP1610_GPIO2_BASE,
125 		.end	= OMAP1610_GPIO2_BASE + SZ_2K - 1,
126 		.flags	= IORESOURCE_MEM,
127 	},
128 	{
129 		.start	= INT_1610_GPIO_BANK2,
130 		.flags	= IORESOURCE_IRQ,
131 	},
132 };
133 
134 static struct omap_gpio_platform_data omap16xx_gpio2_config = {
135 	.bank_width		= 16,
136 	.regs                   = &omap16xx_gpio_regs,
137 };
138 
139 static struct platform_device omap16xx_gpio2 = {
140 	.name           = "omap_gpio",
141 	.id             = 2,
142 	.dev            = {
143 		.platform_data = &omap16xx_gpio2_config,
144 	},
145 	.num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
146 	.resource = omap16xx_gpio2_resources,
147 };
148 
149 /* gpio3 */
150 static struct resource omap16xx_gpio3_resources[] = {
151 	{
152 		.start	= OMAP1610_GPIO3_BASE,
153 		.end	= OMAP1610_GPIO3_BASE + SZ_2K - 1,
154 		.flags	= IORESOURCE_MEM,
155 	},
156 	{
157 		.start	= INT_1610_GPIO_BANK3,
158 		.flags	= IORESOURCE_IRQ,
159 	},
160 };
161 
162 static struct omap_gpio_platform_data omap16xx_gpio3_config = {
163 	.bank_width		= 16,
164 	.regs                   = &omap16xx_gpio_regs,
165 };
166 
167 static struct platform_device omap16xx_gpio3 = {
168 	.name           = "omap_gpio",
169 	.id             = 3,
170 	.dev            = {
171 		.platform_data = &omap16xx_gpio3_config,
172 	},
173 	.num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
174 	.resource = omap16xx_gpio3_resources,
175 };
176 
177 /* gpio4 */
178 static struct resource omap16xx_gpio4_resources[] = {
179 	{
180 		.start	= OMAP1610_GPIO4_BASE,
181 		.end	= OMAP1610_GPIO4_BASE + SZ_2K - 1,
182 		.flags	= IORESOURCE_MEM,
183 	},
184 	{
185 		.start	= INT_1610_GPIO_BANK4,
186 		.flags	= IORESOURCE_IRQ,
187 	},
188 };
189 
190 static struct omap_gpio_platform_data omap16xx_gpio4_config = {
191 	.bank_width		= 16,
192 	.regs                   = &omap16xx_gpio_regs,
193 };
194 
195 static struct platform_device omap16xx_gpio4 = {
196 	.name           = "omap_gpio",
197 	.id             = 4,
198 	.dev            = {
199 		.platform_data = &omap16xx_gpio4_config,
200 	},
201 	.num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
202 	.resource = omap16xx_gpio4_resources,
203 };
204 
205 static struct platform_device *omap16xx_gpio_dev[] __initdata = {
206 	&omap16xx_mpu_gpio,
207 	&omap16xx_gpio1,
208 	&omap16xx_gpio2,
209 	&omap16xx_gpio3,
210 	&omap16xx_gpio4,
211 };
212 
213 /*
214  * omap16xx_gpio_init needs to be done before
215  * machine_init functions access gpio APIs.
216  * Hence omap16xx_gpio_init is a postcore_initcall.
217  */
218 static int __init omap16xx_gpio_init(void)
219 {
220 	int i;
221 	void __iomem *base;
222 	struct resource *res;
223 	struct platform_device *pdev;
224 	struct omap_gpio_platform_data *pdata;
225 
226 	if (!cpu_is_omap16xx())
227 		return -EINVAL;
228 
229 	/*
230 	 * Enable system clock for GPIO module.
231 	 * The CAM_CLK_CTRL *is* really the right place.
232 	 */
233 	omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
234 					ULPD_CAM_CLK_CTRL);
235 
236 	for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
237 		pdev = omap16xx_gpio_dev[i];
238 		pdata = pdev->dev.platform_data;
239 
240 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
241 		if (unlikely(!res)) {
242 			dev_err(&pdev->dev, "Invalid mem resource.\n");
243 			return -ENODEV;
244 		}
245 
246 		base = ioremap(res->start, resource_size(res));
247 		if (unlikely(!base)) {
248 			dev_err(&pdev->dev, "ioremap failed.\n");
249 			return -ENOMEM;
250 		}
251 
252 		__raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
253 		iounmap(base);
254 
255 		platform_device_register(omap16xx_gpio_dev[i]);
256 	}
257 
258 	return 0;
259 }
260 postcore_initcall(omap16xx_gpio_init);
261