xref: /linux/arch/arm/mach-omap1/gpio16xx.c (revision d4b996f9ef1fe83d9ce9ad5c1ca0bd8231638ce5)
1 /*
2  * OMAP16xx specific gpio init
3  *
4  * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
5  *
6  * Author:
7  *	Charulatha V <charu@ti.com>
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation version 2.
12  *
13  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
14  * kind, whether express or implied; without even the implied warranty
15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18 
19 #include <linux/gpio.h>
20 #include <linux/platform_data/gpio-omap.h>
21 
22 #include <mach/irqs.h>
23 
24 #include "soc.h"
25 
26 #define OMAP1610_GPIO1_BASE		0xfffbe400
27 #define OMAP1610_GPIO2_BASE		0xfffbec00
28 #define OMAP1610_GPIO3_BASE		0xfffbb400
29 #define OMAP1610_GPIO4_BASE		0xfffbbc00
30 #define OMAP1_MPUIO_VBASE		OMAP1_MPUIO_BASE
31 
32 /* smart idle, enable wakeup */
33 #define SYSCONFIG_WORD			0x14
34 
35 /* mpu gpio */
36 static struct resource omap16xx_mpu_gpio_resources[] = {
37 	{
38 		.start	= OMAP1_MPUIO_VBASE,
39 		.end	= OMAP1_MPUIO_VBASE + SZ_2K - 1,
40 		.flags	= IORESOURCE_MEM,
41 	},
42 	{
43 		.start	= INT_MPUIO,
44 		.flags	= IORESOURCE_IRQ,
45 	},
46 };
47 
48 static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
49 	.revision       = USHRT_MAX,
50 	.direction	= OMAP_MPUIO_IO_CNTL,
51 	.datain		= OMAP_MPUIO_INPUT_LATCH,
52 	.dataout	= OMAP_MPUIO_OUTPUT,
53 	.irqstatus	= OMAP_MPUIO_GPIO_INT,
54 	.irqenable	= OMAP_MPUIO_GPIO_MASKIT,
55 	.irqenable_inv	= true,
56 	.irqctrl	= OMAP_MPUIO_GPIO_INT_EDGE,
57 };
58 
59 static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
60 	.is_mpuio		= true,
61 	.bank_width		= 16,
62 	.bank_stride		= 1,
63 	.regs                   = &omap16xx_mpuio_regs,
64 };
65 
66 static struct platform_device omap16xx_mpu_gpio = {
67 	.name           = "omap_gpio",
68 	.id             = 0,
69 	.dev            = {
70 		.platform_data = &omap16xx_mpu_gpio_config,
71 	},
72 	.num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
73 	.resource = omap16xx_mpu_gpio_resources,
74 };
75 
76 /* gpio1 */
77 static struct resource omap16xx_gpio1_resources[] = {
78 	{
79 		.start	= OMAP1610_GPIO1_BASE,
80 		.end	= OMAP1610_GPIO1_BASE + SZ_2K - 1,
81 		.flags	= IORESOURCE_MEM,
82 	},
83 	{
84 		.start	= INT_GPIO_BANK1,
85 		.flags	= IORESOURCE_IRQ,
86 	},
87 };
88 
89 static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
90 	.revision       = OMAP1610_GPIO_REVISION,
91 	.direction	= OMAP1610_GPIO_DIRECTION,
92 	.set_dataout	= OMAP1610_GPIO_SET_DATAOUT,
93 	.clr_dataout	= OMAP1610_GPIO_CLEAR_DATAOUT,
94 	.datain		= OMAP1610_GPIO_DATAIN,
95 	.dataout	= OMAP1610_GPIO_DATAOUT,
96 	.irqstatus	= OMAP1610_GPIO_IRQSTATUS1,
97 	.irqenable	= OMAP1610_GPIO_IRQENABLE1,
98 	.set_irqenable	= OMAP1610_GPIO_SET_IRQENABLE1,
99 	.clr_irqenable	= OMAP1610_GPIO_CLEAR_IRQENABLE1,
100 	.wkup_en	= OMAP1610_GPIO_WAKEUPENABLE,
101 	.edgectrl1	= OMAP1610_GPIO_EDGE_CTRL1,
102 	.edgectrl2	= OMAP1610_GPIO_EDGE_CTRL2,
103 };
104 
105 static struct omap_gpio_platform_data omap16xx_gpio1_config = {
106 	.bank_width		= 16,
107 	.regs                   = &omap16xx_gpio_regs,
108 };
109 
110 static struct platform_device omap16xx_gpio1 = {
111 	.name           = "omap_gpio",
112 	.id             = 1,
113 	.dev            = {
114 		.platform_data = &omap16xx_gpio1_config,
115 	},
116 	.num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
117 	.resource = omap16xx_gpio1_resources,
118 };
119 
120 /* gpio2 */
121 static struct resource omap16xx_gpio2_resources[] = {
122 	{
123 		.start	= OMAP1610_GPIO2_BASE,
124 		.end	= OMAP1610_GPIO2_BASE + SZ_2K - 1,
125 		.flags	= IORESOURCE_MEM,
126 	},
127 	{
128 		.start	= INT_1610_GPIO_BANK2,
129 		.flags	= IORESOURCE_IRQ,
130 	},
131 };
132 
133 static struct omap_gpio_platform_data omap16xx_gpio2_config = {
134 	.bank_width		= 16,
135 	.regs                   = &omap16xx_gpio_regs,
136 };
137 
138 static struct platform_device omap16xx_gpio2 = {
139 	.name           = "omap_gpio",
140 	.id             = 2,
141 	.dev            = {
142 		.platform_data = &omap16xx_gpio2_config,
143 	},
144 	.num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
145 	.resource = omap16xx_gpio2_resources,
146 };
147 
148 /* gpio3 */
149 static struct resource omap16xx_gpio3_resources[] = {
150 	{
151 		.start	= OMAP1610_GPIO3_BASE,
152 		.end	= OMAP1610_GPIO3_BASE + SZ_2K - 1,
153 		.flags	= IORESOURCE_MEM,
154 	},
155 	{
156 		.start	= INT_1610_GPIO_BANK3,
157 		.flags	= IORESOURCE_IRQ,
158 	},
159 };
160 
161 static struct omap_gpio_platform_data omap16xx_gpio3_config = {
162 	.bank_width		= 16,
163 	.regs                   = &omap16xx_gpio_regs,
164 };
165 
166 static struct platform_device omap16xx_gpio3 = {
167 	.name           = "omap_gpio",
168 	.id             = 3,
169 	.dev            = {
170 		.platform_data = &omap16xx_gpio3_config,
171 	},
172 	.num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
173 	.resource = omap16xx_gpio3_resources,
174 };
175 
176 /* gpio4 */
177 static struct resource omap16xx_gpio4_resources[] = {
178 	{
179 		.start	= OMAP1610_GPIO4_BASE,
180 		.end	= OMAP1610_GPIO4_BASE + SZ_2K - 1,
181 		.flags	= IORESOURCE_MEM,
182 	},
183 	{
184 		.start	= INT_1610_GPIO_BANK4,
185 		.flags	= IORESOURCE_IRQ,
186 	},
187 };
188 
189 static struct omap_gpio_platform_data omap16xx_gpio4_config = {
190 	.bank_width		= 16,
191 	.regs                   = &omap16xx_gpio_regs,
192 };
193 
194 static struct platform_device omap16xx_gpio4 = {
195 	.name           = "omap_gpio",
196 	.id             = 4,
197 	.dev            = {
198 		.platform_data = &omap16xx_gpio4_config,
199 	},
200 	.num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
201 	.resource = omap16xx_gpio4_resources,
202 };
203 
204 static struct platform_device *omap16xx_gpio_dev[] __initdata = {
205 	&omap16xx_mpu_gpio,
206 	&omap16xx_gpio1,
207 	&omap16xx_gpio2,
208 	&omap16xx_gpio3,
209 	&omap16xx_gpio4,
210 };
211 
212 /*
213  * omap16xx_gpio_init needs to be done before
214  * machine_init functions access gpio APIs.
215  * Hence omap16xx_gpio_init is a postcore_initcall.
216  */
217 static int __init omap16xx_gpio_init(void)
218 {
219 	int i;
220 	void __iomem *base;
221 	struct resource *res;
222 	struct platform_device *pdev;
223 	struct omap_gpio_platform_data *pdata;
224 
225 	if (!cpu_is_omap16xx())
226 		return -EINVAL;
227 
228 	/*
229 	 * Enable system clock for GPIO module.
230 	 * The CAM_CLK_CTRL *is* really the right place.
231 	 */
232 	omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
233 					ULPD_CAM_CLK_CTRL);
234 
235 	for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
236 		pdev = omap16xx_gpio_dev[i];
237 		pdata = pdev->dev.platform_data;
238 
239 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
240 		if (unlikely(!res)) {
241 			dev_err(&pdev->dev, "Invalid mem resource.\n");
242 			return -ENODEV;
243 		}
244 
245 		base = ioremap(res->start, resource_size(res));
246 		if (unlikely(!base)) {
247 			dev_err(&pdev->dev, "ioremap failed.\n");
248 			return -ENOMEM;
249 		}
250 
251 		__raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
252 		iounmap(base);
253 
254 		platform_device_register(omap16xx_gpio_dev[i]);
255 	}
256 
257 	return 0;
258 }
259 postcore_initcall(omap16xx_gpio_init);
260