1*c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2f682a218SMatthias Brugger /* 3f682a218SMatthias Brugger * Device Tree support for Mediatek SoCs 4f682a218SMatthias Brugger * 5f682a218SMatthias Brugger * Copyright (c) 2014 MundoReader S.L. 6f682a218SMatthias Brugger * Author: Matthias Brugger <matthias.bgg@gmail.com> 7f682a218SMatthias Brugger */ 8f682a218SMatthias Brugger #include <linux/init.h> 962e59c4eSStephen Boyd #include <linux/io.h> 10f682a218SMatthias Brugger #include <asm/mach/arch.h> 119821e545SMatthias Brugger #include <linux/of.h> 129821e545SMatthias Brugger #include <linux/clk-provider.h> 139821e545SMatthias Brugger #include <linux/clocksource.h> 149821e545SMatthias Brugger 159821e545SMatthias Brugger 169821e545SMatthias Brugger #define GPT6_CON_MT65xx 0x10008060 179821e545SMatthias Brugger #define GPT_ENABLE 0x31 189821e545SMatthias Brugger 199821e545SMatthias Brugger static void __init mediatek_timer_init(void) 209821e545SMatthias Brugger { 219821e545SMatthias Brugger void __iomem *gpt_base; 229821e545SMatthias Brugger 239821e545SMatthias Brugger if (of_machine_is_compatible("mediatek,mt6589") || 24601bac76SJohn Crispin of_machine_is_compatible("mediatek,mt7623") || 259821e545SMatthias Brugger of_machine_is_compatible("mediatek,mt8135") || 269821e545SMatthias Brugger of_machine_is_compatible("mediatek,mt8127")) { 279821e545SMatthias Brugger /* turn on GPT6 which ungates arch timer clocks */ 289821e545SMatthias Brugger gpt_base = ioremap(GPT6_CON_MT65xx, 0x04); 299821e545SMatthias Brugger 309821e545SMatthias Brugger /* enable clock and set to free-run */ 319821e545SMatthias Brugger writel(GPT_ENABLE, gpt_base); 329821e545SMatthias Brugger iounmap(gpt_base); 339821e545SMatthias Brugger } 349821e545SMatthias Brugger 359821e545SMatthias Brugger of_clk_init(NULL); 36ba5d08c0SDaniel Lezcano timer_probe(); 379821e545SMatthias Brugger }; 38f682a218SMatthias Brugger 39f682a218SMatthias Brugger static const char * const mediatek_board_dt_compat[] = { 4074d25721SErin Lo "mediatek,mt2701", 41f682a218SMatthias Brugger "mediatek,mt6589", 424542172eSHoward Chen "mediatek,mt6592", 4331ac0d69SJohn Crispin "mediatek,mt7623", 44a43379ddSRyder Lee "mediatek,mt7629", 451ccd653cSJoe.C "mediatek,mt8127", 460c3fb203SJoe.C "mediatek,mt8135", 47f682a218SMatthias Brugger NULL, 48f682a218SMatthias Brugger }; 49f682a218SMatthias Brugger 50f682a218SMatthias Brugger DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)") 51f682a218SMatthias Brugger .dt_compat = mediatek_board_dt_compat, 529821e545SMatthias Brugger .init_time = mediatek_timer_init, 53f682a218SMatthias Brugger MACHINE_END 54