1 /* 2 * arch/arm/mach-lpc32xx/common.h 3 * 4 * Author: Kevin Wells <kevin.wells@nxp.com> 5 * 6 * Copyright (C) 2009-2010 NXP Semiconductors 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #ifndef __LPC32XX_COMMON_H 20 #define __LPC32XX_COMMON_H 21 22 #include <mach/board.h> 23 #include <linux/platform_device.h> 24 25 /* 26 * Other arch specific structures and functions 27 */ 28 extern struct sys_timer lpc32xx_timer; 29 extern void __init lpc32xx_init_irq(void); 30 extern void __init lpc32xx_map_io(void); 31 extern void __init lpc32xx_serial_init(void); 32 extern void lpc23xx_restart(char, const char *); 33 34 35 /* 36 * Structure used for setting up and querying the PLLS 37 */ 38 struct clk_pll_setup { 39 int analog_on; 40 int cco_bypass_b15; 41 int direct_output_b14; 42 int fdbk_div_ctrl_b13; 43 int pll_p; 44 int pll_n; 45 u32 pll_m; 46 }; 47 48 extern int clk_is_sysclk_mainosc(void); 49 extern u32 clk_check_pll_setup(u32 ifreq, struct clk_pll_setup *pllsetup); 50 extern u32 clk_get_pllrate_from_reg(u32 inputclk, u32 regval); 51 extern u32 clk_get_pclk_div(void); 52 53 /* 54 * Returns the LPC32xx unique 128-bit chip ID 55 */ 56 extern void lpc32xx_get_uid(u32 devid[4]); 57 58 extern u32 lpc32xx_return_iram_size(void); 59 /* 60 * Pointers used for sizing and copying suspend function data 61 */ 62 extern int lpc32xx_sys_suspend(void); 63 extern int lpc32xx_sys_suspend_sz; 64 65 #endif 66