1 /* 2 * arch/arm/mach-lpc32xx/common.h 3 * 4 * Author: Kevin Wells <kevin.wells@nxp.com> 5 * 6 * Copyright (C) 2009-2010 NXP Semiconductors 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #ifndef __LPC32XX_COMMON_H 20 #define __LPC32XX_COMMON_H 21 22 #include <mach/board.h> 23 #include <linux/platform_device.h> 24 #include <linux/reboot.h> 25 26 /* 27 * Other arch specific structures and functions 28 */ 29 extern void lpc32xx_timer_init(void); 30 extern void __init lpc32xx_init_irq(void); 31 extern void __init lpc32xx_map_io(void); 32 extern void __init lpc32xx_serial_init(void); 33 extern void lpc23xx_restart(enum reboot_mode, const char *); 34 35 36 /* 37 * Structure used for setting up and querying the PLLS 38 */ 39 struct clk_pll_setup { 40 int analog_on; 41 int cco_bypass_b15; 42 int direct_output_b14; 43 int fdbk_div_ctrl_b13; 44 int pll_p; 45 int pll_n; 46 u32 pll_m; 47 }; 48 49 extern int clk_is_sysclk_mainosc(void); 50 extern u32 clk_check_pll_setup(u32 ifreq, struct clk_pll_setup *pllsetup); 51 extern u32 clk_get_pllrate_from_reg(u32 inputclk, u32 regval); 52 extern u32 clk_get_pclk_div(void); 53 54 /* 55 * Returns the LPC32xx unique 128-bit chip ID 56 */ 57 extern void lpc32xx_get_uid(u32 devid[4]); 58 59 extern u32 lpc32xx_return_iram_size(void); 60 /* 61 * Pointers used for sizing and copying suspend function data 62 */ 63 extern int lpc32xx_sys_suspend(void); 64 extern int lpc32xx_sys_suspend_sz; 65 66 #endif 67