xref: /linux/arch/arm/mach-lpc32xx/common.h (revision 715552aa30ffe3bd776bb7635056f6622a29133d)
1 /*
2  * arch/arm/mach-lpc32xx/common.h
3  *
4  * Author: Kevin Wells <kevin.wells@nxp.com>
5  *
6  * Copyright (C) 2009-2010 NXP Semiconductors
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  */
18 
19 #ifndef __LPC32XX_COMMON_H
20 #define __LPC32XX_COMMON_H
21 
22 #include <mach/board.h>
23 #include <linux/platform_device.h>
24 
25 /*
26  * Other arch specific structures and functions
27  */
28 extern void lpc32xx_timer_init(void);
29 extern void __init lpc32xx_init_irq(void);
30 extern void __init lpc32xx_map_io(void);
31 extern void __init lpc32xx_serial_init(void);
32 
33 
34 /*
35  * Structure used for setting up and querying the PLLS
36  */
37 struct clk_pll_setup {
38 	int analog_on;
39 	int cco_bypass_b15;
40 	int direct_output_b14;
41 	int fdbk_div_ctrl_b13;
42 	int pll_p;
43 	int pll_n;
44 	u32 pll_m;
45 };
46 
47 extern int clk_is_sysclk_mainosc(void);
48 extern u32 clk_check_pll_setup(u32 ifreq, struct clk_pll_setup *pllsetup);
49 extern u32 clk_get_pllrate_from_reg(u32 inputclk, u32 regval);
50 extern u32 clk_get_pclk_div(void);
51 
52 /*
53  * Returns the LPC32xx unique 128-bit chip ID
54  */
55 extern void lpc32xx_get_uid(u32 devid[4]);
56 
57 extern u32 lpc32xx_return_iram_size(void);
58 /*
59  * Pointers used for sizing and copying suspend function data
60  */
61 extern int lpc32xx_sys_suspend(void);
62 extern int lpc32xx_sys_suspend_sz;
63 
64 #endif
65