xref: /linux/arch/arm/mach-imx/mxc.h (revision b40abaf07fa19c5aa3e649369ed8e0f9df1d2eda)
1 /*
2  * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License
7  * as published by the Free Software Foundation; either version 2
8  * of the License, or (at your option) any later version.
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17  * MA 02110-1301, USA.
18  */
19 
20 #ifndef __ASM_ARCH_MXC_H__
21 #define __ASM_ARCH_MXC_H__
22 
23 #include <linux/types.h>
24 
25 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
26 #error "Do not include directly."
27 #endif
28 
29 #define MXC_CPU_MX1		1
30 #define MXC_CPU_MX21		21
31 #define MXC_CPU_MX25		25
32 #define MXC_CPU_MX27		27
33 #define MXC_CPU_MX31		31
34 #define MXC_CPU_MX35		35
35 #define MXC_CPU_MX51		51
36 #define MXC_CPU_MX53		53
37 #define MXC_CPU_IMX6SL		0x60
38 #define MXC_CPU_IMX6DL		0x61
39 #define MXC_CPU_IMX6SX		0x62
40 #define MXC_CPU_IMX6Q		0x63
41 
42 #define IMX_CHIP_REVISION_1_0		0x10
43 #define IMX_CHIP_REVISION_1_1		0x11
44 #define IMX_CHIP_REVISION_1_2		0x12
45 #define IMX_CHIP_REVISION_1_3		0x13
46 #define IMX_CHIP_REVISION_2_0		0x20
47 #define IMX_CHIP_REVISION_2_1		0x21
48 #define IMX_CHIP_REVISION_2_2		0x22
49 #define IMX_CHIP_REVISION_2_3		0x23
50 #define IMX_CHIP_REVISION_3_0		0x30
51 #define IMX_CHIP_REVISION_3_1		0x31
52 #define IMX_CHIP_REVISION_3_2		0x32
53 #define IMX_CHIP_REVISION_3_3		0x33
54 #define IMX_CHIP_REVISION_UNKNOWN	0xff
55 
56 #ifndef __ASSEMBLY__
57 extern unsigned int __mxc_cpu_type;
58 #endif
59 
60 #ifdef CONFIG_SOC_IMX1
61 # ifdef mxc_cpu_type
62 #  undef mxc_cpu_type
63 #  define mxc_cpu_type __mxc_cpu_type
64 # else
65 #  define mxc_cpu_type MXC_CPU_MX1
66 # endif
67 # define cpu_is_mx1()		(mxc_cpu_type == MXC_CPU_MX1)
68 #else
69 # define cpu_is_mx1()		(0)
70 #endif
71 
72 #ifdef CONFIG_SOC_IMX21
73 # ifdef mxc_cpu_type
74 #  undef mxc_cpu_type
75 #  define mxc_cpu_type __mxc_cpu_type
76 # else
77 #  define mxc_cpu_type MXC_CPU_MX21
78 # endif
79 # define cpu_is_mx21()		(mxc_cpu_type == MXC_CPU_MX21)
80 #else
81 # define cpu_is_mx21()		(0)
82 #endif
83 
84 #ifdef CONFIG_SOC_IMX25
85 # ifdef mxc_cpu_type
86 #  undef mxc_cpu_type
87 #  define mxc_cpu_type __mxc_cpu_type
88 # else
89 #  define mxc_cpu_type MXC_CPU_MX25
90 # endif
91 # define cpu_is_mx25()		(mxc_cpu_type == MXC_CPU_MX25)
92 #else
93 # define cpu_is_mx25()		(0)
94 #endif
95 
96 #ifdef CONFIG_SOC_IMX27
97 # ifdef mxc_cpu_type
98 #  undef mxc_cpu_type
99 #  define mxc_cpu_type __mxc_cpu_type
100 # else
101 #  define mxc_cpu_type MXC_CPU_MX27
102 # endif
103 # define cpu_is_mx27()		(mxc_cpu_type == MXC_CPU_MX27)
104 #else
105 # define cpu_is_mx27()		(0)
106 #endif
107 
108 #ifdef CONFIG_SOC_IMX31
109 # ifdef mxc_cpu_type
110 #  undef mxc_cpu_type
111 #  define mxc_cpu_type __mxc_cpu_type
112 # else
113 #  define mxc_cpu_type MXC_CPU_MX31
114 # endif
115 # define cpu_is_mx31()		(mxc_cpu_type == MXC_CPU_MX31)
116 #else
117 # define cpu_is_mx31()		(0)
118 #endif
119 
120 #ifdef CONFIG_SOC_IMX35
121 # ifdef mxc_cpu_type
122 #  undef mxc_cpu_type
123 #  define mxc_cpu_type __mxc_cpu_type
124 # else
125 #  define mxc_cpu_type MXC_CPU_MX35
126 # endif
127 # define cpu_is_mx35()		(mxc_cpu_type == MXC_CPU_MX35)
128 #else
129 # define cpu_is_mx35()		(0)
130 #endif
131 
132 #ifdef CONFIG_SOC_IMX51
133 # ifdef mxc_cpu_type
134 #  undef mxc_cpu_type
135 #  define mxc_cpu_type __mxc_cpu_type
136 # else
137 #  define mxc_cpu_type MXC_CPU_MX51
138 # endif
139 # define cpu_is_mx51()		(mxc_cpu_type == MXC_CPU_MX51)
140 #else
141 # define cpu_is_mx51()		(0)
142 #endif
143 
144 #ifdef CONFIG_SOC_IMX53
145 # ifdef mxc_cpu_type
146 #  undef mxc_cpu_type
147 #  define mxc_cpu_type __mxc_cpu_type
148 # else
149 #  define mxc_cpu_type MXC_CPU_MX53
150 # endif
151 # define cpu_is_mx53()		(mxc_cpu_type == MXC_CPU_MX53)
152 #else
153 # define cpu_is_mx53()		(0)
154 #endif
155 
156 #ifndef __ASSEMBLY__
157 #ifdef CONFIG_SOC_IMX6SL
158 static inline bool cpu_is_imx6sl(void)
159 {
160 	return __mxc_cpu_type == MXC_CPU_IMX6SL;
161 }
162 #else
163 static inline bool cpu_is_imx6sl(void)
164 {
165 	return false;
166 }
167 #endif
168 
169 static inline bool cpu_is_imx6dl(void)
170 {
171 	return __mxc_cpu_type == MXC_CPU_IMX6DL;
172 }
173 
174 static inline bool cpu_is_imx6sx(void)
175 {
176 	return __mxc_cpu_type == MXC_CPU_IMX6SX;
177 }
178 
179 static inline bool cpu_is_imx6q(void)
180 {
181 	return __mxc_cpu_type == MXC_CPU_IMX6Q;
182 }
183 
184 struct cpu_op {
185 	u32 cpu_rate;
186 };
187 
188 int tzic_enable_wake(void);
189 
190 extern struct cpu_op *(*get_cpu_op)(int *op);
191 #endif
192 
193 #define cpu_is_mx3()	(cpu_is_mx31() || cpu_is_mx35())
194 #define cpu_is_mx2()	(cpu_is_mx21() || cpu_is_mx27())
195 
196 #endif /*  __ASM_ARCH_MXC_H__ */
197