1 /* 2 * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc. 3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17 * MA 02110-1301, USA. 18 */ 19 20 #ifndef __ASM_ARCH_MXC_H__ 21 #define __ASM_ARCH_MXC_H__ 22 23 #include <linux/types.h> 24 25 #ifndef __ASM_ARCH_MXC_HARDWARE_H__ 26 #error "Do not include directly." 27 #endif 28 29 #define MXC_CPU_MX1 1 30 #define MXC_CPU_MX21 21 31 #define MXC_CPU_MX25 25 32 #define MXC_CPU_MX27 27 33 #define MXC_CPU_MX31 31 34 #define MXC_CPU_MX35 35 35 #define MXC_CPU_MX51 51 36 #define MXC_CPU_MX53 53 37 #define MXC_CPU_IMX6SL 0x60 38 #define MXC_CPU_IMX6DL 0x61 39 #define MXC_CPU_IMX6SX 0x62 40 #define MXC_CPU_IMX6Q 0x63 41 #define MXC_CPU_IMX6UL 0x64 42 #define MXC_CPU_IMX6ULL 0x65 43 /* virtual cpu id for i.mx6ulz */ 44 #define MXC_CPU_IMX6ULZ 0x6b 45 #define MXC_CPU_IMX6SLL 0x67 46 #define MXC_CPU_IMX7D 0x72 47 48 #define IMX_DDR_TYPE_LPDDR2 1 49 50 #ifndef __ASSEMBLY__ 51 extern unsigned int __mxc_cpu_type; 52 53 #ifdef CONFIG_SOC_IMX6SL 54 static inline bool cpu_is_imx6sl(void) 55 { 56 return __mxc_cpu_type == MXC_CPU_IMX6SL; 57 } 58 #else 59 static inline bool cpu_is_imx6sl(void) 60 { 61 return false; 62 } 63 #endif 64 65 static inline bool cpu_is_imx6dl(void) 66 { 67 return __mxc_cpu_type == MXC_CPU_IMX6DL; 68 } 69 70 static inline bool cpu_is_imx6sx(void) 71 { 72 return __mxc_cpu_type == MXC_CPU_IMX6SX; 73 } 74 75 static inline bool cpu_is_imx6ul(void) 76 { 77 return __mxc_cpu_type == MXC_CPU_IMX6UL; 78 } 79 80 static inline bool cpu_is_imx6ull(void) 81 { 82 return __mxc_cpu_type == MXC_CPU_IMX6ULL; 83 } 84 85 static inline bool cpu_is_imx6ulz(void) 86 { 87 return __mxc_cpu_type == MXC_CPU_IMX6ULZ; 88 } 89 90 static inline bool cpu_is_imx6sll(void) 91 { 92 return __mxc_cpu_type == MXC_CPU_IMX6SLL; 93 } 94 95 static inline bool cpu_is_imx6q(void) 96 { 97 return __mxc_cpu_type == MXC_CPU_IMX6Q; 98 } 99 100 static inline bool cpu_is_imx7d(void) 101 { 102 return __mxc_cpu_type == MXC_CPU_IMX7D; 103 } 104 105 struct cpu_op { 106 u32 cpu_rate; 107 }; 108 109 int tzic_enable_wake(void); 110 111 extern struct cpu_op *(*get_cpu_op)(int *op); 112 #endif 113 114 #define imx_readl readl_relaxed 115 #define imx_readw readw_relaxed 116 #define imx_writel writel_relaxed 117 #define imx_writew writew_relaxed 118 119 #endif /* __ASM_ARCH_MXC_H__ */ 120