xref: /linux/arch/arm/mach-imx/mxc.h (revision ec336b284136610a43c9daac56d66b20d43ddf7b)
150f2de61SShawn Guo /*
250f2de61SShawn Guo  * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
350f2de61SShawn Guo  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
450f2de61SShawn Guo  *
550f2de61SShawn Guo  * This program is free software; you can redistribute it and/or
650f2de61SShawn Guo  * modify it under the terms of the GNU General Public License
750f2de61SShawn Guo  * as published by the Free Software Foundation; either version 2
850f2de61SShawn Guo  * of the License, or (at your option) any later version.
950f2de61SShawn Guo  * This program is distributed in the hope that it will be useful,
1050f2de61SShawn Guo  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1150f2de61SShawn Guo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1250f2de61SShawn Guo  * GNU General Public License for more details.
1350f2de61SShawn Guo  *
1450f2de61SShawn Guo  * You should have received a copy of the GNU General Public License
1550f2de61SShawn Guo  * along with this program; if not, write to the Free Software
1650f2de61SShawn Guo  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
1750f2de61SShawn Guo  * MA 02110-1301, USA.
1850f2de61SShawn Guo  */
1950f2de61SShawn Guo 
2050f2de61SShawn Guo #ifndef __ASM_ARCH_MXC_H__
2150f2de61SShawn Guo #define __ASM_ARCH_MXC_H__
2250f2de61SShawn Guo 
2350f2de61SShawn Guo #include <linux/types.h>
2450f2de61SShawn Guo 
2550f2de61SShawn Guo #ifndef __ASM_ARCH_MXC_HARDWARE_H__
2650f2de61SShawn Guo #error "Do not include directly."
2750f2de61SShawn Guo #endif
2850f2de61SShawn Guo 
2950f2de61SShawn Guo #define MXC_CPU_MX1		1
3050f2de61SShawn Guo #define MXC_CPU_MX21		21
3150f2de61SShawn Guo #define MXC_CPU_MX25		25
3250f2de61SShawn Guo #define MXC_CPU_MX27		27
3350f2de61SShawn Guo #define MXC_CPU_MX31		31
3450f2de61SShawn Guo #define MXC_CPU_MX35		35
3550f2de61SShawn Guo #define MXC_CPU_MX51		51
3650f2de61SShawn Guo #define MXC_CPU_MX53		53
37a2887546SShawn Guo #define MXC_CPU_IMX6SL		0x60
383c03a2feSShawn Guo #define MXC_CPU_IMX6DL		0x61
39d9654dceSShawn Guo #define MXC_CPU_IMX6SX		0x62
403c03a2feSShawn Guo #define MXC_CPU_IMX6Q		0x63
4150f2de61SShawn Guo 
4250f2de61SShawn Guo #define IMX_CHIP_REVISION_1_0		0x10
4350f2de61SShawn Guo #define IMX_CHIP_REVISION_1_1		0x11
4450f2de61SShawn Guo #define IMX_CHIP_REVISION_1_2		0x12
4550f2de61SShawn Guo #define IMX_CHIP_REVISION_1_3		0x13
46c896e938SJason Liu #define IMX_CHIP_REVISION_1_4		0x14
47c896e938SJason Liu #define IMX_CHIP_REVISION_1_5		0x15
4850f2de61SShawn Guo #define IMX_CHIP_REVISION_2_0		0x20
4950f2de61SShawn Guo #define IMX_CHIP_REVISION_2_1		0x21
5050f2de61SShawn Guo #define IMX_CHIP_REVISION_2_2		0x22
5150f2de61SShawn Guo #define IMX_CHIP_REVISION_2_3		0x23
5250f2de61SShawn Guo #define IMX_CHIP_REVISION_3_0		0x30
5350f2de61SShawn Guo #define IMX_CHIP_REVISION_3_1		0x31
5450f2de61SShawn Guo #define IMX_CHIP_REVISION_3_2		0x32
5550f2de61SShawn Guo #define IMX_CHIP_REVISION_3_3		0x33
5650f2de61SShawn Guo #define IMX_CHIP_REVISION_UNKNOWN	0xff
5750f2de61SShawn Guo 
58*ec336b28SAnson Huang #define IMX_DDR_TYPE_LPDDR2		1
59*ec336b28SAnson Huang 
6050f2de61SShawn Guo #ifndef __ASSEMBLY__
6150f2de61SShawn Guo extern unsigned int __mxc_cpu_type;
6250f2de61SShawn Guo #endif
6350f2de61SShawn Guo 
6450f2de61SShawn Guo #ifdef CONFIG_SOC_IMX1
6550f2de61SShawn Guo # ifdef mxc_cpu_type
6650f2de61SShawn Guo #  undef mxc_cpu_type
6750f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
6850f2de61SShawn Guo # else
6950f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX1
7050f2de61SShawn Guo # endif
7150f2de61SShawn Guo # define cpu_is_mx1()		(mxc_cpu_type == MXC_CPU_MX1)
7250f2de61SShawn Guo #else
7350f2de61SShawn Guo # define cpu_is_mx1()		(0)
7450f2de61SShawn Guo #endif
7550f2de61SShawn Guo 
7650f2de61SShawn Guo #ifdef CONFIG_SOC_IMX21
7750f2de61SShawn Guo # ifdef mxc_cpu_type
7850f2de61SShawn Guo #  undef mxc_cpu_type
7950f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
8050f2de61SShawn Guo # else
8150f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX21
8250f2de61SShawn Guo # endif
8350f2de61SShawn Guo # define cpu_is_mx21()		(mxc_cpu_type == MXC_CPU_MX21)
8450f2de61SShawn Guo #else
8550f2de61SShawn Guo # define cpu_is_mx21()		(0)
8650f2de61SShawn Guo #endif
8750f2de61SShawn Guo 
8850f2de61SShawn Guo #ifdef CONFIG_SOC_IMX25
8950f2de61SShawn Guo # ifdef mxc_cpu_type
9050f2de61SShawn Guo #  undef mxc_cpu_type
9150f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
9250f2de61SShawn Guo # else
9350f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX25
9450f2de61SShawn Guo # endif
9550f2de61SShawn Guo # define cpu_is_mx25()		(mxc_cpu_type == MXC_CPU_MX25)
9650f2de61SShawn Guo #else
9750f2de61SShawn Guo # define cpu_is_mx25()		(0)
9850f2de61SShawn Guo #endif
9950f2de61SShawn Guo 
10050f2de61SShawn Guo #ifdef CONFIG_SOC_IMX27
10150f2de61SShawn Guo # ifdef mxc_cpu_type
10250f2de61SShawn Guo #  undef mxc_cpu_type
10350f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
10450f2de61SShawn Guo # else
10550f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX27
10650f2de61SShawn Guo # endif
10750f2de61SShawn Guo # define cpu_is_mx27()		(mxc_cpu_type == MXC_CPU_MX27)
10850f2de61SShawn Guo #else
10950f2de61SShawn Guo # define cpu_is_mx27()		(0)
11050f2de61SShawn Guo #endif
11150f2de61SShawn Guo 
11250f2de61SShawn Guo #ifdef CONFIG_SOC_IMX31
11350f2de61SShawn Guo # ifdef mxc_cpu_type
11450f2de61SShawn Guo #  undef mxc_cpu_type
11550f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
11650f2de61SShawn Guo # else
11750f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX31
11850f2de61SShawn Guo # endif
11950f2de61SShawn Guo # define cpu_is_mx31()		(mxc_cpu_type == MXC_CPU_MX31)
12050f2de61SShawn Guo #else
12150f2de61SShawn Guo # define cpu_is_mx31()		(0)
12250f2de61SShawn Guo #endif
12350f2de61SShawn Guo 
12450f2de61SShawn Guo #ifdef CONFIG_SOC_IMX35
12550f2de61SShawn Guo # ifdef mxc_cpu_type
12650f2de61SShawn Guo #  undef mxc_cpu_type
12750f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
12850f2de61SShawn Guo # else
12950f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX35
13050f2de61SShawn Guo # endif
13150f2de61SShawn Guo # define cpu_is_mx35()		(mxc_cpu_type == MXC_CPU_MX35)
13250f2de61SShawn Guo #else
13350f2de61SShawn Guo # define cpu_is_mx35()		(0)
13450f2de61SShawn Guo #endif
13550f2de61SShawn Guo 
13650f2de61SShawn Guo #ifdef CONFIG_SOC_IMX51
13750f2de61SShawn Guo # ifdef mxc_cpu_type
13850f2de61SShawn Guo #  undef mxc_cpu_type
13950f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
14050f2de61SShawn Guo # else
14150f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX51
14250f2de61SShawn Guo # endif
14350f2de61SShawn Guo # define cpu_is_mx51()		(mxc_cpu_type == MXC_CPU_MX51)
14450f2de61SShawn Guo #else
14550f2de61SShawn Guo # define cpu_is_mx51()		(0)
14650f2de61SShawn Guo #endif
14750f2de61SShawn Guo 
14850f2de61SShawn Guo #ifdef CONFIG_SOC_IMX53
14950f2de61SShawn Guo # ifdef mxc_cpu_type
15050f2de61SShawn Guo #  undef mxc_cpu_type
15150f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
15250f2de61SShawn Guo # else
15350f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX53
15450f2de61SShawn Guo # endif
15550f2de61SShawn Guo # define cpu_is_mx53()		(mxc_cpu_type == MXC_CPU_MX53)
15650f2de61SShawn Guo #else
15750f2de61SShawn Guo # define cpu_is_mx53()		(0)
15850f2de61SShawn Guo #endif
15950f2de61SShawn Guo 
16050f2de61SShawn Guo #ifndef __ASSEMBLY__
161a82eb09fSArnd Bergmann #ifdef CONFIG_SOC_IMX6SL
1629ba64fe3SShawn Guo static inline bool cpu_is_imx6sl(void)
1639ba64fe3SShawn Guo {
1649ba64fe3SShawn Guo 	return __mxc_cpu_type == MXC_CPU_IMX6SL;
1659ba64fe3SShawn Guo }
166a82eb09fSArnd Bergmann #else
167a82eb09fSArnd Bergmann static inline bool cpu_is_imx6sl(void)
168a82eb09fSArnd Bergmann {
169a82eb09fSArnd Bergmann 	return false;
170a82eb09fSArnd Bergmann }
171a82eb09fSArnd Bergmann #endif
1729ba64fe3SShawn Guo 
1733c03a2feSShawn Guo static inline bool cpu_is_imx6dl(void)
1743c03a2feSShawn Guo {
1753c03a2feSShawn Guo 	return __mxc_cpu_type == MXC_CPU_IMX6DL;
1763c03a2feSShawn Guo }
1773c03a2feSShawn Guo 
178d9654dceSShawn Guo static inline bool cpu_is_imx6sx(void)
179d9654dceSShawn Guo {
180d9654dceSShawn Guo 	return __mxc_cpu_type == MXC_CPU_IMX6SX;
181d9654dceSShawn Guo }
182d9654dceSShawn Guo 
1833c03a2feSShawn Guo static inline bool cpu_is_imx6q(void)
1843c03a2feSShawn Guo {
1853c03a2feSShawn Guo 	return __mxc_cpu_type == MXC_CPU_IMX6Q;
1863c03a2feSShawn Guo }
18750f2de61SShawn Guo 
18850f2de61SShawn Guo struct cpu_op {
18950f2de61SShawn Guo 	u32 cpu_rate;
19050f2de61SShawn Guo };
19150f2de61SShawn Guo 
19250f2de61SShawn Guo int tzic_enable_wake(void);
19350f2de61SShawn Guo 
19450f2de61SShawn Guo extern struct cpu_op *(*get_cpu_op)(int *op);
19550f2de61SShawn Guo #endif
19650f2de61SShawn Guo 
19750f2de61SShawn Guo #define cpu_is_mx3()	(cpu_is_mx31() || cpu_is_mx35())
19850f2de61SShawn Guo #define cpu_is_mx2()	(cpu_is_mx21() || cpu_is_mx27())
19950f2de61SShawn Guo 
20050f2de61SShawn Guo #endif /*  __ASM_ARCH_MXC_H__ */
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