150f2de61SShawn Guo /* 25739b919SAnson Huang * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc. 350f2de61SShawn Guo * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 450f2de61SShawn Guo * 550f2de61SShawn Guo * This program is free software; you can redistribute it and/or 650f2de61SShawn Guo * modify it under the terms of the GNU General Public License 750f2de61SShawn Guo * as published by the Free Software Foundation; either version 2 850f2de61SShawn Guo * of the License, or (at your option) any later version. 950f2de61SShawn Guo * This program is distributed in the hope that it will be useful, 1050f2de61SShawn Guo * but WITHOUT ANY WARRANTY; without even the implied warranty of 1150f2de61SShawn Guo * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1250f2de61SShawn Guo * GNU General Public License for more details. 1350f2de61SShawn Guo * 1450f2de61SShawn Guo * You should have received a copy of the GNU General Public License 1550f2de61SShawn Guo * along with this program; if not, write to the Free Software 1650f2de61SShawn Guo * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 1750f2de61SShawn Guo * MA 02110-1301, USA. 1850f2de61SShawn Guo */ 1950f2de61SShawn Guo 2050f2de61SShawn Guo #ifndef __ASM_ARCH_MXC_H__ 2150f2de61SShawn Guo #define __ASM_ARCH_MXC_H__ 2250f2de61SShawn Guo 2350f2de61SShawn Guo #include <linux/types.h> 2450f2de61SShawn Guo 2550f2de61SShawn Guo #ifndef __ASM_ARCH_MXC_HARDWARE_H__ 2650f2de61SShawn Guo #error "Do not include directly." 2750f2de61SShawn Guo #endif 2850f2de61SShawn Guo 2950f2de61SShawn Guo #define MXC_CPU_MX1 1 3050f2de61SShawn Guo #define MXC_CPU_MX21 21 3150f2de61SShawn Guo #define MXC_CPU_MX25 25 3250f2de61SShawn Guo #define MXC_CPU_MX27 27 3350f2de61SShawn Guo #define MXC_CPU_MX31 31 3450f2de61SShawn Guo #define MXC_CPU_MX35 35 3550f2de61SShawn Guo #define MXC_CPU_MX51 51 3650f2de61SShawn Guo #define MXC_CPU_MX53 53 37a2887546SShawn Guo #define MXC_CPU_IMX6SL 0x60 383c03a2feSShawn Guo #define MXC_CPU_IMX6DL 0x61 39d9654dceSShawn Guo #define MXC_CPU_IMX6SX 0x62 403c03a2feSShawn Guo #define MXC_CPU_IMX6Q 0x63 41022d0716SFrank Li #define MXC_CPU_IMX6UL 0x64 42b3ea5757SLeonard Crestez #define MXC_CPU_IMX6ULL 0x65 43*dee5dee2SBai Ping #define MXC_CPU_IMX6SLL 0x67 445739b919SAnson Huang #define MXC_CPU_IMX7D 0x72 4550f2de61SShawn Guo 46ec336b28SAnson Huang #define IMX_DDR_TYPE_LPDDR2 1 47ec336b28SAnson Huang 4850f2de61SShawn Guo #ifndef __ASSEMBLY__ 4950f2de61SShawn Guo extern unsigned int __mxc_cpu_type; 5050f2de61SShawn Guo 51a82eb09fSArnd Bergmann #ifdef CONFIG_SOC_IMX6SL 529ba64fe3SShawn Guo static inline bool cpu_is_imx6sl(void) 539ba64fe3SShawn Guo { 549ba64fe3SShawn Guo return __mxc_cpu_type == MXC_CPU_IMX6SL; 559ba64fe3SShawn Guo } 56a82eb09fSArnd Bergmann #else 57a82eb09fSArnd Bergmann static inline bool cpu_is_imx6sl(void) 58a82eb09fSArnd Bergmann { 59a82eb09fSArnd Bergmann return false; 60a82eb09fSArnd Bergmann } 61a82eb09fSArnd Bergmann #endif 629ba64fe3SShawn Guo 633c03a2feSShawn Guo static inline bool cpu_is_imx6dl(void) 643c03a2feSShawn Guo { 653c03a2feSShawn Guo return __mxc_cpu_type == MXC_CPU_IMX6DL; 663c03a2feSShawn Guo } 673c03a2feSShawn Guo 68d9654dceSShawn Guo static inline bool cpu_is_imx6sx(void) 69d9654dceSShawn Guo { 70d9654dceSShawn Guo return __mxc_cpu_type == MXC_CPU_IMX6SX; 71d9654dceSShawn Guo } 72d9654dceSShawn Guo 73022d0716SFrank Li static inline bool cpu_is_imx6ul(void) 74022d0716SFrank Li { 75022d0716SFrank Li return __mxc_cpu_type == MXC_CPU_IMX6UL; 76022d0716SFrank Li } 77022d0716SFrank Li 78b3ea5757SLeonard Crestez static inline bool cpu_is_imx6ull(void) 79b3ea5757SLeonard Crestez { 80b3ea5757SLeonard Crestez return __mxc_cpu_type == MXC_CPU_IMX6ULL; 81b3ea5757SLeonard Crestez } 82b3ea5757SLeonard Crestez 83*dee5dee2SBai Ping static inline bool cpu_is_imx6sll(void) 84*dee5dee2SBai Ping { 85*dee5dee2SBai Ping return __mxc_cpu_type == MXC_CPU_IMX6SLL; 86*dee5dee2SBai Ping } 87*dee5dee2SBai Ping 883c03a2feSShawn Guo static inline bool cpu_is_imx6q(void) 893c03a2feSShawn Guo { 903c03a2feSShawn Guo return __mxc_cpu_type == MXC_CPU_IMX6Q; 913c03a2feSShawn Guo } 9250f2de61SShawn Guo 935739b919SAnson Huang static inline bool cpu_is_imx7d(void) 945739b919SAnson Huang { 955739b919SAnson Huang return __mxc_cpu_type == MXC_CPU_IMX7D; 965739b919SAnson Huang } 975739b919SAnson Huang 9850f2de61SShawn Guo struct cpu_op { 9950f2de61SShawn Guo u32 cpu_rate; 10050f2de61SShawn Guo }; 10150f2de61SShawn Guo 10250f2de61SShawn Guo int tzic_enable_wake(void); 10350f2de61SShawn Guo 10450f2de61SShawn Guo extern struct cpu_op *(*get_cpu_op)(int *op); 10550f2de61SShawn Guo #endif 10650f2de61SShawn Guo 107c553138fSJohannes Berg #define imx_readl readl_relaxed 108c553138fSJohannes Berg #define imx_readw readw_relaxed 109c553138fSJohannes Berg #define imx_writel writel_relaxed 110c553138fSJohannes Berg #define imx_writew writew_relaxed 111c553138fSJohannes Berg 11250f2de61SShawn Guo #endif /* __ASM_ARCH_MXC_H__ */ 113