xref: /linux/arch/arm/mach-imx/mxc.h (revision 9ba64fe3eb461b95bf11436a13db0d9c79465514)
150f2de61SShawn Guo /*
250f2de61SShawn Guo  * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
350f2de61SShawn Guo  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
450f2de61SShawn Guo  *
550f2de61SShawn Guo  * This program is free software; you can redistribute it and/or
650f2de61SShawn Guo  * modify it under the terms of the GNU General Public License
750f2de61SShawn Guo  * as published by the Free Software Foundation; either version 2
850f2de61SShawn Guo  * of the License, or (at your option) any later version.
950f2de61SShawn Guo  * This program is distributed in the hope that it will be useful,
1050f2de61SShawn Guo  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1150f2de61SShawn Guo  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1250f2de61SShawn Guo  * GNU General Public License for more details.
1350f2de61SShawn Guo  *
1450f2de61SShawn Guo  * You should have received a copy of the GNU General Public License
1550f2de61SShawn Guo  * along with this program; if not, write to the Free Software
1650f2de61SShawn Guo  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
1750f2de61SShawn Guo  * MA 02110-1301, USA.
1850f2de61SShawn Guo  */
1950f2de61SShawn Guo 
2050f2de61SShawn Guo #ifndef __ASM_ARCH_MXC_H__
2150f2de61SShawn Guo #define __ASM_ARCH_MXC_H__
2250f2de61SShawn Guo 
2350f2de61SShawn Guo #include <linux/types.h>
2450f2de61SShawn Guo 
2550f2de61SShawn Guo #ifndef __ASM_ARCH_MXC_HARDWARE_H__
2650f2de61SShawn Guo #error "Do not include directly."
2750f2de61SShawn Guo #endif
2850f2de61SShawn Guo 
2950f2de61SShawn Guo #define MXC_CPU_MX1		1
3050f2de61SShawn Guo #define MXC_CPU_MX21		21
3150f2de61SShawn Guo #define MXC_CPU_MX25		25
3250f2de61SShawn Guo #define MXC_CPU_MX27		27
3350f2de61SShawn Guo #define MXC_CPU_MX31		31
3450f2de61SShawn Guo #define MXC_CPU_MX35		35
3550f2de61SShawn Guo #define MXC_CPU_MX51		51
3650f2de61SShawn Guo #define MXC_CPU_MX53		53
37a2887546SShawn Guo #define MXC_CPU_IMX6SL		0x60
383c03a2feSShawn Guo #define MXC_CPU_IMX6DL		0x61
393c03a2feSShawn Guo #define MXC_CPU_IMX6Q		0x63
4050f2de61SShawn Guo 
4150f2de61SShawn Guo #define IMX_CHIP_REVISION_1_0		0x10
4250f2de61SShawn Guo #define IMX_CHIP_REVISION_1_1		0x11
4350f2de61SShawn Guo #define IMX_CHIP_REVISION_1_2		0x12
4450f2de61SShawn Guo #define IMX_CHIP_REVISION_1_3		0x13
4550f2de61SShawn Guo #define IMX_CHIP_REVISION_2_0		0x20
4650f2de61SShawn Guo #define IMX_CHIP_REVISION_2_1		0x21
4750f2de61SShawn Guo #define IMX_CHIP_REVISION_2_2		0x22
4850f2de61SShawn Guo #define IMX_CHIP_REVISION_2_3		0x23
4950f2de61SShawn Guo #define IMX_CHIP_REVISION_3_0		0x30
5050f2de61SShawn Guo #define IMX_CHIP_REVISION_3_1		0x31
5150f2de61SShawn Guo #define IMX_CHIP_REVISION_3_2		0x32
5250f2de61SShawn Guo #define IMX_CHIP_REVISION_3_3		0x33
5350f2de61SShawn Guo #define IMX_CHIP_REVISION_UNKNOWN	0xff
5450f2de61SShawn Guo 
5550f2de61SShawn Guo #ifndef __ASSEMBLY__
5650f2de61SShawn Guo extern unsigned int __mxc_cpu_type;
5750f2de61SShawn Guo #endif
5850f2de61SShawn Guo 
5950f2de61SShawn Guo #ifdef CONFIG_SOC_IMX1
6050f2de61SShawn Guo # ifdef mxc_cpu_type
6150f2de61SShawn Guo #  undef mxc_cpu_type
6250f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
6350f2de61SShawn Guo # else
6450f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX1
6550f2de61SShawn Guo # endif
6650f2de61SShawn Guo # define cpu_is_mx1()		(mxc_cpu_type == MXC_CPU_MX1)
6750f2de61SShawn Guo #else
6850f2de61SShawn Guo # define cpu_is_mx1()		(0)
6950f2de61SShawn Guo #endif
7050f2de61SShawn Guo 
7150f2de61SShawn Guo #ifdef CONFIG_SOC_IMX21
7250f2de61SShawn Guo # ifdef mxc_cpu_type
7350f2de61SShawn Guo #  undef mxc_cpu_type
7450f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
7550f2de61SShawn Guo # else
7650f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX21
7750f2de61SShawn Guo # endif
7850f2de61SShawn Guo # define cpu_is_mx21()		(mxc_cpu_type == MXC_CPU_MX21)
7950f2de61SShawn Guo #else
8050f2de61SShawn Guo # define cpu_is_mx21()		(0)
8150f2de61SShawn Guo #endif
8250f2de61SShawn Guo 
8350f2de61SShawn Guo #ifdef CONFIG_SOC_IMX25
8450f2de61SShawn Guo # ifdef mxc_cpu_type
8550f2de61SShawn Guo #  undef mxc_cpu_type
8650f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
8750f2de61SShawn Guo # else
8850f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX25
8950f2de61SShawn Guo # endif
9050f2de61SShawn Guo # define cpu_is_mx25()		(mxc_cpu_type == MXC_CPU_MX25)
9150f2de61SShawn Guo #else
9250f2de61SShawn Guo # define cpu_is_mx25()		(0)
9350f2de61SShawn Guo #endif
9450f2de61SShawn Guo 
9550f2de61SShawn Guo #ifdef CONFIG_SOC_IMX27
9650f2de61SShawn Guo # ifdef mxc_cpu_type
9750f2de61SShawn Guo #  undef mxc_cpu_type
9850f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
9950f2de61SShawn Guo # else
10050f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX27
10150f2de61SShawn Guo # endif
10250f2de61SShawn Guo # define cpu_is_mx27()		(mxc_cpu_type == MXC_CPU_MX27)
10350f2de61SShawn Guo #else
10450f2de61SShawn Guo # define cpu_is_mx27()		(0)
10550f2de61SShawn Guo #endif
10650f2de61SShawn Guo 
10750f2de61SShawn Guo #ifdef CONFIG_SOC_IMX31
10850f2de61SShawn Guo # ifdef mxc_cpu_type
10950f2de61SShawn Guo #  undef mxc_cpu_type
11050f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
11150f2de61SShawn Guo # else
11250f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX31
11350f2de61SShawn Guo # endif
11450f2de61SShawn Guo # define cpu_is_mx31()		(mxc_cpu_type == MXC_CPU_MX31)
11550f2de61SShawn Guo #else
11650f2de61SShawn Guo # define cpu_is_mx31()		(0)
11750f2de61SShawn Guo #endif
11850f2de61SShawn Guo 
11950f2de61SShawn Guo #ifdef CONFIG_SOC_IMX35
12050f2de61SShawn Guo # ifdef mxc_cpu_type
12150f2de61SShawn Guo #  undef mxc_cpu_type
12250f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
12350f2de61SShawn Guo # else
12450f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX35
12550f2de61SShawn Guo # endif
12650f2de61SShawn Guo # define cpu_is_mx35()		(mxc_cpu_type == MXC_CPU_MX35)
12750f2de61SShawn Guo #else
12850f2de61SShawn Guo # define cpu_is_mx35()		(0)
12950f2de61SShawn Guo #endif
13050f2de61SShawn Guo 
13150f2de61SShawn Guo #ifdef CONFIG_SOC_IMX51
13250f2de61SShawn Guo # ifdef mxc_cpu_type
13350f2de61SShawn Guo #  undef mxc_cpu_type
13450f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
13550f2de61SShawn Guo # else
13650f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX51
13750f2de61SShawn Guo # endif
13850f2de61SShawn Guo # define cpu_is_mx51()		(mxc_cpu_type == MXC_CPU_MX51)
13950f2de61SShawn Guo #else
14050f2de61SShawn Guo # define cpu_is_mx51()		(0)
14150f2de61SShawn Guo #endif
14250f2de61SShawn Guo 
14350f2de61SShawn Guo #ifdef CONFIG_SOC_IMX53
14450f2de61SShawn Guo # ifdef mxc_cpu_type
14550f2de61SShawn Guo #  undef mxc_cpu_type
14650f2de61SShawn Guo #  define mxc_cpu_type __mxc_cpu_type
14750f2de61SShawn Guo # else
14850f2de61SShawn Guo #  define mxc_cpu_type MXC_CPU_MX53
14950f2de61SShawn Guo # endif
15050f2de61SShawn Guo # define cpu_is_mx53()		(mxc_cpu_type == MXC_CPU_MX53)
15150f2de61SShawn Guo #else
15250f2de61SShawn Guo # define cpu_is_mx53()		(0)
15350f2de61SShawn Guo #endif
15450f2de61SShawn Guo 
15550f2de61SShawn Guo #ifndef __ASSEMBLY__
156*9ba64fe3SShawn Guo static inline bool cpu_is_imx6sl(void)
157*9ba64fe3SShawn Guo {
158*9ba64fe3SShawn Guo 	return __mxc_cpu_type == MXC_CPU_IMX6SL;
159*9ba64fe3SShawn Guo }
160*9ba64fe3SShawn Guo 
1613c03a2feSShawn Guo static inline bool cpu_is_imx6dl(void)
1623c03a2feSShawn Guo {
1633c03a2feSShawn Guo 	return __mxc_cpu_type == MXC_CPU_IMX6DL;
1643c03a2feSShawn Guo }
1653c03a2feSShawn Guo 
1663c03a2feSShawn Guo static inline bool cpu_is_imx6q(void)
1673c03a2feSShawn Guo {
1683c03a2feSShawn Guo 	return __mxc_cpu_type == MXC_CPU_IMX6Q;
1693c03a2feSShawn Guo }
17050f2de61SShawn Guo 
17150f2de61SShawn Guo struct cpu_op {
17250f2de61SShawn Guo 	u32 cpu_rate;
17350f2de61SShawn Guo };
17450f2de61SShawn Guo 
17550f2de61SShawn Guo int tzic_enable_wake(void);
17650f2de61SShawn Guo 
17750f2de61SShawn Guo extern struct cpu_op *(*get_cpu_op)(int *op);
17850f2de61SShawn Guo #endif
17950f2de61SShawn Guo 
18050f2de61SShawn Guo #define cpu_is_mx3()	(cpu_is_mx31() || cpu_is_mx35())
18150f2de61SShawn Guo #define cpu_is_mx2()	(cpu_is_mx21() || cpu_is_mx27())
18250f2de61SShawn Guo 
18350f2de61SShawn Guo #endif /*  __ASM_ARCH_MXC_H__ */
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