1*16216333SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 250f2de61SShawn Guo /* 350f2de61SShawn Guo * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 450f2de61SShawn Guo * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 550f2de61SShawn Guo * 650f2de61SShawn Guo * This contains i.MX27-specific hardware definitions. For those 750f2de61SShawn Guo * hardware pieces that are common between i.MX21 and i.MX27, have a 850f2de61SShawn Guo * look at mx2x.h. 950f2de61SShawn Guo */ 1050f2de61SShawn Guo 1150f2de61SShawn Guo #ifndef __MACH_MX27_H__ 1250f2de61SShawn Guo #define __MACH_MX27_H__ 1350f2de61SShawn Guo 1450f2de61SShawn Guo #define MX27_AIPI_BASE_ADDR 0x10000000 1550f2de61SShawn Guo #define MX27_AIPI_SIZE SZ_1M 1650f2de61SShawn Guo 1750f2de61SShawn Guo #define MX27_SAHB1_BASE_ADDR 0x80000000 1850f2de61SShawn Guo #define MX27_SAHB1_SIZE SZ_1M 1950f2de61SShawn Guo 2050f2de61SShawn Guo #define MX27_X_MEMC_BASE_ADDR 0xd8000000 2150f2de61SShawn Guo #define MX27_X_MEMC_SIZE SZ_1M 2250f2de61SShawn Guo 2350f2de61SShawn Guo #define MX27_IO_P2V(x) IMX_IO_P2V(x) 2450f2de61SShawn Guo 2550f2de61SShawn Guo #endif /* ifndef __MACH_MX27_H__ */ 26