1 /* 2 * Copyright 2011 Freescale Semiconductor, Inc. 3 * Copyright 2011 Linaro Ltd. 4 * 5 * The code contained herein is licensed under the GNU General Public 6 * License. You may obtain a copy of the GNU General Public License 7 * Version 2 or later at the following locations: 8 * 9 * http://www.opensource.org/licenses/gpl-license.html 10 * http://www.gnu.org/copyleft/gpl.html 11 */ 12 13 #include <linux/errno.h> 14 #include <asm/cacheflush.h> 15 #include <asm/cp15.h> 16 #include <mach/common.h> 17 18 int platform_cpu_kill(unsigned int cpu) 19 { 20 return 1; 21 } 22 23 static inline void cpu_enter_lowpower(void) 24 { 25 unsigned int v; 26 27 flush_cache_all(); 28 asm volatile( 29 "mcr p15, 0, %1, c7, c5, 0\n" 30 " mcr p15, 0, %1, c7, c10, 4\n" 31 /* 32 * Turn off coherency 33 */ 34 " mrc p15, 0, %0, c1, c0, 1\n" 35 " bic %0, %0, %3\n" 36 " mcr p15, 0, %0, c1, c0, 1\n" 37 " mrc p15, 0, %0, c1, c0, 0\n" 38 " bic %0, %0, %2\n" 39 " mcr p15, 0, %0, c1, c0, 0\n" 40 : "=&r" (v) 41 : "r" (0), "Ir" (CR_C), "Ir" (0x40) 42 : "cc"); 43 } 44 45 static inline void cpu_leave_lowpower(void) 46 { 47 unsigned int v; 48 49 asm volatile( 50 "mrc p15, 0, %0, c1, c0, 0\n" 51 " orr %0, %0, %1\n" 52 " mcr p15, 0, %0, c1, c0, 0\n" 53 " mrc p15, 0, %0, c1, c0, 1\n" 54 " orr %0, %0, %2\n" 55 " mcr p15, 0, %0, c1, c0, 1\n" 56 : "=&r" (v) 57 : "Ir" (CR_C), "Ir" (0x40) 58 : "cc"); 59 } 60 61 /* 62 * platform-specific code to shutdown a CPU 63 * 64 * Called with IRQs disabled 65 */ 66 void platform_cpu_die(unsigned int cpu) 67 { 68 cpu_enter_lowpower(); 69 imx_enable_cpu(cpu, false); 70 cpu_do_idle(); 71 cpu_leave_lowpower(); 72 73 /* We should never return from idle */ 74 panic("cpu %d unexpectedly exit from shutdown\n", cpu); 75 } 76 77 int platform_cpu_disable(unsigned int cpu) 78 { 79 /* 80 * we don't allow CPU 0 to be shutdown (it is still too special 81 * e.g. clock tick interrupts) 82 */ 83 return cpu == 0 ? -EPERM : 0; 84 } 85