1 /* 2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 * 11 * This file contains the CPU initialization code. 12 */ 13 14 #include <linux/types.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 #include <linux/io.h> 19 #include <linux/of.h> 20 #include <linux/of_address.h> 21 22 #include "hardware.h" 23 #include "common.h" 24 25 static int mx5_cpu_rev = -1; 26 27 #define IIM_SREV 0x24 28 29 static u32 imx5_read_srev_reg(const char *compat) 30 { 31 void __iomem *iim_base; 32 struct device_node *np; 33 u32 srev; 34 35 np = of_find_compatible_node(NULL, NULL, compat); 36 iim_base = of_iomap(np, 0); 37 WARN_ON(!iim_base); 38 39 srev = readl(iim_base + IIM_SREV) & 0xff; 40 41 iounmap(iim_base); 42 43 return srev; 44 } 45 46 static int get_mx51_srev(void) 47 { 48 u32 rev = imx5_read_srev_reg("fsl,imx51-iim"); 49 50 switch (rev) { 51 case 0x0: 52 return IMX_CHIP_REVISION_2_0; 53 case 0x10: 54 return IMX_CHIP_REVISION_3_0; 55 default: 56 return IMX_CHIP_REVISION_UNKNOWN; 57 } 58 } 59 60 /* 61 * Returns: 62 * the silicon revision of the cpu 63 * -EINVAL - not a mx51 64 */ 65 int mx51_revision(void) 66 { 67 if (!cpu_is_mx51()) 68 return -EINVAL; 69 70 if (mx5_cpu_rev == -1) 71 mx5_cpu_rev = get_mx51_srev(); 72 73 return mx5_cpu_rev; 74 } 75 EXPORT_SYMBOL(mx51_revision); 76 77 #ifdef CONFIG_NEON 78 79 /* 80 * All versions of the silicon before Rev. 3 have broken NEON implementations. 81 * Dependent on link order - so the assumption is that vfp_init is called 82 * before us. 83 */ 84 int __init mx51_neon_fixup(void) 85 { 86 if (mx51_revision() < IMX_CHIP_REVISION_3_0 && 87 (elf_hwcap & HWCAP_NEON)) { 88 elf_hwcap &= ~HWCAP_NEON; 89 pr_info("Turning off NEON support, detected broken NEON implementation\n"); 90 } 91 return 0; 92 } 93 94 #endif 95 96 static int get_mx53_srev(void) 97 { 98 u32 rev = imx5_read_srev_reg("fsl,imx53-iim"); 99 100 switch (rev) { 101 case 0x0: 102 return IMX_CHIP_REVISION_1_0; 103 case 0x2: 104 return IMX_CHIP_REVISION_2_0; 105 case 0x3: 106 return IMX_CHIP_REVISION_2_1; 107 default: 108 return IMX_CHIP_REVISION_UNKNOWN; 109 } 110 } 111 112 /* 113 * Returns: 114 * the silicon revision of the cpu 115 * -EINVAL - not a mx53 116 */ 117 int mx53_revision(void) 118 { 119 if (!cpu_is_mx53()) 120 return -EINVAL; 121 122 if (mx5_cpu_rev == -1) 123 mx5_cpu_rev = get_mx53_srev(); 124 125 return mx5_cpu_rev; 126 } 127 EXPORT_SYMBOL(mx53_revision); 128