12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 227ad4bf7SUwe Kleine-König /* 327ad4bf7SUwe Kleine-König * MX35 CPU type detection 427ad4bf7SUwe Kleine-König * 527ad4bf7SUwe Kleine-König * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> 627ad4bf7SUwe Kleine-König */ 727ad4bf7SUwe Kleine-König #include <linux/module.h> 8f68ea682SFabio Estevam #include <linux/of_address.h> 927ad4bf7SUwe Kleine-König #include <linux/io.h> 1017c342aeSShawn Guo 1150f2de61SShawn Guo #include "hardware.h" 1217c342aeSShawn Guo #include "iim.h" 1327ad4bf7SUwe Kleine-König 148d75a262SJason Liu static int mx35_cpu_rev = -1; 1527ad4bf7SUwe Kleine-König 168d75a262SJason Liu static int mx35_read_cpu_rev(void) 1727ad4bf7SUwe Kleine-König { 18f68ea682SFabio Estevam void __iomem *iim_base; 19f68ea682SFabio Estevam struct device_node *np; 2027ad4bf7SUwe Kleine-König u32 rev; 2127ad4bf7SUwe Kleine-König 22f68ea682SFabio Estevam np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim"); 23f68ea682SFabio Estevam iim_base = of_iomap(np, 0); 24*87b30c4bSDario Binacchi of_node_put(np); 25f68ea682SFabio Estevam BUG_ON(!iim_base); 26f68ea682SFabio Estevam 27f68ea682SFabio Estevam rev = imx_readl(iim_base + MXC_IIMSREV); 2827ad4bf7SUwe Kleine-König switch (rev) { 2927ad4bf7SUwe Kleine-König case 0x00: 308d75a262SJason Liu return IMX_CHIP_REVISION_1_0; 3127ad4bf7SUwe Kleine-König case 0x10: 328d75a262SJason Liu return IMX_CHIP_REVISION_2_0; 3327ad4bf7SUwe Kleine-König case 0x11: 348d75a262SJason Liu return IMX_CHIP_REVISION_2_1; 3527ad4bf7SUwe Kleine-König default: 368d75a262SJason Liu return IMX_CHIP_REVISION_UNKNOWN; 378d75a262SJason Liu } 3827ad4bf7SUwe Kleine-König } 3927ad4bf7SUwe Kleine-König 408d75a262SJason Liu int mx35_revision(void) 418d75a262SJason Liu { 428d75a262SJason Liu if (mx35_cpu_rev == -1) 438d75a262SJason Liu mx35_cpu_rev = mx35_read_cpu_rev(); 448d75a262SJason Liu 458d75a262SJason Liu return mx35_cpu_rev; 4627ad4bf7SUwe Kleine-König } 478d75a262SJason Liu EXPORT_SYMBOL(mx35_revision); 48