1 /* 2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved. 3 */ 4 5 /* 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #ifndef __ASM_ARCH_MXC_COMMON_H__ 12 #define __ASM_ARCH_MXC_COMMON_H__ 13 14 #include <linux/reboot.h> 15 16 struct irq_data; 17 struct platform_device; 18 struct pt_regs; 19 struct clk; 20 struct device_node; 21 enum mxc_cpu_pwr_mode; 22 struct of_device_id; 23 24 void mx21_map_io(void); 25 void mx27_map_io(void); 26 void mx31_map_io(void); 27 void mx35_map_io(void); 28 void imx21_init_early(void); 29 void imx27_init_early(void); 30 void imx31_init_early(void); 31 void imx35_init_early(void); 32 void mxc_init_irq(void __iomem *); 33 void mx21_init_irq(void); 34 void mx27_init_irq(void); 35 void mx31_init_irq(void); 36 void mx35_init_irq(void); 37 void imx21_soc_init(void); 38 void imx27_soc_init(void); 39 void imx31_soc_init(void); 40 void imx35_soc_init(void); 41 void epit_timer_init(void __iomem *base, int irq); 42 int mx21_clocks_init(unsigned long lref, unsigned long fref); 43 int mx27_clocks_init(unsigned long fref); 44 int mx31_clocks_init(unsigned long fref); 45 int mx35_clocks_init(void); 46 struct platform_device *mxc_register_gpio(char *name, int id, 47 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 48 void mxc_set_cpu_type(unsigned int type); 49 void mxc_restart(enum reboot_mode, const char *); 50 void mxc_arch_reset_init(void __iomem *); 51 void imx1_reset_init(void __iomem *); 52 void imx_set_aips(void __iomem *); 53 void imx_aips_allow_unprivileged_access(const char *compat); 54 int mxc_device_init(void); 55 void imx_set_soc_revision(unsigned int rev); 56 void imx_init_revision_from_anatop(void); 57 struct device *imx_soc_device_init(void); 58 void imx6_enable_rbc(bool enable); 59 void imx_gpc_check_dt(void); 60 void imx_gpc_set_arm_power_in_lpm(bool power_off); 61 void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw); 62 void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw); 63 void imx25_pm_init(void); 64 void imx27_pm_init(void); 65 66 enum mxc_cpu_pwr_mode { 67 WAIT_CLOCKED, /* wfi only */ 68 WAIT_UNCLOCKED, /* WAIT */ 69 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ 70 STOP_POWER_ON, /* just STOP */ 71 STOP_POWER_OFF, /* STOP + SRPG */ 72 }; 73 74 enum mx3_cpu_pwr_mode { 75 MX3_RUN, 76 MX3_WAIT, 77 MX3_DOZE, 78 MX3_SLEEP, 79 }; 80 81 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode); 82 83 void imx_enable_cpu(int cpu, bool enable); 84 void imx_set_cpu_jump(int cpu, void *jump_addr); 85 u32 imx_get_cpu_arg(int cpu); 86 void imx_set_cpu_arg(int cpu, u32 arg); 87 #ifdef CONFIG_SMP 88 void v7_secondary_startup(void); 89 void imx_scu_map_io(void); 90 void imx_smp_prepare(void); 91 #else 92 static inline void imx_scu_map_io(void) {} 93 static inline void imx_smp_prepare(void) {} 94 #endif 95 void imx_src_init(void); 96 void imx_gpc_pre_suspend(bool arm_power_off); 97 void imx_gpc_post_resume(void); 98 void imx_gpc_mask_all(void); 99 void imx_gpc_restore_all(void); 100 void imx_gpc_hwirq_mask(unsigned int hwirq); 101 void imx_gpc_hwirq_unmask(unsigned int hwirq); 102 void imx_anatop_init(void); 103 void imx_anatop_pre_suspend(void); 104 void imx_anatop_post_resume(void); 105 int imx6_set_lpm(enum mxc_cpu_pwr_mode mode); 106 void imx6_set_int_mem_clk_lpm(bool enable); 107 void imx6sl_set_wait_clk(bool enter); 108 int imx_mmdc_get_ddr_type(void); 109 110 void imx_cpu_die(unsigned int cpu); 111 int imx_cpu_kill(unsigned int cpu); 112 113 #ifdef CONFIG_SUSPEND 114 void v7_cpu_resume(void); 115 void imx53_suspend(void __iomem *ocram_vbase); 116 extern const u32 imx53_suspend_sz; 117 void imx6_suspend(void __iomem *ocram_vbase); 118 #else 119 static inline void v7_cpu_resume(void) {} 120 static inline void imx53_suspend(void __iomem *ocram_vbase) {} 121 static const u32 imx53_suspend_sz; 122 static inline void imx6_suspend(void __iomem *ocram_vbase) {} 123 #endif 124 125 void imx6_pm_ccm_init(const char *ccm_compat); 126 void imx6q_pm_init(void); 127 void imx6dl_pm_init(void); 128 void imx6sl_pm_init(void); 129 void imx6sx_pm_init(void); 130 void imx6ul_pm_init(void); 131 132 #ifdef CONFIG_PM 133 void imx51_pm_init(void); 134 void imx53_pm_init(void); 135 #else 136 static inline void imx51_pm_init(void) {} 137 static inline void imx53_pm_init(void) {} 138 #endif 139 140 #ifdef CONFIG_NEON 141 int mx51_neon_fixup(void); 142 #else 143 static inline int mx51_neon_fixup(void) { return 0; } 144 #endif 145 146 #ifdef CONFIG_CACHE_L2X0 147 void imx_init_l2cache(void); 148 #else 149 static inline void imx_init_l2cache(void) {} 150 #endif 151 152 extern const struct smp_operations imx_smp_ops; 153 extern const struct smp_operations ls1021a_smp_ops; 154 155 #endif 156