1 /* 2 * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved. 3 */ 4 5 /* 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #ifndef __ASM_ARCH_MXC_COMMON_H__ 12 #define __ASM_ARCH_MXC_COMMON_H__ 13 14 #include <linux/reboot.h> 15 16 struct platform_device; 17 struct pt_regs; 18 struct clk; 19 enum mxc_cpu_pwr_mode; 20 21 extern void mx1_map_io(void); 22 extern void mx21_map_io(void); 23 extern void mx25_map_io(void); 24 extern void mx27_map_io(void); 25 extern void mx31_map_io(void); 26 extern void mx35_map_io(void); 27 extern void mx51_map_io(void); 28 extern void mx53_map_io(void); 29 extern void imx1_init_early(void); 30 extern void imx21_init_early(void); 31 extern void imx25_init_early(void); 32 extern void imx27_init_early(void); 33 extern void imx31_init_early(void); 34 extern void imx35_init_early(void); 35 extern void imx51_init_early(void); 36 extern void imx53_init_early(void); 37 extern void mxc_init_irq(void __iomem *); 38 extern void tzic_init_irq(void __iomem *); 39 extern void mx1_init_irq(void); 40 extern void mx21_init_irq(void); 41 extern void mx25_init_irq(void); 42 extern void mx27_init_irq(void); 43 extern void mx31_init_irq(void); 44 extern void mx35_init_irq(void); 45 extern void mx51_init_irq(void); 46 extern void mx53_init_irq(void); 47 extern void imx1_soc_init(void); 48 extern void imx21_soc_init(void); 49 extern void imx25_soc_init(void); 50 extern void imx27_soc_init(void); 51 extern void imx31_soc_init(void); 52 extern void imx35_soc_init(void); 53 extern void imx51_soc_init(void); 54 extern void imx51_init_late(void); 55 extern void imx53_init_late(void); 56 extern void epit_timer_init(void __iomem *base, int irq); 57 extern void mxc_timer_init(void __iomem *, int); 58 extern int mx1_clocks_init(unsigned long fref); 59 extern int mx21_clocks_init(unsigned long lref, unsigned long fref); 60 extern int mx25_clocks_init(void); 61 extern int mx27_clocks_init(unsigned long fref); 62 extern int mx31_clocks_init(unsigned long fref); 63 extern int mx35_clocks_init(void); 64 extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, 65 unsigned long ckih1, unsigned long ckih2); 66 extern int mx25_clocks_init_dt(void); 67 extern int mx27_clocks_init_dt(void); 68 extern int mx31_clocks_init_dt(void); 69 extern struct platform_device *mxc_register_gpio(char *name, int id, 70 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 71 extern void mxc_set_cpu_type(unsigned int type); 72 extern void mxc_restart(enum reboot_mode, const char *); 73 extern void mxc_arch_reset_init(void __iomem *); 74 extern void mxc_arch_reset_init_dt(void); 75 extern int mx53_revision(void); 76 extern int imx6q_revision(void); 77 extern int mx53_display_revision(void); 78 extern void imx_set_aips(void __iomem *); 79 extern int mxc_device_init(void); 80 81 enum mxc_cpu_pwr_mode { 82 WAIT_CLOCKED, /* wfi only */ 83 WAIT_UNCLOCKED, /* WAIT */ 84 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ 85 STOP_POWER_ON, /* just STOP */ 86 STOP_POWER_OFF, /* STOP + SRPG */ 87 }; 88 89 enum mx3_cpu_pwr_mode { 90 MX3_RUN, 91 MX3_WAIT, 92 MX3_DOZE, 93 MX3_SLEEP, 94 }; 95 96 extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode); 97 extern void imx_print_silicon_rev(const char *cpu, int srev); 98 99 void avic_handle_irq(struct pt_regs *); 100 void tzic_handle_irq(struct pt_regs *); 101 102 #define imx1_handle_irq avic_handle_irq 103 #define imx21_handle_irq avic_handle_irq 104 #define imx25_handle_irq avic_handle_irq 105 #define imx27_handle_irq avic_handle_irq 106 #define imx31_handle_irq avic_handle_irq 107 #define imx35_handle_irq avic_handle_irq 108 #define imx51_handle_irq tzic_handle_irq 109 #define imx53_handle_irq tzic_handle_irq 110 111 extern void imx_enable_cpu(int cpu, bool enable); 112 extern void imx_set_cpu_jump(int cpu, void *jump_addr); 113 extern u32 imx_get_cpu_arg(int cpu); 114 extern void imx_set_cpu_arg(int cpu, u32 arg); 115 extern void v7_cpu_resume(void); 116 #ifdef CONFIG_SMP 117 extern void v7_secondary_startup(void); 118 extern void imx_scu_map_io(void); 119 extern void imx_smp_prepare(void); 120 extern void imx_scu_standby_enable(void); 121 #else 122 static inline void imx_scu_map_io(void) {} 123 static inline void imx_smp_prepare(void) {} 124 static inline void imx_scu_standby_enable(void) {} 125 #endif 126 extern void imx_src_init(void); 127 extern void imx_src_prepare_restart(void); 128 extern void imx_gpc_init(void); 129 extern void imx_gpc_pre_suspend(void); 130 extern void imx_gpc_post_resume(void); 131 extern void imx_gpc_mask_all(void); 132 extern void imx_gpc_restore_all(void); 133 extern void imx_anatop_init(void); 134 extern void imx_anatop_pre_suspend(void); 135 extern void imx_anatop_post_resume(void); 136 extern u32 imx_anatop_get_digprog(void); 137 extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 138 extern void imx6q_set_chicken_bit(void); 139 140 extern void imx_cpu_die(unsigned int cpu); 141 extern int imx_cpu_kill(unsigned int cpu); 142 143 #ifdef CONFIG_PM 144 extern void imx6q_pm_init(void); 145 extern void imx5_pm_init(void); 146 #else 147 static inline void imx6q_pm_init(void) {} 148 static inline void imx5_pm_init(void) {} 149 #endif 150 151 #ifdef CONFIG_NEON 152 extern int mx51_neon_fixup(void); 153 #else 154 static inline int mx51_neon_fixup(void) { return 0; } 155 #endif 156 157 #ifdef CONFIG_CACHE_L2X0 158 extern void imx_init_l2cache(void); 159 #else 160 static inline void imx_init_l2cache(void) {} 161 #endif 162 163 extern struct smp_operations imx_smp_ops; 164 165 #endif 166