1 /* 2 * Copyright (C) 2013-2015 Freescale Semiconductor, Inc. 3 * Copyright 2017-2018 NXP. 4 * 5 * The code contained herein is licensed under the GNU General Public 6 * License. You may obtain a copy of the GNU General Public License 7 * Version 2 or later at the following locations: 8 * 9 * http://www.opensource.org/licenses/gpl-license.html 10 * http://www.gnu.org/copyleft/gpl.html 11 */ 12 13 #include <linux/err.h> 14 #include <linux/io.h> 15 #include <linux/of.h> 16 #include <linux/of_address.h> 17 #include <linux/mfd/syscon.h> 18 #include <linux/regmap.h> 19 #include "common.h" 20 #include "hardware.h" 21 22 #define REG_SET 0x4 23 #define REG_CLR 0x8 24 25 #define ANADIG_REG_2P5 0x130 26 #define ANADIG_REG_CORE 0x140 27 #define ANADIG_ANA_MISC0 0x150 28 #define ANADIG_USB1_CHRG_DETECT 0x1b0 29 #define ANADIG_USB2_CHRG_DETECT 0x210 30 #define ANADIG_DIGPROG 0x260 31 #define ANADIG_DIGPROG_IMX6SL 0x280 32 #define ANADIG_DIGPROG_IMX7D 0x800 33 34 #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000 35 #define BM_ANADIG_REG_2P5_ENABLE_PULLDOWN 0x8 36 #define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000 37 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG 0x1000 38 /* Below MISC0_DISCON_HIGH_SNVS is only for i.MX6SL */ 39 #define BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS 0x2000 40 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x80000 41 #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x100000 42 43 static struct regmap *anatop; 44 45 static void imx_anatop_enable_weak2p5(bool enable) 46 { 47 u32 reg, val; 48 49 regmap_read(anatop, ANADIG_ANA_MISC0, &val); 50 51 /* can only be enabled when stop_mode_config is clear. */ 52 reg = ANADIG_REG_2P5; 53 reg += (enable && (val & BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG) == 0) ? 54 REG_SET : REG_CLR; 55 regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG); 56 } 57 58 static void imx_anatop_enable_fet_odrive(bool enable) 59 { 60 regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR), 61 BM_ANADIG_REG_CORE_FET_ODRIVE); 62 } 63 64 static inline void imx_anatop_enable_2p5_pulldown(bool enable) 65 { 66 regmap_write(anatop, ANADIG_REG_2P5 + (enable ? REG_SET : REG_CLR), 67 BM_ANADIG_REG_2P5_ENABLE_PULLDOWN); 68 } 69 70 static inline void imx_anatop_disconnect_high_snvs(bool enable) 71 { 72 regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), 73 BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS); 74 } 75 76 void imx_anatop_pre_suspend(void) 77 { 78 if (imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2) 79 imx_anatop_enable_2p5_pulldown(true); 80 else 81 imx_anatop_enable_weak2p5(true); 82 83 imx_anatop_enable_fet_odrive(true); 84 85 if (cpu_is_imx6sl()) 86 imx_anatop_disconnect_high_snvs(true); 87 } 88 89 void imx_anatop_post_resume(void) 90 { 91 if (imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2) 92 imx_anatop_enable_2p5_pulldown(false); 93 else 94 imx_anatop_enable_weak2p5(false); 95 96 imx_anatop_enable_fet_odrive(false); 97 98 if (cpu_is_imx6sl()) 99 imx_anatop_disconnect_high_snvs(false); 100 101 } 102 103 static void imx_anatop_usb_chrg_detect_disable(void) 104 { 105 regmap_write(anatop, ANADIG_USB1_CHRG_DETECT, 106 BM_ANADIG_USB_CHRG_DETECT_EN_B 107 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); 108 regmap_write(anatop, ANADIG_USB2_CHRG_DETECT, 109 BM_ANADIG_USB_CHRG_DETECT_EN_B | 110 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); 111 } 112 113 void __init imx_init_revision_from_anatop(void) 114 { 115 struct device_node *np; 116 void __iomem *anatop_base; 117 unsigned int revision; 118 u32 digprog; 119 u16 offset = ANADIG_DIGPROG; 120 u8 major_part, minor_part; 121 122 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); 123 anatop_base = of_iomap(np, 0); 124 WARN_ON(!anatop_base); 125 if (of_device_is_compatible(np, "fsl,imx6sl-anatop")) 126 offset = ANADIG_DIGPROG_IMX6SL; 127 if (of_device_is_compatible(np, "fsl,imx7d-anatop")) 128 offset = ANADIG_DIGPROG_IMX7D; 129 digprog = readl_relaxed(anatop_base + offset); 130 iounmap(anatop_base); 131 132 /* 133 * On i.MX7D digprog value match linux version format, so 134 * it needn't map again and we can use register value directly. 135 */ 136 if (of_device_is_compatible(np, "fsl,imx7d-anatop")) { 137 revision = digprog & 0xff; 138 } else { 139 /* 140 * MAJOR: [15:8], the major silicon revison; 141 * MINOR: [7: 0], the minor silicon revison; 142 * 143 * please refer to the i.MX RM for the detailed 144 * silicon revison bit define. 145 * format the major part and minor part to match the 146 * linux kernel soc version format. 147 */ 148 major_part = (digprog >> 8) & 0xf; 149 minor_part = digprog & 0xf; 150 revision = ((major_part + 1) << 4) | minor_part; 151 } 152 153 mxc_set_cpu_type(digprog >> 16 & 0xff); 154 imx_set_soc_revision(revision); 155 } 156 157 void __init imx_anatop_init(void) 158 { 159 anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); 160 if (IS_ERR(anatop)) { 161 pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__); 162 return; 163 } 164 165 imx_anatop_usb_chrg_detect_disable(); 166 } 167