1 /* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 #include <linux/clk.h> 17 #include <linux/clkdev.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/io.h> 20 #include <linux/irq.h> 21 #include <linux/irqdomain.h> 22 #include <linux/of.h> 23 #include <linux/of_irq.h> 24 #include <linux/of_platform.h> 25 #include <linux/of_address.h> 26 #include <linux/smp.h> 27 #include <linux/amba/bus.h> 28 29 #include <asm/arch_timer.h> 30 #include <asm/cacheflush.h> 31 #include <asm/smp_plat.h> 32 #include <asm/smp_twd.h> 33 #include <asm/hardware/arm_timer.h> 34 #include <asm/hardware/timer-sp.h> 35 #include <asm/hardware/gic.h> 36 #include <asm/hardware/cache-l2x0.h> 37 #include <asm/mach/arch.h> 38 #include <asm/mach/map.h> 39 #include <asm/mach/time.h> 40 41 #include "core.h" 42 #include "sysregs.h" 43 44 void __iomem *sregs_base; 45 void __iomem *scu_base_addr; 46 47 static void __init highbank_scu_map_io(void) 48 { 49 unsigned long base; 50 51 /* Get SCU base */ 52 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); 53 54 scu_base_addr = ioremap(base, SZ_4K); 55 } 56 57 #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) 58 #define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) 59 60 void highbank_set_cpu_jump(int cpu, void *jump_addr) 61 { 62 cpu = cpu_logical_map(cpu); 63 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); 64 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 65 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 66 HB_JUMP_TABLE_PHYS(cpu) + 15); 67 } 68 69 const static struct of_device_id irq_match[] = { 70 { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, }, 71 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, 72 {} 73 }; 74 75 #ifdef CONFIG_CACHE_L2X0 76 static void highbank_l2x0_disable(void) 77 { 78 /* Disable PL310 L2 Cache controller */ 79 highbank_smc1(0x102, 0x0); 80 } 81 #endif 82 83 static void __init highbank_init_irq(void) 84 { 85 of_irq_init(irq_match); 86 87 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) 88 highbank_scu_map_io(); 89 90 #ifdef CONFIG_CACHE_L2X0 91 /* Enable PL310 L2 Cache controller */ 92 highbank_smc1(0x102, 0x1); 93 l2x0_of_init(0, ~0UL); 94 outer_cache.disable = highbank_l2x0_disable; 95 #endif 96 } 97 98 static struct clk_lookup lookup = { 99 .dev_id = "sp804", 100 .con_id = NULL, 101 }; 102 103 static void __init highbank_timer_init(void) 104 { 105 int irq; 106 struct device_node *np; 107 void __iomem *timer_base; 108 109 /* Map system registers */ 110 np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); 111 sregs_base = of_iomap(np, 0); 112 WARN_ON(!sregs_base); 113 114 np = of_find_compatible_node(NULL, NULL, "arm,sp804"); 115 timer_base = of_iomap(np, 0); 116 WARN_ON(!timer_base); 117 irq = irq_of_parse_and_map(np, 0); 118 119 highbank_clocks_init(); 120 lookup.clk = of_clk_get(np, 0); 121 clkdev_add(&lookup); 122 123 sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1"); 124 sp804_clockevents_init(timer_base, irq, "timer0"); 125 126 twd_local_timer_of_register(); 127 128 arch_timer_of_register(); 129 arch_timer_sched_clock_init(); 130 } 131 132 static struct sys_timer highbank_timer = { 133 .init = highbank_timer_init, 134 }; 135 136 static void highbank_power_off(void) 137 { 138 hignbank_set_pwr_shutdown(); 139 140 while (1) 141 cpu_do_idle(); 142 } 143 144 static int highbank_platform_notifier(struct notifier_block *nb, 145 unsigned long event, void *__dev) 146 { 147 struct resource *res; 148 int reg = -1; 149 struct device *dev = __dev; 150 151 if (event != BUS_NOTIFY_ADD_DEVICE) 152 return NOTIFY_DONE; 153 154 if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci")) 155 reg = 0xc; 156 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci")) 157 reg = 0x18; 158 else if (of_device_is_compatible(dev->of_node, "arm,pl330")) 159 reg = 0x20; 160 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) { 161 res = platform_get_resource(to_platform_device(dev), 162 IORESOURCE_MEM, 0); 163 if (res) { 164 if (res->start == 0xfff50000) 165 reg = 0; 166 else if (res->start == 0xfff51000) 167 reg = 4; 168 } 169 } 170 171 if (reg < 0) 172 return NOTIFY_DONE; 173 174 if (of_property_read_bool(dev->of_node, "dma-coherent")) { 175 writel(0xff31, sregs_base + reg); 176 set_dma_ops(dev, &arm_coherent_dma_ops); 177 } else 178 writel(0, sregs_base + reg); 179 180 return NOTIFY_OK; 181 } 182 183 static struct notifier_block highbank_amba_nb = { 184 .notifier_call = highbank_platform_notifier, 185 }; 186 187 static struct notifier_block highbank_platform_nb = { 188 .notifier_call = highbank_platform_notifier, 189 }; 190 191 static void __init highbank_init(void) 192 { 193 pm_power_off = highbank_power_off; 194 highbank_pm_init(); 195 196 bus_register_notifier(&platform_bus_type, &highbank_platform_nb); 197 bus_register_notifier(&amba_bustype, &highbank_amba_nb); 198 199 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 200 } 201 202 static const char *highbank_match[] __initconst = { 203 "calxeda,highbank", 204 "calxeda,ecx-2000", 205 NULL, 206 }; 207 208 DT_MACHINE_START(HIGHBANK, "Highbank") 209 .smp = smp_ops(highbank_smp_ops), 210 .map_io = debug_ll_io_init, 211 .init_irq = highbank_init_irq, 212 .timer = &highbank_timer, 213 .handle_irq = gic_handle_irq, 214 .init_machine = highbank_init, 215 .dt_compat = highbank_match, 216 .restart = highbank_restart, 217 MACHINE_END 218