xref: /linux/arch/arm/mach-highbank/highbank.c (revision bf14fc54d6386ccd1ef3f1b0ff69e7a765cf8ded)
1220e6cf7SRob Herring /*
2220e6cf7SRob Herring  * Copyright 2010-2011 Calxeda, Inc.
3220e6cf7SRob Herring  *
4220e6cf7SRob Herring  * This program is free software; you can redistribute it and/or modify it
5220e6cf7SRob Herring  * under the terms and conditions of the GNU General Public License,
6220e6cf7SRob Herring  * version 2, as published by the Free Software Foundation.
7220e6cf7SRob Herring  *
8220e6cf7SRob Herring  * This program is distributed in the hope it will be useful, but WITHOUT
9220e6cf7SRob Herring  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10220e6cf7SRob Herring  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11220e6cf7SRob Herring  * more details.
12220e6cf7SRob Herring  *
13220e6cf7SRob Herring  * You should have received a copy of the GNU General Public License along with
14220e6cf7SRob Herring  * this program.  If not, see <http://www.gnu.org/licenses/>.
15220e6cf7SRob Herring  */
16220e6cf7SRob Herring #include <linux/clk.h>
17220e6cf7SRob Herring #include <linux/clkdev.h>
18220e6cf7SRob Herring #include <linux/io.h>
19220e6cf7SRob Herring #include <linux/irq.h>
20220e6cf7SRob Herring #include <linux/irqdomain.h>
21220e6cf7SRob Herring #include <linux/of.h>
22220e6cf7SRob Herring #include <linux/of_irq.h>
23220e6cf7SRob Herring #include <linux/of_platform.h>
24220e6cf7SRob Herring #include <linux/of_address.h>
25*bf14fc54SWill Deacon #include <linux/smp.h>
26220e6cf7SRob Herring 
27220e6cf7SRob Herring #include <asm/cacheflush.h>
28220e6cf7SRob Herring #include <asm/unified.h>
29220e6cf7SRob Herring #include <asm/smp_scu.h>
30220e6cf7SRob Herring #include <asm/hardware/arm_timer.h>
31220e6cf7SRob Herring #include <asm/hardware/timer-sp.h>
32220e6cf7SRob Herring #include <asm/hardware/gic.h>
33220e6cf7SRob Herring #include <asm/hardware/cache-l2x0.h>
34220e6cf7SRob Herring #include <asm/mach/arch.h>
35220e6cf7SRob Herring #include <asm/mach/map.h>
36220e6cf7SRob Herring #include <asm/mach/time.h>
37220e6cf7SRob Herring #include <mach/irqs.h>
38220e6cf7SRob Herring 
39220e6cf7SRob Herring #include "core.h"
40220e6cf7SRob Herring #include "sysregs.h"
41220e6cf7SRob Herring 
42220e6cf7SRob Herring void __iomem *sregs_base;
43220e6cf7SRob Herring 
44220e6cf7SRob Herring #define HB_SCU_VIRT_BASE	0xfee00000
45220e6cf7SRob Herring void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
46220e6cf7SRob Herring 
47220e6cf7SRob Herring static struct map_desc scu_io_desc __initdata = {
48220e6cf7SRob Herring 	.virtual	= HB_SCU_VIRT_BASE,
49220e6cf7SRob Herring 	.pfn		= 0, /* run-time */
50220e6cf7SRob Herring 	.length		= SZ_4K,
51220e6cf7SRob Herring 	.type		= MT_DEVICE,
52220e6cf7SRob Herring };
53220e6cf7SRob Herring 
54220e6cf7SRob Herring static void __init highbank_scu_map_io(void)
55220e6cf7SRob Herring {
56220e6cf7SRob Herring 	unsigned long base;
57220e6cf7SRob Herring 
58220e6cf7SRob Herring 	/* Get SCU base */
59220e6cf7SRob Herring 	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
60220e6cf7SRob Herring 
61220e6cf7SRob Herring 	scu_io_desc.pfn = __phys_to_pfn(base);
62220e6cf7SRob Herring 	iotable_init(&scu_io_desc, 1);
63220e6cf7SRob Herring }
64220e6cf7SRob Herring 
65220e6cf7SRob Herring static void __init highbank_map_io(void)
66220e6cf7SRob Herring {
67220e6cf7SRob Herring 	highbank_scu_map_io();
68220e6cf7SRob Herring 	highbank_lluart_map_io();
69220e6cf7SRob Herring }
70220e6cf7SRob Herring 
71220e6cf7SRob Herring #define HB_JUMP_TABLE_PHYS(cpu)		(0x40 + (0x10 * (cpu)))
72220e6cf7SRob Herring #define HB_JUMP_TABLE_VIRT(cpu)		phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
73220e6cf7SRob Herring 
74220e6cf7SRob Herring void highbank_set_cpu_jump(int cpu, void *jump_addr)
75220e6cf7SRob Herring {
76*bf14fc54SWill Deacon #ifdef CONFIG_SMP
77*bf14fc54SWill Deacon 	cpu = cpu_logical_map(cpu);
78*bf14fc54SWill Deacon #endif
79220e6cf7SRob Herring 	writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
80220e6cf7SRob Herring 	__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
81220e6cf7SRob Herring 	outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
82220e6cf7SRob Herring 			  HB_JUMP_TABLE_PHYS(cpu) + 15);
83220e6cf7SRob Herring }
84220e6cf7SRob Herring 
85220e6cf7SRob Herring const static struct of_device_id irq_match[] = {
86220e6cf7SRob Herring 	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
87220e6cf7SRob Herring 	{}
88220e6cf7SRob Herring };
89220e6cf7SRob Herring 
90220e6cf7SRob Herring static void __init highbank_init_irq(void)
91220e6cf7SRob Herring {
92220e6cf7SRob Herring 	of_irq_init(irq_match);
93220e6cf7SRob Herring 	l2x0_of_init(0, ~0UL);
94220e6cf7SRob Herring }
95220e6cf7SRob Herring 
96220e6cf7SRob Herring static void __init highbank_timer_init(void)
97220e6cf7SRob Herring {
98220e6cf7SRob Herring 	int irq;
99220e6cf7SRob Herring 	struct device_node *np;
100220e6cf7SRob Herring 	void __iomem *timer_base;
101220e6cf7SRob Herring 
102220e6cf7SRob Herring 	/* Map system registers */
103220e6cf7SRob Herring 	np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
104220e6cf7SRob Herring 	sregs_base = of_iomap(np, 0);
105220e6cf7SRob Herring 	WARN_ON(!sregs_base);
106220e6cf7SRob Herring 
107220e6cf7SRob Herring 	np = of_find_compatible_node(NULL, NULL, "arm,sp804");
108220e6cf7SRob Herring 	timer_base = of_iomap(np, 0);
109220e6cf7SRob Herring 	WARN_ON(!timer_base);
110220e6cf7SRob Herring 	irq = irq_of_parse_and_map(np, 0);
111220e6cf7SRob Herring 
112220e6cf7SRob Herring 	highbank_clocks_init();
113220e6cf7SRob Herring 
114220e6cf7SRob Herring 	sp804_clocksource_init(timer_base + 0x20, "timer1");
115220e6cf7SRob Herring 	sp804_clockevents_init(timer_base, irq, "timer0");
116220e6cf7SRob Herring }
117220e6cf7SRob Herring 
118220e6cf7SRob Herring static struct sys_timer highbank_timer = {
119220e6cf7SRob Herring 	.init = highbank_timer_init,
120220e6cf7SRob Herring };
121220e6cf7SRob Herring 
122220e6cf7SRob Herring static void highbank_power_off(void)
123220e6cf7SRob Herring {
124220e6cf7SRob Herring 	hignbank_set_pwr_shutdown();
125220e6cf7SRob Herring 	scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
126220e6cf7SRob Herring 
127220e6cf7SRob Herring 	while (1)
128220e6cf7SRob Herring 		cpu_do_idle();
129220e6cf7SRob Herring }
130220e6cf7SRob Herring 
131220e6cf7SRob Herring static void __init highbank_init(void)
132220e6cf7SRob Herring {
133220e6cf7SRob Herring 	pm_power_off = highbank_power_off;
134220e6cf7SRob Herring 
135220e6cf7SRob Herring 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
136220e6cf7SRob Herring }
137220e6cf7SRob Herring 
138220e6cf7SRob Herring static const char *highbank_match[] __initconst = {
139220e6cf7SRob Herring 	"calxeda,highbank",
140220e6cf7SRob Herring 	NULL,
141220e6cf7SRob Herring };
142220e6cf7SRob Herring 
143220e6cf7SRob Herring DT_MACHINE_START(HIGHBANK, "Highbank")
144220e6cf7SRob Herring 	.map_io		= highbank_map_io,
145220e6cf7SRob Herring 	.init_irq	= highbank_init_irq,
146220e6cf7SRob Herring 	.timer		= &highbank_timer,
147220e6cf7SRob Herring 	.init_machine	= highbank_init,
148220e6cf7SRob Herring 	.dt_compat	= highbank_match,
149220e6cf7SRob Herring MACHINE_END
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